specifications subject to change without notice. all dimensions in inches. ? copyright 1998 the connor-winfield corporation bulletin page revision date tx182 1 of 2 00 01 feb 2007 model ta5g 5.0x7.0mm surface mount tcxo description the connor winfield model ta5g is a 5x7mm surface mount temperature compensated crystal controlled oscillators (tcxo) with a tri- state lvcmos output . the ta5g is designed for applications requiring high frequency stability, low jitter over the commercial temperature range. the rohs compliant, surface mount package is design for high-density mounting and is optimum for mass production. ta5g 0706 10mhz features tcxo 3.3v operation lvcmos output l ogic frequency stability: temperature range: low jitter <1ps rms tri-state enable/disable function surface mount package tape and reel p acking rohs compliant / lead free 2.50ppm 0 to 70c 211 1 comprehensive drive aurora, illinois 60505 phone: 630-851-4722 fax: 630-851-5040 www.conwin.com us headquarters 630-851-4722: european headquarters: +353-61-472221 absol ute m aximum rating s table 1 parameter units minimum nominal maxi mum units note storage temperature - 55 - 125 c supply voltage (vcc) - 0.5 - 6.0 vdc operating specific ations table 2 parameter minimum nominal maxi mum units note frequency range 6.4 - 52 mhz frequency calibration @ 25 c - 1.00 - 1.00 ppm 1 frequency stability - 2.50 - 2.50 ppm 2 operating temperature range 0 - 70 c aging first year - 1.00 - 1.00 ppm aging per year - 1.00 - 1.00 ppm supply voltage var iation. - - 0.2 ppm load coefficient, 5pf - - 0.2 ppm supply voltage (vcc) 3.135 3.3 3.465 vdc supply current (icc) - 6 10 ma jitter (bw=10hz to 20mhz) - - 5 ps rms jitter (bw=12khz to 20mhz) - - 1 ps rms ssb phase noise at 10h z offset - - - 80 dbc/hz ssb phase noise at 100hz offset - - - 110 dbc/hz ssb phase noise at 1khz offset - - - 135 dbc/hz ssb phase noise at > 10khz offset - - - 150 dbc/hz input characteristics for enable / disable function (pin 8) table 3 parameter minimum nominal maxi mum units note enable voltage (high) or open circuit (vih) 70% vdd - - vdc 3 disable voltage (low) output tri - stated (vil) - - 30% vdd vdc lvcmos output characteristics table 4 parameter min imum nominal maxi mum units note load - - 15 pf voltage (high) (voh) 90%vcc - - vdc (low) (vol) - - 10%vcc vdc current (high) (ioh) - 4 - - ma (low) (iol) - - 4 ma duty cycle a t 50% of vcc 45 50 55 % rise / fall time 10% to 90% - - 8 ns note: 1) initial calibration @ 25 c. specifications at time of s hipment after 48 hours of operation. 2) freque ncy stability vs. change in tem perature. [(fmax ? fmin)/2.fo] 3) leave pad 8 unconnected if enable / d isable function is not required. w hen tri - stated, the output stage is disabled but the os cillator and compensation circuit ar e still active (current co nsumption < 1 ma).
211 1 comprehensive drive aurora, illinois 60505 phone: 630-851-4722 fax: 630-851-5040 www.conwin.com specifications subject to change without notice. all dimensions in inches. ? copyright 1998 the connor-winfield corporation us headquarters: 630-851-4722 european headquarters: +353-61-472221 bulletin page revision date tx182 2 of 2 00 01 feb 2007 ordering information ta5g - 10 mhz tcxo series center frequency environmentals table 6 vibration: vibration per mil std 883e method 2007.3 test condition a shock: mechanica l shock per mil std 883e method 2002.4 test condition b. soldering: see solder profile page. solderability solderability per mil std 883e method 2003 package characteristics table 5 package ceramic surface mount package. 1 tape and reel information package drawing su gg es ted pad lay ou t 0. 27 6 0. 00 6 (7 .0 m m ) 0. 19 7 0. 00 6 (5 .0 m m ) 0. 07 9 m ax . (2 .0 m m ) 0. 02 5( 6 p la ce s) (0 .6 35 m m ) 0. 10 0 (2 .5 4m m ) 0. 04 0 (1 .0 2m m ) (6 p la ce s) 0. 03 0 (0 .7 62 m m ) (4 p la ce s) 0. 10 0 (2 .5 4m m ) p in 1 0. 03 8 (0 .9 65 m m ) (4 p la ce s) t a 5 g 0 7 0 6 1 0 m h z d im en si on al t ol er an ce : . 00 5 (.1 27 m m ) . 02 (.5 08 m m ) 1 2 3 4 5 6 7 8 9 10 0. 21 5 (5 .4 6m m ) 0. 03 7 (0 .9 4m m ) 0. 05 1 (1 .2 8m m ) 0. 05 1 (1 .2 8m m ) 0. 29 5 (7 .4 9m m ) 0. 03 0 (0 .7 6m m ) k ee p o ut a re a top vie w 1 solder profile 1 2 0 c 1 5 0 c 1 8 0 c 2 6 0 c 0 2 2 0 c 3 6 0 s e c . m a x . 1 2 0 s m a x . 1 0 s 6 0 s m a x . t i m e t e m p e r a t u r e 2 6 0 c 90 % 50 % 10 % output waveform table 7 pin connection 1 do not connect 2 do not connect 3 do not connect 4 ground 5 output 6 do not connect 7 do not connect 8 tri - state enable / disable 9 supply, vcc 10 do not connect 4 5 1 2 3 6 7 8 9 10 vcc supplyvoltage dnc dnc dnc dnc dnc dnc output 15 pf .01 ufbypass e/d test circuit pin connections
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