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rev. f information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ?2004 analog devices, inc. all rights reserved. ad586 high precision 5 v reference features laser trimmed to high accuracy 5.000 v 2.0 mv (m grade) trimmed temperature coefficient 2 ppm/ c max, 0 c to 70 c (m grade) 5 ppm/ c max, ?0 c to +85 c (b and l grades) 10 ppm/ c max, ?5 c to +125 c (t grade) low noise, 100 nv/ hz noise reduction capability output trim capability mil-std-883 compliant versions available industrial temperature range soics available output capable of sourcing or sinking 10 ma functional block diagram a1 r s r z1 r z2 r f r t r i ad586 gnd v in noise reduction v out trim note: pins 1, 3, and 7 are internal test points. make no connections to these points. general description the ad586 represents a major advance in the state-of-the-art in monolithic voltage references. using a proprietary ion-implanted buried zener diode and laser wafer trimming of high stability thin-film resistors, the ad586 provides outstanding performance at low cost. the ad586 offers much higher performance than most other 5 v references. because the ad586 uses an industry-standard pinout, many systems can be upgraded instantly with the ad586. the buried zener approach to reference design provides lower noise and drift than band gap voltage references. the ad586 offers a noise reduction pin that can be used to further reduce the noise level generated by the buried zener. the ad586 is recommended for use as a reference for 8-, 10-, 12-, 14-, or 16-bit dacs that require an external precision reference. the device is also ideal for successive approximation or integrating adcs with up to 14 bits of accuracy and, in general, can offer better performance than the standard on-chip references. the ad586j, ad586k, ad586l, and ad586m are specified for operation from 0 c to 70 c; the ad586a and ad586b are specified for ?0 c to +85 c operation; and the ad586s and ad586t are specified for ?5 c to +125 c operation. the ad586j, ad586k, ad586l, and ad586m are available in an 8-lead pdip. the ad586j, ad586k, ad586l, ad586a, and ad586b are available in an 8-lead soic package. the ad586j, ad586k, ad586l, ad586s, and ad586t are available in an 8-lead cerdip package. product highlights 1. laser trimming of both initial accuracy and temperature coefficients results in very low errors over temperature with- out the use of external components. the ad586m has a maximum deviation from 5.000 v of 2.45 mv between 0 c and 70 c, and the ad586t guarantees 7.5 mv maximum total error between ?5 c and +125 c. 2. for applications requiring higher precision, an optional fine-trim connection is provided. 3. any system using an industry standard pinout reference can be upgraded instantly with the ad586. 4. output noise of the ad586 is very low, typically 4 v p-p. a noise reduction pin is provided for additional noise filtering using an external capacitor. 5. the ad586 is available in versions compliant with mil- std- 883. refer to the analog devices military products databook or the current ad586/883b data sheet for detailed specifications.
rev. f e2e ad586especifications (@ t a = 25 c, v in = 15 v, unless otherwise noted.) ad586k/ ad586j ad586a ad586l/ad586b ad586m ad586s ad586t parameter min typ max min typ max min typ max min typ max min typ max min typ max unit output voltage 4.980 5.020 4.995 5.005 4.9975 5.0025 4.998 5.002 4.990 5.010 4.9975 5.0025 v output voltage drift 1 0 c to 70 c2 51 55 2 ppm/ c e55 c to +125 c 20 10 ppm/ c gain adjustment +6 +6 +6 +6 +6 +6 % e2 e2 e2 e2 e2 e2 % line regulation 1 10.8 v < +v in < 36 v t min to t max 100 100 100 100 v/v 11.4 v < +v in < 36 v t min to t max 150 150 v/v load regulation 1 sourcing 0 ma < i out < 10 ma 25 c 100 100 100 100 150 150 v/ma t min to t max 100 100 100 100 150 150 v/ma sinking e10 ma < i out < 0 ma 25 c 400 400 400 400 400 400 v/ma quiescent current 23 23 2 3 23 23 23 ma power consumption 30 30 30 30 30 30 mw output noise 0.1 hz to 10 hz 4 4 4 4 4 4 v p-p spectral density, 100 hz 100 100 100 100 100 100 nv/ hz h h hh jc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 c/w ja . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 c/w output protection: output safe for indefinite short to ground or v in . * stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
rev. f ad586 e3e caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad586 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. ordering guide initial temperature temperature package package quantity model error coefficient range description option per reel ad586jn 20 mv 25 ppm/ c0 c to 70 c pdip n-8 ad586jq 20 mv 25 ppm/ c0 c to 70 c cerdip q-8 ad586jr 20 mv 25 ppm/ c0 c to 70 c soic r-8 ad586jr-reel7 20 mv 25 ppm/ c0 c to 70 c soic r-8 750 ad586jrz 1 20 mv 25 ppm/ c0 c to 70 c soic r-8 ad586jrz-reel7 1 20 mv 25 ppm/ c0 c to 70 c soic r-8 750 ad586kn 5 mv 15 ppm/ c0 c to 70 c pdip n-8 ad586kq 5 mv 15 ppm/ c0 c to 70 c cerdip q-8 ad586kr 5 mv 15 ppm/ c0 c to 70 c soic r-8 ad586kr-reel 5 mv 15 ppm/ c0 c to 70 c soic r-8 2500 ad586kr-reel7 5 mv 15 ppm/ c0 c to 70 c soic r-8 750 ad586krz 1 5 mv 15 ppm/ c0 c to 70 c soic r-8 ad586krz-reel 1 5 mv 15 ppm/ c0 c to 70 c soic r-8 2,500 ad586krz-reel7 1 5 mv 15 ppm/ c0 c to 70 c soic r-8 750 ad586ln 2.5 mv 5 ppm/ c0 c to 70 c pdip n-8 ad586lr 2.5 mv 5 ppm/ c0 c to 70 c soic r-8 ad586lr-reel 2.5 mv 5 ppm/ c0 c to 70 c soic r-8 2500 ad586lr-reel7 2.5 mv 5 ppm/ c0 c to 70 c soic r-8 750 ad586lrz 1 2.5 mv 5 ppm/ c0 c to 70 c soic r-8 ad586lrz-reel 1 2.5 mv 5 ppm/ c0 c to 70 c soic r-8 2,500 ad586lrz-reel7 1 2.5 mv 5 ppm/ c0 c to 70 c soic r-8 750 ad586mn 2 mv 2 ppm/ c0 c to 70 c pdip n-8 ad586ar 5 mv 15 ppm/ c e40 c to +85 c soic r-8 AD586AR-REEL 5 mv 15 ppm/ c e40 c to +85 c soic r-8 2500 ad586br 2.5 mv 5 ppm/ c e40 c to +85 c soic r-8 ad586br-reel7 2.5 mv 5 ppm/ c e40 c to +85 c soic r-8 750 ad586lq 2.5 mv 5 ppm/ c0 c to 70 c cerdip q-8 ad586sq 10 mv 20 ppm/ c e55 c to +125 c cerdip q-8 ad586tq 2.5 mv 10 ppm/ c e55 c to +125 c cerdip q-8 ad586tq/883b 2 2.5 mv 10 ppm/ c e55 c to +125 c cerdip q-8 notes 1 z = pb-free part. 2 for details on grade and package offerings screened in accordance with mil-std-883, refer to the analog devices military products databook or the current ad586/883b data sheet.
rev. f e4e ad586 theory of operation the ad586 consists of a proprietary buried zener diode refer- ence, an amplifier to buffer the output, and several high stability thin-film resistors as shown in the block diagram in figure 1. this design results in a high precision monolithic 5 v output reference with initial offset of 2.0 mv or less. the temperature compensation circuitry provides the device with a temperature coefficient of under 2 ppm/ c. using the bias compensation resistor between the zener output and the noninverting input to the amplifier, a capacitor can be added at the noise reduction pin (pin 8) to form a low- pass filter and reduce the noise contribution of the zener to the circuit. a1 r s r z1 r z2 r f r t r i ad586 gnd v in noise reduction v out trim note: pins 1, 3, and 7 are internal test points. make no connections to these points. figure 1. functional block diagram applying the ad586 the ad586 is simple to use in virtually all precision reference applications. when power is applied to pin 2, and pin 4 is grounded, pin 6 provides a 5 v output. no external compo nents are required; the degree of desired absolute accuracy is achieved simply by selecting the required device grade. the ad586 re quires less than 3 ma quiescent current from an operating supply of 12 v or 15 v. an external fine trim may be desired to set the output level to exactly 5.000 v (calibrated to a main system reference). system calibration may also require a reference voltage that is slightly different from 5.000 v, for example, 5.12 v for binary applica- tions. in either case, the optional trim circuit shown in figure 2 can offset the output by as much as 300 mv with minimal effect on other device characteristics. ad586 gnd v in noise reduction v o trim optional noise reduction capacitor v in output c n 1 f 10k figure 2. optional fine trim configuration noise performance and reduction the noise generated by the ad586 is typically less than 4 v p-p over the 0.1 hz to 10 hz band. noise in a 1 mhz bandwidth is approximately 200 v p-p. the dominant source of this noise is the buried zener, which contributes approximately 100 nv/ hz hzhz hz hz hz hz hz hz hzhz
rev. f ad586 e5e turn-on time upon application of power (cold start), the time required for the output voltage to reach its final value within a specified error band is defined as the turn-on settling time. two components normally associated with this are: the time for the active circuits to settle and the time for the thermal gradients on the chip to stabilize. figure 5 shows the turn-on characteristics of the ad 586. it shows the settling to be about 60 s to 0.01%. note the ab sence of any thermal tails when the horizontal scale is expanded to l ms/cm in figure 5b. output turn-on time is modified when an external noise reduc- tion capacitor is used. when present, this capacitor acts as an additional load to the internal zener diode?s current source, resulting in a somewhat longer turn-on time. in the case of a 1 f capacitor, the initial turn-on time is approximately 400 ms to 0.01% (see figure 5c). a. electrical turn-on b. extended time scale c. turn-on with 1 f c n figure 5. turn-on characteristics dynamic performance the output buffer amplifier is designed to provide the ad586 with static and dynamic load regulation superior to less complete references. many adcs and dacs present transient current loads to the reference, and poor reference response can degrade the converter?s performance. figures 6a to 6c display the characteristics of the ad586 output amplifier driving a 0 ma to 10 ma load. ad586 v l 5v 0v v out 500 3.5v figure 6a. transient load test circuit figure 6b. large-scale transient response figure 6c. fine-scale setting for transient load
rev. f e6e ad586 in some applications, a varying load may be both resistive and capacitive in nature, or the load may be connected to the ad586 by a long capacitive cable. figures 7a to 7b display the output amplifier characteristics driving a 1000 pf, 0 ma to 10 ma load. ad586 v l 5v 0v v out 500 3.5v c l 1000pf figure 7a. capacitive load transient response test circuit figure 7b. output response with capacitive load load regulation the ad586 has excellent load regulation characteristics. figure 8 shows that varying the load several ma changes the output by a few v. the ad586 has somewhat better load regulation per- formance sourcing current than sinking current. e6 e4 e2 246810 load (ma) 0 e500 e1000 500 1000 v out ( v) figure 8. typical load regulation characteristics temperature performance the ad586 is designed for precision reference applications w here temperature performance is critical. extensive temperature testing ensures that the device?s high level of performance is maintained over the operating temperature range. some confusion exists in the area of defining and specifying reference voltage error over temperature. historically, references have been characterized using a maximum deviation per degree celsius, i.e., ppm/ c. however, because of nonlinearities in temperature characteristics that originated in standard zener references (such as s type characteristics), most manufactur- ers have begun to use a maximum limit error band approach to specify devices. this technique involves measuring the output at three or more different temperatures to specify an output voltage error band. figure 9 shows the typical output voltage drift for the ad586l and illustrates the test methodology. the box in figure 9 is bounded on the sides by the operating temperature extremes and on the top and the bottom by the maximum and minimum output voltages measured over the operating temperature range. the slope of the diagonal drawn from the lower left to the upper right corner of the box determines the performance grade of the device. e20 0 20 4 06080 5.003 5.000 temperature e c v min v max slope t max t min slope = t.c. = = = v max e v min (t max e t min ) 5 10 e6 5.0027 e 5.0012 (70 c e 0) 5 10 e6 4.3ppm/ c figure 9. typical ad586l temperature drift each ad586j, ad586k, and ad586l grade unit is tested at 0 c, 25 c, and 70 c. each ad586sq and ad586tq grade unit is tested at e55 c, +25 c, and +125 c. this approach ensures that the variations of output voltage that occur as the temperature changes within the specified range will be con- tained within a box whose diagonal has a slope equal to the maximum specified drift. the position of the box on the vertical scale will change from device to device as initial error and the shape of the curve vary. the maximum height of the box for the appropriate temperature range and device grade is shown in table i. duplication of these results requires a combination of high accuracy and stable temperature control in a test system. evaluation of the ad586 will produce a curve similar to that in figure 9, but output readings could vary depending on the test methods and equipment used. table i. maximum output change in mv device maximum output change (mv) grade 0 c to 70 c e40 c to +85 c e55 c to +125 c ad586j 8.75 ad586k 5.25 ad586l 1.75 ad586m 0.70 ad586a 9.37 ad586b 3.12 ad586s 18.00 ad586t 9.00
rev. f ad586 ? negative reference voltage from an ad586 the ad586 can be used to provide a precision ?.000 v output as shown in figure 10. the v in pin is tied to at least a 6 v sup- ply, the output pin is grounded, and the ad586 ground pin is connected through a resistor, r s , to a ?5 v supply. the ? v output is now taken from the ground pin (pin 4) instead of v out . it is essential to arrange the output load and the supply resistor r s so that the net current through the ad586 is between 2.5 ma and 10.0 ma. the temperature characteristics and long- term stability of the device will be essentially the same as that of a unit used in the standard +5 v output configuration. ad586 gnd +6v > +30v v out v in 2.5ma < i l < 10ma 10v r s ?v i l r s ?5v figure 10. ad586 as a negative 5 v reference using the ad586 with converters the ad586 is an ideal reference for a wide variety of 8-, 12-, 14-, and 16-bit adcs and dacs. several representative examples follow. 5 v reference with multiplying cmos dacs or adcs the ad586 is ideal for applications with 10- and 12-bit multi- plying cmos dacs. in the standard hookup, as shown in figure 11, the ad586 is paired with the ad7545 12-bit multi- plying dac and the ad711 high speed bifet op amp. the amplifier dac configuration produces a unipolar 0 v to ? v output range. bipolar output applications and other operating details can be found in the individual product data sheets. ad586 gnd v out v in ad711k 0.1 f ?5v 0 v to 5v 0.1 f +15v out 1 a gnd dgnd db11 to db0 c1 33pf r2 68 r fb +15v v dd ad7545k v ref 10k v out trim +15v figure 11. low power 12-bit cmos dac application the ad586 can also be used as a precision reference for mul- tiple dacs. figure 12 shows the ad586, the ad7628 dual dac, and the ad712 dual op amp hooked up for single-supply operation to produce 0 v to ? v outputs. because both dacs are on the same die and share a common reference and output op amps, the dac outputs will exhibit similar gain tcs. v out b = 0 to ?v ad586 gnd v in ad712 +15v out a dgnd v out +15v a gnd dac a db0 db7 data inputs out b dac b rfb b rfb a v ref a v out a = 0 to ?v ad7628 v ref b figure 12. ad586 as a 5 v reference for a cmos dual dac stacked precision references for multiple voltages often, a design requires several reference voltages. three ad 586s can be stacked, as shown in figure 13, to produce 5.000 v, 10.000 v, and 15.000 v outputs. this scheme can be extended to any number of ad586s as long as the maximum load current is not exceeded. this design provides the additional advantage of improved line regulation on the 5.0 v output. changes in v in of 18 v to 50 v produce output changes that are below the noise level of the references. 22v to 46v ad586 gnd v out v in trim 10k ad586 gnd v out v in trim ad586 gnd v out v in trim 10k 10k 15v 10v 5v figure 13. multiple ad586s stacked for precision 5 v, 10 v, and 15 v outputs
rev. f e8e ad586 precision current source the design of the ad586 allows it to be easily configured as a current source. by choosing the control resistor r c in figure 14, the user can vary the load current from the quiescent current (2 ma typically) to approximately 10 ma. the compliance voltage of this circuit varies from about 5 v to 21 v, depending on the value of v in . ad586 gnd v out v in 5v r c i l = + i bias +v in r c (500 min) figure 14. precision current source precision high current supply for higher currents, the ad586 can easily be connected to a power pnp or power darlington pnp device. the circuit in figures 15a and 15b can deliver up to 4 amps to the load. the 0.1 f capacitor is required only if the load has a significant capacitive component. if the load is purely resistive, improved high frequency supply rejection results can be obtained by removing the capacitor. ad586 gnd v out v in 5v r c i l = + i bias r c 0.1 f 15v 220 2n6285 figure 15a. precision high current current source ad586 gnd v out v in 0.1 f 15v 220 2n6285 v out 5v @ 4 amps figure 15b. precision high current voltage source
rev. f ad586 e9e outline dimensions 8-lead plastic dual in-line package [pdip] (n-8) dimensions shown in inches and (millimeters) seating plane 0.180 (4.57) max 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 8 1 4 5 0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.100 (2.54) bsc 0.375 (9.53) 0.365 (9.27) 0.355 (9.02) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design compliant to jedec standards mo-095aa 0.015 (0.38) min 8-lead ceramic dual in-line package [cerdip] (q-8) dimensions shown in inches and (millimeters) 1 4 85 0.310 (7.87) 0.220 (5.59) pin 1 0.005 (0.13) min 0.055 (1.40) max 0.100 (2.54) bsc 15 0 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) seating plane 0.200 (5.08) max 0.405 (10.29) max 0.150 (3.81) min 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) controlling dimensions are in inches; millimeters dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design 8-lead standard small outline package [soic] narrow body (r-8) dimensions shown in millimeters and (inches) 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 85 4 1 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-012aa
rev. f e10e ad586 revision history location page 1/04?data sheet changed from rev. e to rev. f. changes to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7/03?data sheet changed from rev. d to rev. e. removed ad586j chips . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . universal updated ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 change to figure 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 u pdated figure 12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 updated outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4/01?data sheet changed from rev. c to rev. d. changed figure 10 to table i (maximum output change in mv) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
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