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lmc6061 precision cmos single micropower operational amplifier general description the lmc6061 is a precision single low offset voltage, mi- cropower operational amplifier, capable of precision single supply operation. performance characteristics include ultra low input bias current, high voltage gain, rail-to-rail output swing, and an input common mode voltage range that in- cludes ground. these features, plus its low power consump- tion, make the lmc6061 ideally suited for battery powered applications. other applications using the lmc6061 include precision full-wave rectifiers, integrators, references, sample-and-hold circuits, and true instrumentation amplifiers. this device is built with national's advanced double-poly silicon-gate cmos process. for designs that require higher speed, see the lmc6081 precision single operational amplifier. for a dual or quad operational amplifier with similar features, see the lmc6062 or lmc6064 respectively. patent pending features (typical unless otherwise noted) n low offset voltage: 100 v n ultra low supply current: 20 a n operates from 4.5v to 15v single supply n ultra low input bias current: 10 fa n output swing within 10 mv of supply rail, 100k load n input common-mode range includes v ? n high voltage gain: 140 db n improved latchup immunity applications n instrumentation amplifier n photodiode and infrared detector preamplifier n transducer amplifiers n hand-held analytic instruments n medical instrumentation n d/a converter n charge amplifier for piezoelectric transducers connection diagram 8-pin dip/so 01142201 top view distribution of lmc6061 input offset voltage (t a = +25c) 01142215 april 2001 lmc6061 precision cmos single micropower operational amplifier ? 2001 national semiconductor corporation ds011422 www.national.com
absolute maximum ratings (note 1) if military/aerospace specified devices are required, please contact the national semiconductor sales office/ distributors for availability and specifications. differential input voltage supply voltage voltage at input/output pin (v + ) +0.3v, (v ? ) ?0.3v supply voltage (v + ?v ? ) 16v output short circuit to v + (note 10) output short circuit to v ? (note 2) lead temperature 260c (soldering, 10 sec.) storage temp. range ?65c to +150c junction temperature 150c esd tolerance (note 4) 2 kv current at input pin 10 ma current at output pin 30 ma current at power supply pin 40 ma power dissipation (note 3) operating ratings (note 1) temperature range lmc6061am ?55c t j +125c lmc6061ai, lmc6082i ?40c t j +85c supply voltage 4.5v v + 15.5v thermal resistance ( q ja ) (note 11) n package, 8-pin molded dip 115c/w m package, 8-pin surface mount 193c/w power dissipation (note 9) dc electrical characteristics unless otherwise specified, all limits guaranteed for t j = 25c. boldface limits apply at the temperature extremes. v + = 5v, v ? = 0v, v cm = 1.5v, v o = 2.5v and r l > 1m unless otherwise specified. typ lmc6061am lmc6061ai lmc6061i symbol parameter conditions (note 9) limit limit limit units (note 6) (note 6) (note 6) v os input offset voltage 100 350 350 800 v 1200 900 1300 max tcv os input offset voltage 1.0 v/c average drift i b input bias current 0.010 pa 100 4 4 max i os input offset current 0.005 pa 100 2 2 max r in input resistance > 10 tera w cmrr common mode 0v v cm 12.0v 85 75 75 66 db rejection ratio v + = 15v 70 72 63 min +psrr positive power supply 5v v + 15v 85 75 75 66 db rejection ratio v o = 2.5v 70 72 63 min ?psrr negative power supply 0v v ? ?10v 100 84 84 74 db rejection ratio 70 81 71 min v cm input common-mode v + = 5v and 15v ?0.4 ?0.1 ?0.1 ?0.1 v voltage range for cmrr 3 60 db 000 max v + ? 1.9 v + ? 2.3 v + ? 2.3 v + ? 2.3 v v + ? 2.6 v + ? 2.5 v + ? 2.5 min a v large signal r l = 100 k w sourcing 4000 400 400 300 v/mv voltage gain (note 7) 200 300 200 min sinking 3000 180 180 90 v/mv 70 100 60 min r l =25k w sourcing 3000 400 400 200 v/mv (note 7) 150 150 80 min sinking 2000 100 100 70 v/mv 35 50 35 min lmc6061 www.national.com 2
dc electrical characteristics (continued) unless otherwise specified, all limits guaranteed for t j = 25c. boldface limits apply at the temperature extremes. v + = 5v, v ? = 0v, v cm = 1.5v, v o = 2.5v and r l > 1m unless otherwise specified. typ lmc6061am lmc6061ai lmc6061i symbol parameter conditions (note 9) limit limit limit units (note 6) (note 6) (note 6) v o output swing v + = 5v 4.995 4.990 4.990 4.950 v r l = 100 k w to 2.5v 4.970 4.980 4.925 min 0.005 0.010 0.010 0.050 v 0.030 0.020 0.075 max v + = 5v 4.990 4.975 4.975 4.950 v r l =25k w to 2.5v 4.955 4.965 4.850 min 0.010 0.020 0.020 0.050 v 0.045 0.035 0.150 max v + = 15v 14.990 14.975 14.975 14.950 v r l = 100 k w to 7.5v 14.955 14.965 14.925 min 0.010 0.025 0.025 0.050 v 0.050 0.035 0.075 max v + = 15v 14.965 14.900 14.900 14.850 v r l =25k w to 7.5v 14.800 14.850 14.800 min 0.025 0.050 0.050 0.100 v 0.200 0.150 0.200 max i o output current sourcing, v o =0v 2216 1613ma v + =5v 8108 min sinking, v o =5v 2116 1616ma 788 min i o output current sourcing, v o =0v 2515 1515ma v + = 15v 91010 min sinking, v o = 13v 26 20 20 20 ma (note 10) 788 min i s supply current v + = +5v, v o = 1.5v 20 24 24 32 a 35 32 40 max v + = +15v, v o = 7.5v 24 30 30 40 a 40 38 48 max ac electrical characteristics unless otherwise specified, all limits guaranteed for t j = 25c, boldface limits apply at the temperature extremes. v + = 5v, v ? = 0v, v cm = 1.5v, v o = 2.5v and r l > 1m unless otherwise specified. typ lmc6061am lmc6061ai lmc6061i symbol parameter conditions (note 5) limit limit limit units (note 6) (note 6) (note 6) sr slew rate (note 8) 35 20 20 15 v/ms 8107 min gbw gain-bandwidth product 100 khz q m phase margin 50 deg e n input-referred voltage noise f = 1 khz 83 i n input-referred current noise f = 1 khz 0.0002 t.h.d. total harmonic distortion f = 1 khz, a v =?5 r l = 100 k w ,v o =2v pp 0.01 % 5v supply lmc6061 www.national.com 3
ac electrical characteristics (continued) note 1: absolute maximum ratings indicate limits beyond which damage to the device may occur. operating ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. for guaranteed specifications and test conditions, see the electrical characteristics. the guaranteed specifications apply only for the test conditions listed. note 2: applies to both single-supply and split-supply operation. continous short circuit operation at elevated ambient temperature can result in exceedi ng the maximum allowed junction temperature of 150c. output currents in excess of 30 ma over long term may adversely affect reliability. note 3: the maximum power dissipation is a function of t j(max) , q ja , and t a . the maximum allowable power dissipation at any ambient temperature is p d =(t j(max) ?t a )/ q ja . note 4: human body model, 1.5 k w in series with 100 pf. note 5: typical values represent the most likely parametric norm. note 6: all limits are guaranteed by testing or statistical analysis. note 7: v + = 15v, v cm = 7.5v and r l connected to 7.5v. for sourcing tests, 7.5v v o 11.5v. for sinking tests, 2.5v v o 7.5v. note 8: v + = 15v. connected as voltage follower with 10v step input. number specified is the slower of the positive and negative slew rates. note 9: for operating at elevated temperatures the device must be derated based on the thermal resistance q ja with p d =(t j t a )/ q ja . note 10: do not connect output to v + , when v + is greater than 13v or reliability witll be adversely affected. note 11: all numbers apply for packages soldered directly into a pc board. note 12: for guaranteed military temperature range parameters see retsmc6061x. lmc6061 www.national.com 4
typical performance characteristics v s = 7.5v, t a = 25c, unless otherwise specified distribution of lmc6061 input offset voltage (t a = +25c) distribution of lmc6061 input offset voltage (t a = ?55c) 01142215 01142216 distribution of lmc6061 input offset voltage (t a = +125c) input bias current vs temperature 01142217 01142218 supply current vs supply voltage input voltage vs output voltage 01142219 01142220 lmc6061 www.national.com 5
typical performance characteristics v s = 7.5v, t a = 25c, unless otherwise specified (continued) common mode rejection ratio vs frequency power supply rejection ratio vs frequency 01142221 01142222 input voltage noise vs frequency output characteristics sourcing current 01142223 01142224 output characteristics sinking current gain and phase response vs temperature (?55c to +125c) 01142225 01142226 lmc6061 www.national.com 6
typical performance characteristics v s = 7.5v, t a = 25c, unless otherwise specified (continued) gain and phase response vs capacitive load with r l =20k w gain and phase response vs capacitive load with r l = 500 k w 01142227 01142228 open loop frequency response inverting small signal pulse response 01142229 01142230 inverting large signal pulse response non-inverting small signal pulse response 01142231 01142232 lmc6061 www.national.com 7
typical performance characteristics v s = 7.5v, t a = 25c, unless otherwise specified (continued) non-inverting large signal pulse response stability vs capacitive load, r l =20k w 01142233 01142234 stability vs capacitive load r l =1m w 01142235 lmc6061 www.national.com 8
applications hints amplifier topology the lmc6061 incorporates a novel op-amp design topology that enables it to maintain rail-to-rail output swing even when driving a large load. instead of relying on a push-pull unity gain output buffer stage, the output stage is taken directly from the internal integrator, which provides both low output impedance and large gain. special feed-forward compensa- tion design techniques are incorporated to maintain stability over a wider range of operating conditions than traditional micropower op-amps. these features make the lmc6061 both easier to design with, and provide higher speed than products typically found in this ultra-low power class. compensating for input capacitance it is quite common to use large values of feedback resis- tance for amplifiers with ultra-low input current, like the lmc6061. although the lmc6061 is highly stable over a wide range of operating conditions, certain precautions must be met to achieve the desired pulse response when a large feedback resistor is used. large feedback resistors and even small values of input capacitance, due to transducers, photo- diodes, and circuit board parasitics, reduce phase margins. when high input impedances are demanded, guarding of the lmc6061 is suggested. guarding input lines will not only reduce leakage, but lowers stray input capacitance as well. (see printed-circuit-board layout for high impedance work ). the effect of input capacitance can be compensated for by adding a capacitor. place a capacitor, c f , around the feed- back resistor (as in figure 1 ) such that: or r 1 c in r 2 c f since it is often difficult to know the exact value of c in ,c f can be experimentally adjusted so that the desired pulse re- sponse is achieved. refer to the lmc660 and the lmc662 for a more detailed discussion on compensating for input capacitance. capacitive load tolerance all rail-to-rail output swing operational amplifiers have volt- age gain in the output stage. a compensation capacitor is normally included in this integrator stage. the frequency location of the dominate pole is affected by the resistive load on the amplifier. capacitive load driving capability can be optimized by using an appropriate resistive load in parallel with the capacitive load (see typical curves). direct capacitive loading will reduce the phase margin of many op-amps. a pole in the feedback loop is created by the combination of the op-amp's output impedance and the ca- pacitive load. this pole induces phase lag at the unity-gain crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response. with a few ex- ternal components, op amps can easily indirectly drive ca- pacitive loads, as shown in figure 2 . in the circuit of figure 2 , r1 and c1 serve to counteract the loss of phase margin by feeding the high frequency compo- nent of the output signal back to the amplifier's inverting input, thereby preserving phase margin in the overall feed- back loop. capacitive load driving capability is enhanced by using a pull up resistor to v + figure 3 . typically a pull up resistor con- ducting 10 a or more will significantly improve capacitive load responses. the value of the pull up resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing. open loop gain of the amplifier can also be affected by the pull up resistor (see electrical characteristics). 01142205 figure 1. canceling the effect of input capacitance 01142204 figure 2. lmc6061 noninverting gain of 10 amplifier, compensated to handle capacitive loads 01142214 figure 3. compensating for large capacitive loads with a pull up resistor lmc6061 www.national.com 9
applications hints (continued) printed-circuit-board layout for high-impedance work it is generally recognized that any circuit which must operate with less than 1000 pa of leakage current requires special layout of the pc board. when one wishes to take advantage of the ultra-low bias current of the lmc6061, typically less than 10 fa, it is essential to have an excellent layout. fortu- nately, the techniques of obtaining low leakages are quite simple. first, the user must not ignore the surface leakage of the pc board, even though it may sometimes appear accept- ably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable. to minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the lmc6061's inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals etc. connected to the op-amp's inputs, as in figure 4 . to have a significant effect, guard rings should be placed on both the top and bottom of the pc board. this pc foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, since no leakage current can flow between two points at the same potential. for example, a pc board trace-to-pad resistance of 10 12 w , which is nor- mally considered a very large resistance, could leak 5 pa if the trace were a 5v bus adjacent to the pad of the input. this would cause a 100 times degradation from the lmc6061's actual performance. however, if a guard ring is held within 5 mv of the inputs, then even a resistance of 10 11 w would cause only 0.05 pa of leakage current. see figure 5 for typical connections of guard rings for standard op-amp configurations. 01142206 figure 4. example of guard ring in p.c. board layout lmc6061 www.national.com 10
applications hints (continued) the designer should be aware that when it is inappropriate to lay out a pc board for the sake of just a few circuits, there is another technique which is even better than a guard ring on a pc board: don't insert the amplifier's input pin into the board at all, but bend it up in the air and use only air as an insulator. air is an excellent insulator. in this case you may have to forego some of the advantages of pc board con- struction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. see figure 6 . latchup cmos devices tend to be susceptible to latchup due to their internal parasitic scr effects. the (i/o) input and output pins look similar to the gate of the scr. there is a minimum current required to trigger the scr gate lead. the lmc6061 and lmc6081 are designed to withstand 100 ma surge current on the i/o pins. some resistive method should be used to isolate any capacitance from supplying excess cur- rent to the i/o pins. in addition, like an scr, there is a minimum holding current for any latchup mode. limiting current to the supply pins will also inhibit latchup suscepti- bility. typical single-supply applications (v + = 5.0 v dc ) the extremely high input impedance, and low power con- sumption, of the lmc6061 make it ideal for applications that require battery-powered instrumentation amplifiers. ex- amples of these types of applications are hand-held ph probes, analytic medical instruments, magnetic field detec- tors, gas detectors, and silicon based pressure transducers. figure 7 shows an instrumentation amplifier that features high differential and common mode input resistance ( > 10 14 w ), 0.01% gain accuracy at a v = 100, excellent cmrr with 1 k w imbalance in bridge source resistance. input current is less than 100 fa and offset drift is less than 2.5 v/c. r 2 provides a simple means of adjusting gain over a wide range without degrading cmrr. r 7 is an initial trim used to maximize cmrr without using super precision matched resistors. for good cmrr over temperature, low drift resistors should be used. 01142207 inverting amplifier 01142208 non-inverting amplifier 01142209 follower figure 5. typical connections of guard rings 01142210 (input pins are lifted out of pc board and soldered directly to components. all other pins connected to pc board). figure 6. air wiring lmc6061 www.national.com 11
typical single-supply applications (v + = 5.0 v dc ) (continued) 01142211 if r 1 =r 5 ,r 3 =r 6 , and r 4 =r 7 ; then \ a v ? 100 for circuit shown (r 2 = 9.822k). figure 7. instrumentation amplifier 01142212 figure 8. low-leakage sample and hold lmc6061 www.national.com 12
typical single-supply applications (v + = 5.0 v dc ) (continued) ordering information package temperature range nsc drawing transport media military industrial ?55c to +125c ?40c to +85c 8-pin lmc6061ain n08e rail molded dip lmc6061in 8-pin lmc6061aim, lmc606aimx m08a rail small outline lmc6061im, lmc6061imx tape and reel 8-pin LMC6061AMJ/883 j08a rail ceramic dip 01142213 figure 9. 1 hz square wave oscillator lmc6061 www.national.com 13
physical dimensions inches (millimeters) unless otherwise noted 8-pin ceramic dual-in-line package order number LMC6061AMJ/883 ns package number j08a lmc6061 www.national.com 14
physical dimensions inches (millimeters) unless otherwise noted (continued) 8-pin small outline package order number lmc6061aim, lmc6061aimx, lmc6061im or lmc6061imx ns package number m08a 8-pin molded dual-in-line package order number lmc6061ain or lmc6061in ns package number n08e lmc6061 www.national.com 15
notes life support policy national's products are not authorized for use as critical components in life support devices or systems without the express written approval of the president and general counsel of national semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. national semiconductor corporation americas tel: 1-800-272-9959 fax: 1-800-737-7018 email: support@nsc.com national semiconductor europe fax: +49 (0) 180-530 85 86 email: europe.support@nsc.com deutsch tel: +49 (0) 69 9508 6208 english tel: +44 (0) 870 24 0 2171 fran?ais tel: +33 (0) 1 41 91 8790 national semiconductor asia pacific customer response group tel: 65-2544466 fax: 65-2504466 email: ap.support@nsc.com national semiconductor japan ltd. tel: 81-3-5639-7560 fax: 81-3-5639-7507 www.national.com lmc6061 precision cmos single micropower operational amplifier national does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and national reserves the righ t at any time without notice to change said circuitry and specifications.

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