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LC7220 SI75T 7805CD 18626237 NAS1102 022C3 01303 1N5045A
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  www.siliconstandard.com 1 of 7 n-channel enhancement-mode power mosfet bv dss 30v r ds(on) 11mw i d 11.5a the SSM6680GM acheives fast switching performance with low gate charge without a complex drive circuit. it is suitable for low voltage applications such as dc/dc pb-free; rohs-compliant so-8 product summary description notes: 1.pulse width must be limited to avoid exceeding the maximum junction temperature of 150c. 2.pulse width <300us, duty cycle <2%. 3.mounted on a square inch of copper pad on fr4 board ; 125c/w when mounted on the minimum pad area required for soldering. converters and general load-switching circuits. the ssm6680m is supplied in an rohs-compliant so-8 package, which is widely used for medium power commercial and industrial surface mount applications. s s s g d d d d so-8 absolute maximum ratings symbol parameter value units v ds v gs i d i dm a p d w/c t stg t j symbol parameter value units r qja maximum thermal resistance, junction-ambient 3 50 c/w drain-source voltage 30 v gate-source voltage 25 v continuous drain current, t c = 25c 11.5 a t c = 70c 9.5 a pulsed drain current 1 50 total power dissipation, t c = 25c 2.5 w -55 to 150 c operating junction temperature range -55 to 150 c linear derating factor 0.02 thermal characteristics storage temperature range ssm 66 8 0 g m 12/16/2005 rev.3.01
www.siliconstandard.com 2 of 7 electrical characteristics (at tj = 25c, unless otherwise specified) notes: 1.pulse width must be limited to avoid exceeding the maximum junction temperature of 150c. 2.pulse width <300us, duty cycle <2%. symbol parameter test conditions min. typ. max. units bv dss drain-source breakdown voltage v gs =0v, i d =250ua 30 - - v d bv dss / d t j breakdown voltage temperature coefficient reference to 25c, i d =1ma - 0.02 - v/c r ds(on) static drain-source on-resistance 2 v gs =10v, i d =11.5a - - 11 mw v gs =4.5v, i d =9.5a - - 18 mw v gs(th) gate threshold voltage v ds =v gs , i d =250ua 1 - 3 v g fs forward transconductance v ds =10v, i d =11.5a - 30 - s i dss drain-source leakage current v ds =30v, v gs =0v - - 1 ua v ds =24v ,v gs =0v, tj = 70c - - 25 ua i gss gate-source leakage current v gs =25v - - 100 na q g total gate charge 2 i d =11.5a - 16.8 - nc q gs gate-source charge v ds =15v - 4.2 - nc q gd gate-drain ("miller") charge v gs =5v - 8 - nc t d(on) turn-on delay time 2 v ds =15v - 8.9 - ns t r rise time i d =1a - 7.3 - ns t d(off) turn-off delay time r g =5.5w , v gs =10v - 25.6 - ns t f fall time r d =10w - 18.6 - ns c iss input capacitance v gs =0v - 1450 - pf c oss output capacitance v ds =25v - 285 - pf c rss reverse transfer capacitance f=1.0mhz - 180 - pf source-drain diode symbol parameter test conditions min. typ. max. units v sd forward voltage 2 i s =3.5a, v gs =0v - - 1.3 v i s continuous source current ( body diode) v d =v g =0v , v s =1.3v - - 1.92 a ssm 66 8 0 g m 12/16/2005 rev.3.01
www.siliconstandard.com 3 of 7 ssm 66 8 0 g m 12/16/2005 rev.3.01 fig 1. typical output characteristics fig 2. typical output characteristics fig 3. on-resistance vs. gate voltage fig 4. normalized on-resistance vs. junction temperature 0 10 20 30 40 011223 v ds , drain-to-source voltage (v) i d , drain c urrent (a) t c =150 o c 10v 8.0v 6.0v 4.0v v gs =3.0v 0 10 20 30 40 50 011223 v ds , drain-to-source voltage (v) i d , drain c urrent (a) t c =25 o c 10v 8.0v 6.0v 4.0v v gs =3.0v 0.2 0.8 1.4 2 -50 0 50 100 150 t j , junction temperature ( o c) normalized r ds(on) i d =11.5a v gs =10v 0 20 40 60 80 24681 01 2 v gs (v) r ds(on) (m w ) i d =11.5a t c =25c
www.siliconstandard.com 4 of 7 SSM6680GM 12/16/2005 rev.3.01 fig 5. maximum drain current vs. fig 6. typical power dissipation case temperature fig 7. maximum safe operating area fig 8. effective transient thermal impedance 0.01 0.1 1 10 100 0.1 1 10 100 v ds (v) i d (a) t c =25 o c s in g le pulse 100us 1ms 10ms 100ms 1s 10s d c 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t , pulse width (s) normalized thermal response (r thja ) p dm duty factor = t/t peak t j = p dm x r thja + t a r thja =125 o c/w t t 0.02 0.01 0.05 0.1 0.2 duty factor = 0.5 single pulse 0 5 10 15 25 50 75 100 125 150 t c , case temperature ( o c) i d , drain current (a) 0 0.5 1 1.5 2 2.5 3 0 50 100 150 t c , case temperature ( o c) p d (w)
www.siliconstandard.com 5 of 7 SSM6680GM 12/16/2005 rev.3.01 fig 9. gate charge characteristics fig 10. typical capacitance characteristics fig 11. forward characteristic of fig 12. gate threshold voltage vs. reverse diode junction temperature 1 1.5 2 2.5 -50 0 50 100 150 t j , junction temperature ( o c ) v gs(th) (v) 0 3 6 9 12 15 0 10203040 q g , total gate charge (nc) v gs , gate to source voltage (v) i d =11.5a v ds =15v 10 100 1000 10000 1 7 13 19 25 31 v ds (v) c (pf) f =1.0mhz ciss coss crss 0.1 1 10 0 0.4 0.8 1.2 1.6 v sd (v) i s (a) tj=25 o c tj=150 o c
www.siliconstandard.com 6 of 7 SSM6680GM 12/16/2005 rev.3.01 fig 13. switching time circuit fig 14. switching time waveform fig 15. gate charge circuit fig 16. gate charge waveform t d(on) t r t d(off) t f v ds v gs 10% 90% q v g 5v q gs q gd q g charge 0.5 x rated v ds to the oscilloscope - + d g s v ds v gs i d i g 1~ 3 m a 0.5 x rated v ds to the oscilloscope - + 10 v d g s v ds v gs r g r d
www.siliconstandard.com 7 of 7 physical dimensions part marking packing: moisture sensitivity level msl3 3000 pcs in antistatic tape on a 13 inch (330mm) reel packed in a moisture barrier bag (mbb). symbol min max a 1.35 1.75 a1 0.10 0.25 b 0.33 0.51 c 0.19 0.25 d 4.80 5.00 e 3.80 4.00 e 1.27(typ) h 5.80 6.50 l 0.38 1.27 d h e a b a1 c e l dimensions do not include mold protrusions. part number: 6680gm xxxxx x ywwsss date/lot code: (ywwsss) y = last digit of the year ww = week sss = lot code sequence all dimensions in millimeters. ssm 66 8 0 g m 12/16/2005 rev.3.01


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