View SRM2264LM10_3772142.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

000-97-mem-1.0 33 s-mos systems, inc. ? 150 river oaks parkway ? san jose, ca 95134 ? tel: (408) 922-0200 ? fax: (408) 922-0238 srm2264l 10/12 cmos 64k-bit static ram l low supply current l access time 100ns/120ns l 8,192 words 8 bits, asynchronous n description the srm2264l 10/12 is an 8,192-word 8-bit asynchronous, static, random access memory on a monolithic cmos chip. its very low standby power requirement makes it ideal for applications requir- ing non-volatile storage with back-up batteries. the asynchronous and static nature of the memory requires no external clock or refreshing circuit. both the input and output ports are ttl compatible, and the three-state output allows easy expansion of memory capacity. n features ? fast access time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . srm2264l 10 . . . . . . . . . . . . . . . . . 100ns (max) srm2264l 12 . . . . . . . . . . . . . . . . . 120ns (max) ? low supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . standby : 0.5 m a (typ) operation : 47ma (typ) . . . . . . . . . . . . 100ns 45ma (typ) . . . . . . . . . . . . 120ns ? completely static . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . no clock required ? single power supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5v 10% ? ttl compatible inputs and outputs ? three-state output with wired-or capability ? non-volatile storage with back-up batteries ? package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . srm2264l 10/12 . . . . . . . . . . . dip-28 pin (plastic) srm2264lm 10/12 . . . . . . . sop2-28 pin (plastic) srm2264ltm 10/12 . . . . tsop (i)-28 pin (plastic) n block diagram a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 i/o8 cs1 cs2 oe we i/o buffer column gate address buffer memory cell array 128 x 64 x 8 x decoder y decoder cs1, cs2 chip control oe, we chip control 6 7 64 128 64 x 8 8
srm2264l10/12 s-mos systems, inc. ? 150 river oaks parkway ? san jose, ca 95134 ? tel: (408) 922-0200 ? fax: (408) 922-0238 000-97-mem-1.0 34 n pin configuration n pin description n absolute maximum ratings *v i , v i/o (min) = C3v (pulse width is 50ns) n recommended dc operating conditions * if pulse width is less than 50ns, it is C1.0v nc a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o1 i/o2 i/o3 v ss v dd we cs2 a8 a9 a11 oe a10 cs1 i/o8 i/o7 i/o6 i/o5 i/o4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 srm2264l a0 to a12 address input we write enable oe output enable cs1 , cs2 chip select i/o1 to 8 data input/output v dd power supply (+5v) v ss power supply (0v) nc no connection (v ss = 0v) parameter symbol ratings unit supply voltage v dd C0.5 to 7.0 v input voltage* v i C0.5 to 7.0 v input/output voltage* v i/o C0.5 to v dd + 0.3 v power dissipation p d 1.0 w operating temperature t opr 0 to 70 c storage temperature t stg C65 to 150 c soldering temperature and time t sol 260 c, 10s (at lead) (v ss = 0v, t a = 0 to 70 c) parameter symbol min typ max unit supply voltage v dd 4.5 5.0 5.5 v v ss 000v input voltage v ih 2.2 3.5 v dd + 0.3 v v il C0.3* 0 0.8 v
srm2264l10/12 000-97-mem-1.0 35 s-mos systems, inc. ? 150 river oaks parkway ? san jose, ca 95134 ? tel: (408) 922-0200 ? fax: (408) 922-0238 n electrical characteristics l dc electrical characteristics * typical values are measured at t a = 25 c and v dd = 5.0v l terminal capacitance (v dd = 5v 10%, v ss = 0v, t a = 0 to 70 c) parameter symbol conditions srm2264l 10 srm2264l 12 unit min typ* max min typ* max input leakage current i li v i = 0 to v dd C1 1 C1 1 m a standby supply current i dds cs1 = v ih or cs2 = v il 0.5 1.0 0.5 1.0 ma i dds1 cs1 = cs2 3 v dd C 0.2v or cs2 0.2v 0.5 20 0.5 20 m a average operating current i dda v i = v il , v ih i i/o = 0ma, t cyc = min 47824580ma operating supply current i ddo v i = v il , v ih i i/o = 0ma 35603560ma output leakage i lo cs1 = v ih or cs2 = v il or we = v il or oe = v ih , v i/o = 0 to v dd C1 1 C1 1 m a high level output voltage v oh i oh = C1.0ma 2.4 v dd C 0.1 2.4 v dd C 0.1 v low level output voltage v ol i ol = 4.0ma 0.2 0.4 0.2 0.4 v (f = 1mhz, t a = 25 c) parameter symbol conditions min typ max unit address capacitance c add v add = 0v 3 5 pf input capacitance c i v i = 0v 5 6 pf i/o capacitance c i/o v i/o = 0v 6 7 pf
srm2264l10/12 s-mos systems, inc. ? 150 river oaks parkway ? san jose, ca 95134 ? tel: (408) 922-0200 ? fax: (408) 922-0238 000-97-mem-1.0 36 l ac electrical characteristics read cycle write cycle * see next page for test condtions. (v dd = 5v 10%, v ss = 0v, t a = 0 to 70 c) parameter symbol test conditions srm2264l 10 srm2264l 12 unit min max min max read cycle time t rc *1 100 120 ns address access time t acc 100 120 ns cs1 access time t acs1 100 120 ns cs2 access time t acs2 100 120 ns oe access time t oe 5060ns cs1 output set time t clz1 *2 1010ns cs1 output ?oating time t chz1 3540ns cs2 output set time t clz2 1010ns cs2 output ?oating time t chz2 3540ns oe output set time t olz 55ns oe output ?oating time t ohz 3540ns output hold time t oh *1 1010ns (v dd = 5v 10%, v ss = 0v, t a = 0 to 70 c) parameter symbol test conditions srm2264l 10 srm2264l 12 unit min max min max write cycle time t wc *1 100 120 ns chip select time 1 t cw1 8085ns chip select time 2 t cw2 8085ns address enable time t aw 8085ns address setup time t as 00ns write pulse width t wp 6070ns address hold time t wr 00ns input data setup time t dw 5050ns input data hold time t dh 00ns we output ?oating t whz *3 3540ns we output setup time t ow 55ns
srm2264l10/12 000-97-mem-1.0 37 s-mos systems, inc. ? 150 river oaks parkway ? san jose, ca 95134 ? tel: (408) 922-0200 ? fax: (408) 922-0238 *1 read/write cycle test conditions 1. input pulse level: 0.8v to 2.4v 2. t r = t f = 10ns 3. input and output timing reference levels: 1.5v 4. output load i ttl + c l = 100pf *2 read cycle test conditions 1. input pulse level: 0.8v to 2.4v 2. t r = t f = 10ns 3. test circuit test: t chz1 , t chz2 , t ohz both sw1 and sw2 are closed. test: t clz1 , t clz2 , t olz hi-z ? h sw1 is open, sw2 is closed. test: t clz1 , t clz2 , t olz hi-z ? l sw1 is closed, sw2 is open. output turn-on turn-off times 300 w v dd to scope 1 k w 5 pf to output terminal v ss v ss include scope, test, tool capacity sw1 sw2 t ohz t olz oe i/o 1.5v 0.5v hi-z hi-z ? ? 1.5v ? ? 1.5v cs1 cs2 i/o 1.5v t chz1 t clz1 1.5v 0.5v hi-z hi-z ? ? 1.5v ? ? 1.5v 1.5v t clz2 1.5v t chz2 1.5v *3 write cycle test conditions 1. input pulse level: 0.8v to 2.2v 2. t r = t f = 10ns 3. test circuit test: t ow , t whz hi-z ? h and h ? hi-z sw is v dd side test: t ow , t whz hi-z ? l and l ? hi-z sw is v ss side output turn-on turn-off times 300 w v dd to scope 1 k w sw 5 pf to output terminal v ss v ss include scope, test, tool capacity t whz t ow we i/o 0.1v 0.1v 0.1v 0.1v hi? hi? h l 1.5v 1.5v
srm2264l10/12 s-mos systems, inc. ? 150 river oaks parkway ? san jose, ca 95134 ? tel: (408) 922-0200 ? fax: (408) 922-0238 000-97-mem-1.0 38 l timing charts read cycle*1 note: *1. during the read cycle, we must be h. write cycle (1) (cs1 control)*2 note: *2. during write cycle (1) and (2), the output buffer is in high impedance regardless of the oe level. t rc t acc t acs1 t clz1 t acs2 t clz2 t oe t olz t ohz t chz2 t oh t chz1 address cs1 cs2 oe dout t wc t aw t cw1 t as t dw t wr t dh address cs1 cs2 we dout din
srm2264l10/12 000-97-mem-1.0 39 s-mos systems, inc. ? 150 river oaks parkway ? san jose, ca 95134 ? tel: (408) 922-0200 ? fax: (408) 922-0238 write cycle (2) (cs2 control)*2 note: *2. during write cycle (1) and (2), the output buffer is in high impedance regardless of the oe level. write cycle (3) (we control)*3 note: *3. during write cycle (3), the output buffer is in high impedance if the oe level is h. t wc t aw t cw2 t as t wr address cs1 cs2 we dout din t dw t dh t wc t aw t ow t as address cs1 cs2 we dout din t wp t whz t dw t dh t wr
srm2264l10/12 s-mos systems, inc. ? 150 river oaks parkway ? san jose, ca 95134 ? tel: (408) 922-0200 ? fax: (408) 922-0238 000-97-mem-1.0 40 n data retention characteristic with low voltage power supply * t rc = read cycle time l data retention timing (cs1 control) l data retention timing (cs2 control) (t a = 0 to 70 c) parameter symbol conditions min typ max unit data retention supply voltage v ddr 2.0 5.5 v data retention current i ddr v dd = 3v cs1 = cs2 3 v dd C 0.2v or cs2 0.2v 10 m a chip select data hold time t cdr 0ns operation recovery time t r t rc * ns data hold mode t r v dd cs1 t cdr 2.2v 4.5v 4.5v v ddr 3 2.0v cs1 3 v dd ?0.2v 2.2v v dd cs2 data hold mode t r t cdr 0.4v 4.5v 4.5v v ddr 3 2.0v cs2 0.2v 0.4v
srm2264l10/12 000-97-mem-1.0 41 s-mos systems, inc. ? 150 river oaks parkway ? san jose, ca 95134 ? tel: (408) 922-0200 ? fax: (408) 922-0238 n functions l truth table x: h or l : h, l, or hi-z l read data data is able to be read when the address is set while holding cs1 =l, cs2=h, oe =l and we =h. since data i/o terminals are high impedance state when oe =h, the data bus line can be used for any other objective, then access time apparently is able to be cut down. l write data there are four ways of writing data into memory (see timing charts, above): 1. hold cs2=h, we =l set addresses and give l pulse to cs1 . 2. hold cs1 =l, we =l set addresses and give h pulse to cs2. 3. hold cs1 =l, cs2=h set addresses and give l pulse to we . 4. after setting addresses, give l pulse to cs1 , we and give h pulse to cs2. anyway, data on the data i/o terminals are latched up into the srm2264l 10/12 at the end of the period that cs1 , we are l level, and cs2 is h level. as data i/o terminals are in high impedance state when any of cs1 , oe =h, or cs2=l, the contention on the data bus can be avoided. l standby mode when cs1 is h or cs2 is l level, the srm2264l 10/12 is in the standby mode which has data re- taining operation. in this case data i/o terminals are hiCz, and all inputs of addresses, we . when cs1 and cs2 level are in the range over v dd C 0.2v, or cs2 level is in the range under 0.2v, in the srm2264l 10/12 there is almost no current flow except through the high resistance parts of the memory. cs1 cs2 oe we a0 to a12 data i/o mode i dd h x hi-z unselected i dds , i dds1 l hi-z unselected i dds , i dds1 l h x l stable input data write i ddo lhlh stable output data read i ddo l h h h stable hi-z output disable i ddo
srm2264l10/12 s-mos systems, inc. ? 150 river oaks parkway ? san jose, ca 95134 ? tel: (408) 922-0200 ? fax: (408) 922-0238 000-97-mem-1.0 42 n package dimensions * srm2264lm 10/12 has the same electrical characteristics as srm2264l 10/12 . 0.010 0.0010 (0.25 0.03 ) 14 1 0.528 0.004 (13.4 0.1 ) 0.018 0.004 (0.46 0.1 ) 0.600~0.655 (15.24~16.64) 0.100 0.010 (2.54 0.25 ) 0.059 (1.5 ) 15 28 0.024 0.004 (0.6 0.1 ) 0.181 0.004 (4.6 0.1 ) 0.118 min (3.0 min) 0.600 (15.24) 0.0004 0.01 1.472max (37.4max) 1.445 0.004 (36.7 0.1 ) plastic dip-28pin unit: inches (mm) 14 1 0.331 0.004 (8.4 0.1 ) 0.016 0.004 (0.4 0.1 ) 0.050 (1.27) 15 28 0.098 0.006 (2.5 0.15 ) 0.006 0.002 (0.15 0.05 ) 0.008 (0.2) 0.713 max (18.1 max) 0.370 (9.4) 0.465 0.012 (11.8 0.3 ) 0.701 0.004 (17.8 0.1 ) 0.106 (2.7) 0.039 (1.0) plastic sop2-28pin* unit: inches (mm)
srm2264l10/12 000-97-mem-1.0 43 s-mos systems, inc. ? 150 river oaks parkway ? san jose, ca 95134 ? tel: (408) 922-0200 ? fax: (408) 922-0238 n characteristic curves i ol ? ol 10 5 0.5 1.0 (ma) (v) v dd = 4.5v ta = 25 c normalized t acc ? acs ?a 1.1 1.0 0.9 0.8 0.7 0 20406080( c) v dd = 4.5v c l = 100pf normalized t acc ? acs ? dd 1.2 1.1 1.0 0.9 0.8 4566(v) ta = 25 c c l = 100pf i oh ? oh 10 5 v dd = 4.5v ta = 25 c 01234 (v) (ma) 5 normalized i dds1 ?a 02040 ( c) 60 10 5 1.0 0.5 v dd = 5.5v cs = v dd ?0.2v normalized i dds1 ? dd 4.0 3.0 2.0 1.0 0.4 34567 (v) ta = 25 c cs = v dd ?0.2v normalized i dda ? cycle 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 v dd = 5.5v ta = 25 c 100 200 300 500 700 1,000 (ns) ( c) normalized i dda ? a 1.1 1.0 0.9 0.8 0.7 v dd = 5.5v t cyc = min 0 204060 normalized i dda ? dd 1.2 1.0 0.8 0.6 0.4 0.2 ta = 25 c t cyc = min 34567(v) 0 0 0
s-mos systems, inc. ? 150 river oaks parkway ? san jose, ca 95134 ? tel: (408) 922-0200 ? fax: (408) 922-0238 000-97-mem-1.0 44 this page intentionally blank

▲Up To Search▲

Price & Availability of SRM2264LM10

	To Download SRM2264LM10 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .