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october 2007 rev 2 1/17 17 tsc101 high side current sense amplifier features independent supply and input common-mode voltages wide common-mode operating range: 2.8 to 30v wide common-mode surviving range: -0.3 to 60v (load-dump) wide supply voltage range: 4 to 24v low current consumption: i cc max = 300a internally fixed gain: 20v/v, 50v/v or 100v/v buffered output applications automotive current monitoring notebook computers dc motor control photovoltaic systems battery chargers precision current sources description the tsc101 measures a small differential voltage on a high-side shunt resistor and translates it into a ground-referenced output voltage. the gain is internally fixed. wide input common-mode voltage range, low quiescent current, and tiny sot23 packaging enable use in a wide variety of applications. input common-mode and power supply voltages are independent. common-mode voltage can range from 2.8v to 30v in operating conditions and up to 60v in absolute maximum ratings. current consumption lower than 300a and wide supply voltage range allow to connect the power supply to either side of the current measurement shunt with minimal error. l sot23-5 (plastic package) 2 1 3 v p ou t gnd 4 5 vm vcc pin connections (top view) www.st.com
application schematics and pin description tsc101 2/17 1 application schematics and pin description the tsc101 high-side current-sense amplifier features a 2.8v to 30v input common-mode range that is independent of supply voltage. the main advantage of this feature is to allow high-side current sensing at voltages much greater than the supply voltage (v cc ). figure 1. application schematics ta bl e 1 describes the function of eac h pin. the pin positions are shown in the illustration on the cover page and in figure 1 above. table 1. pin descriptions symbol type function out analog output the output voltage, proportional to the magnitude of the sense voltage v p -v m . gnd power supply ground line. v cc power supply positive power supply line. v p analog input connection for the external sense resistor. the measured current enters the shunt on the v p side. v m analog input connection for the external sense resistor. the measured current exits the shunt on the v m side. v s en s e v out =av.v s en s e 4 3 1 2 v p v m o u t gnd 5 v cc lo a d i load 2.8v to 3 0v rg1 rg2 rg 3 r s en s e 4v to 24v
tsc101 absolute maximum rati ngs and operating conditions 3/17 2 absolute maximum ratings and operating conditions table 2. absolute maximum ratings symbol parameter value unit v id input pins differential voltage (v p -v m )60v v i input pin voltages (v p and v m ) (1) 1. voltage values are measured with respect to the ground pin. -0.3 to 60 v v cc dc supply voltage (1) -0.3 to 25 v v out dc output pin voltage (1) -0.3 to v cc v t stg storage temperature -55 to 150 c t j maximum junction temperature 150 c r thja sot23-5 thermal resistance ju nction to ambient 250 c/w esd hbm: human body model (2) 2. human body model: a 100pf capacitor is charged to the specified voltage, then discharged through a 1.5k resistor between two pins of the device. this is done for all couples of connected pin combinations while the other pins are floating. 2.5 kv mm: machine model (3) 3. machine model: a 200pf capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (int ernal resistor < 5 ). this is done for all couples of connected pin combinations whil e the other pins are floating. 150 v table 3. operating conditions symbol parameter value unit v cc dc supply voltage from t min to t max 4.0 to 24 v t oper operational temperature range (t min to t max ) -40 to 125 c v icm common mode voltage range 2.8 to 30 v
electrical characteristics tsc101 4/17 3 electrical characteristics table 4. supply (1) symbol parameter test conditions min. typ. max. unit i cc total supply current v sense =0v t min < t amb < t max 165 300 a 1. unless otherwise specified, the test conditions are t amb =25c, v cc =12v, v sense =v p -v m =50mv, v m =12v, no load on out. table 5. input (1) symbol parameter test conditions min. typ. max. unit cmr common mode rejection variation of v out versus v icm referred to input (2) 2.8v< v icm < 30v t min < t amb < t max 90 105 db svr supply voltage rejection variation of v out versus v cc (3) 4.0v< v cc < 24v v sense =30mv t min < t amb < t max 90 105 db v os input offset voltage (4) t amb = 25 c t min < t amb < t max 0.2 0.9 1.5 2.3 mv dv os /dt input offset drift vs. t t min < t amb < t max -3 v/c i lk input leakage current v cc = 0v t min < t amb < t max 1a i ib input bias current v sense = 0v t min < t amb < t max 5.5 8 a 1. unless otherwise specified, the test conditions are t amb =25c, v cc =12v, v sense =v p -v m =50mv, v m =12v, no load on out. 2. see common mode rejection ratio (cmr) on page 11 for the definition of cmr. 3. see supply voltage rejection ratio (svr) on page 11 for the definition of svr. 4. see gain (av) and input offset voltage (v os ) on page 11 for the definition of v os .
tsc101 electrical characteristics 5/17 table 6. output (1) symbol parameter test conditions min. typ. max. unit av gain tsc101a tsc101b tsc101c 20 50 100 v/v av gain accuracy t amb =25c t min < t amb < t max 2.5 4.5 % v out / t output voltage drift vs. t (2) t min < t amb < t max 0.4 mv/c v out / i out output stage load regulation -10ma < i out <10ma i out sink or source current 34mv/ma v out total output voltage accuracy (3) v sense =50mv t amb =25 c t min < t amb < t max 2.5 4.5 % v out total output voltage accuracy v sense =100mv t amb =25 c t min < t amb < t max 3.5 5 % v out total output voltage accuracy v sense =20mv t amb =25 c t min < t amb < t max 8 11 % v out total output voltage accuracy v sense =10mv t amb =25 c t min < t amb < t max 15 20 % i sc-sink short-circuit sink current out connected to v cc, v sense =-1v 30 60 ma i sc-source short-circuit source current out connected to gnd v sense =1v 15 26 ma v oh output stage high-state saturation voltage v oh =v cc -v out v sense =1v i out =1ma 0.8 1 v v ol output stage low-state saturation voltage v sense =-1v i out =1ma 50 100 mv 1. unless otherwise specified, the test conditions are t amb =25c, v cc =12v, v sense =v p -v m =50mv, v m =12v, no load on out. 2. see output voltage drift versus temperature on page 12 for the definition. 3. output voltage accuracy is the difference with the expected theoretical output voltage v out-th =av*v sense . see output voltage accuracy on page 13 for a more detailed definition.
electrical characteristics tsc101 6/17 electrical characteristics curves in all of the electrical characteristics curves that follow, the tested device is a tsc101c, and the test conditions are t amb =25c, v cc =12v, v sense =v p -v m =50mv, v m =12v, no load on out unless otherwise specified. table 7. frequency response (1) symbol parameter test conditions min. typ. max. unit ts output settling to 1% final value v sense =10mv to 100mv, c load =47pf tsc101a tsc101b tsc101c 3 6 10 s sr slew rate v sense =10mv to 100mv 0.55 0.9 v/s bw 3db bandwidth c load =47pf, v sense =100mv tsc101a tsc101b tsc101c 500 670 450 khz 1. unless otherwise specified, the test conditions are t amb =25c, v cc =12v, v sense =v p -v m =50mv, v m =12v, no load on out. table 8 .noise (1) symbol parameter test conditions min. typ. max. unit total output voltage noise 50 nv/ hz 1. unless otherwise specified, the test conditions are t amb =25c, v cc =12v, v sense =v p -v m =50mv, v m =12v, no load on out.
tsc101 electrical characteristics 7/17 figure 2. supply current vs. supply voltage (v sense = 0v) figure 3. supply current vs. v sense figure 4. v p pin input bias current vs. v sense figure 5. v m pin input bias current vs. v sense figure 6. minimum common mode operating voltage vs. temperature 100 120 140 160 180 200 220 240 260 0 5 10 15 20 25 30 v cc (v) i cc (a) t=- 40c t=25c t=125c 0 50 100 150 200 250 300 350 400 450 500 -120 -80 -40 0 40 80 120 v sense (mv) i cc (a) t=- 40c t=25c t=125c 0 5 10 15 20 25 30 35 40 45 -120 -80 -40 0 40 80 120 v sense (mv) i ib (a) t=- 40c t=25c t=125c 0 1 2 3 4 5 6 7 8 9 10 -120 -80 -40 0 40 80 120 v sense (mv) i ib (a) t=- 40c t=25c t=125c 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 -50 -25 0 25 50 75 100 125 t (c) voltage (v) v cc =5v v cc =12v
electrical characteristics tsc101 8/17 figure 7. output stage low-state saturation voltage versus output current (v sense =-1v) figure 8 . output stage high-state saturation voltage versus output current (v sense =+1v) -50 0 50 100 150 200 250 300 350 400 -10 -5 0 5 10 i out (ma) v ol (mv) output stage sinking current output stage sourcing cu rr e n t t=- 40c t=25c t=125c 0 500 1000 1500 2000 -10 -5 0 5 10 i out (ma) v oh (mv) output stage sinking current output stage sourcing current t=- 40c t=25c t=125c figure 9. output short-circuit source current versus temperature (out pin connected to ground) figure 10. output short-circuit sink current versus temperature (out pin connected to v cc ) figure 11. output stage load regulation 20 22 24 26 28 30 32 34 -50 -25 0 25 50 75 100 125 t (c) i out (a) 50 52 54 56 58 60 62 64 66 68 70 -50 -25 0 25 50 75 100 125 t (c) i out (a) -50 -40 -30 -20 -10 0 10 -10 -5 0 5 10 i out (ma) v out -v out0 (mv) output stage sinking current output stage sourcing current t=- 40c t=25c t=125c
tsc101 electrical characteristics 9/17 figure 12. input offset drift versus temperature figure 13. output voltage drift versus temperature -500 -400 -300 -200 -100 0 100 200 300 -50 -25 0 25 50 75 100 125 t (c) v os - v os (25c) (v) -60 -40 -20 0 20 40 60 80 -50 -25 0 25 50 75 100 125 t (c) v out - v out (25c) (mv) figure 14. bode diagram (v sense =100mv) figure 15. power-supply rejection ratio versus frequency figure 16. total output voltage accuracy versus v sense -50 -40 -30 -20 -10 0 10 20 30 40 50 1.e+03 1.e+04 1.e+05 1.e+06 1.e+07 frequency (hz) gain (db) tsc101c tsc101b tsc101a 40 50 60 70 80 90 100 110 1.e+01 1.e+02 1.e+03 1.e+04 1.e+05 frequency (hz) psrr (db) 1% 10% 100% 0 102030405060708090100 v sense (mv) v out accuracy t=25c t min < t < t max
electrical characteristics tsc101 10/17 figure 17. output voltage versus v sense figure 1 8 . output voltage versus v sense (detail for low v sense values) figure 19. step response 0 2 4 6 8 10 12 -100 0 100 200 300 400 500 600 700 v sense (mv) vout (v) tsc101c tsc101b tsc101a 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 -4 -2 0 2 4 6 8 10 12 14 16 18 20 v sense (mv) vout (v) tsc101a tsc101b tsc101c vsense 100mv/div vout 2v/div timebase 5s/div tsc101a tsc101b tsc101c
tsc101 parameter definitions 11/17 4 parameter definitions common mode rejection ratio (cmr) the common-mode rejection ratio (cmr) meas ures the ability of the current-sensing amplifier to reject any dc voltage applied on both inputs v p and v m . the cmr is referred back to the input so that its effect can be compared with the applied differential signal. the cmr is defined by the formula: supply voltage rejection ratio (svr) the supply-voltage rejection ratio (svr) me asures the ability of the current-sensing amplifier to reject any variat ion of the supply voltage v cc . the svr is referred back to the input so that its effect can be compared with the applied differential signal. the svr is defined by the formula: gain (av) and input offset voltage (v os ) the input offset voltage is defined as the intersection between the linear regression of the v out versus v sense curve with the x-axis (see figure 20 ). if v out1 is the output voltage with v sense =v sense1 =50mv and v out2 is the output voltage with v sense =v sense2 =5mv, then v os can be calculated with the following formula: the amplification gain a v is defined as the ratio between output voltage and input differential voltage: cmr 20 ? v out v icm av ? ------------------------------ log ? = svr 20 ? v out v cc av ? ----------------------------- - log ? = v os v sense1 v sense1 v sense2 ? v out1 v out2 ? ----------------------------------------------- - v out1 ? ?? ?? ? = av v out v sense ----------------- - =
parameter definitions tsc101 12/17 figure 20. v out versus v sense characteristics: detail for low v sense values output voltage drift versus temperature the output voltage drift versus temperature is defined as the maximum variation of v out with respect to its value at 25c, over the temperature range. it is calculated as follows: with t min < t amb < t max . figure 21 provides a graphical definition of output voltage drift versus temperature. on this chart, v out is always comprised in the area defined by dotted lines representing the maximum and minimum variation of v out versus t. figure 21. output voltage drift versus temperature v o s 5mv 50mv v s en s e v o u t1 v o u t2 v out t ---------------- -max v out t amb () v out 25 c () ? t amb 25 c ? -------------------------------------------------------------------------- = -60 -40 -20 0 20 40 60 80 -50 -25 0 25 50 75 100 125 t (c) v out - v out (25c) (mv)
tsc101 parameter definitions 13/17 output voltage accuracy the output voltage accuracy is the difference between the actual output voltage and the theoretical output voltage. ideally, the current sensing output voltage should be equal to the input differential voltage multiplied by the theoretical gain, as in the following formula: v out-th =a v . v sense the actual value is very slightly different, mainly due to the effects of: the input offset voltage v os , non-linearity figure 22. v out vs. v sense theoretical and actual characteristics the output voltage accuracy, expressed in percentage, can be calculated with the following formula: with a v =20v/v for tsc101a, a v =50v/v for tsc101b and a v =100v/v for tsc101c. v o u t a cc u r a cy for v s en s e = 10mv v s en s e v o u t 10mv ide a l a ct ua l v out abs v out a v v sense ? () ? () a v v sense ? -------------------------------------------------------------------------- =
application information tsc101 14/17 5 application information the tsc101 can be used to measure current and to feed back the information to a microcontroller, as shown in figure 23 . figure 23. typical application schematic the current from the supply flows to the load through the r sense resistor causing a voltage drop equal to v sense across r sense . the amplifier input currents are negligible, therefore its inverting input voltage is equal to v m . the amplifier's open-loop gain forces its non-inverting input to the same voltage as the inverting input. as a consequence, the amplifier adjusts current flowing through rg1 so that the voltage drop across rg1 exactly matches v sense . therefore, the drop across rg1 is: v rg1 =v sense =r sense .i load if i rg1 is the current flowing through rg1, then i rg1 is given by the formula: i rg1 =v sense /rg1 the i rg1 current flows entirely into resistor r g3 (the input bias current of the buffer is negligible). therefore, the voltage drop on the r g3 resistor can be calculated as follows: v rg3 =r g3 .i rg1 =(r g3 /r g1 ).v sense because the voltage across the r g3 resistor is buffered to the out pin, v out can be expressed as: v out =(r g3 /r g1 ).v sense or v out =(r g3 /r g1) .r sense .i load the resistor ratio r g3 /r g1 is internally set to 20v/v for tsc101a, to 50v/v for tsc101b and to 100v/v for tsc101c. the r sense resistor and the r g3 /r g1 resistor ratio (equal to a v ) are important parameters because they define the full scale output range of your application. therefore, they must be selected carefully. 5v v s en s e v out lo a d i load 2.8v to 3 0v r s en s e v reg v p v m o u t gnd v cc rg1 rg2 rg 3 t s c101 microcontroller adc gnd v cc
tsc101 package information 15/17 6 package information in order to meet environmental requirements, stmicroelectronics offers these devices in ecopack ? packages. these packages have a lead-free second level interconnect. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. th e maximum ratings re lated to soldering conditions are also marked on the inner box label. ecopack is an stmicroelectronics trademark. ecopack specifications are available at: www.st.com . figure 24. sot23-5 package ref. dimensions millimeters mils min. typ. max. min. typ. max. a 0.90 1.45 35.4 57.1 a1 0.00 0.15 0.00 5.9 a2 0.90 1.30 35.4 51.2 b 0.35 0.50 13.7 19.7 c 0.09 0.20 3.5 7.8 d 2.80 3.00 110.2 118.1 e 2.60 3.00 102.3 118.1 e1 1.50 1.75 59.0 68.8 e 0.95 37.4 e1 1.9 74.8 l 0.35 0.55 13.7 21.6
ordering information tsc101 16/17 7 ordering information 8 revision history table 9. order codes part number temperature range package packaging marking gain tsc101ailt -40c, +125c sot23-5 tape & reel o104 20 tsc101bilt o105 50 tsc101cilt o106 100 tsc101aiylt (1) -40c, +125c sot23-5 (automotive grade) tape & reel o101 20 TSC101BIYLT (1) o102 50 tsc101ciylt (1) o103 100 1. qualification and characteri zation according to aec q100 and q003 or equi valent, advanced screening according to aec q001 & q 002 or equivalent are on-going. table 10. document revision history date revision changes 5-mar-2007 rev 1 first release, preliminary data. 22-oct-2007 rev 2 document status prom oted from preliminar y data to datasheet. added test results in electrical characteristics tables. added electrical characteristics curves.
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