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omnidirectional microphone with bottom port and i 2 s digital output data sheet admp441 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2011C2012 analog devices, inc. all rights reserved. features digital i2s interface with high precision 24-bit data high snr of 61 dba high sensitivity of ?26 dbfs flat frequency response from 60 hz to 15 khz low current consumption of 1.4 ma high psr of ?75 dbfs small 4.72 mm 3.76 mm 1 mm surface-mount package compatible with sn/pb and pb-free solder processes rohs/weee compliant applications teleconferencing systems gaming consoles mobile devices laptops tablets security systems functional block diagram admp441 adc power management sck sd ws gnd gnd gnd v dd filter i 2 s serial port hardware control l/r chipen 09568-001 figure 1. bottom top 09568-015 figure 2. isometric views of admp441 microphone package general description the admp441 1 is a high performance, low power, digital output, omnidirectional mems microphone with a bottom port. the complete admp441 solution consists of a mems sensor, signal conditioning, an analog-to-digital converter, antialiasing filters, power management, and an industry standard 24-bit i2s inter- face. the i2s interface allows the admp441 to connect directly to digital processors, such as dsps and microcontrollers, with- out the need for an audio codec in the system. the admp441 has a high snr and high sensitivity, making it an excellent choice for far field applications. the admp441 has a flat wideband frequency response, resulting in natural sound with high intelligibility. a built-in particle filter provides high reliability. the admp441 is available in a thin 4.72 mm 3.76 mm 1 mm surface-mount package. it is reflow solder compatible with no sensitivity degradation. the admp441 is halide free. 1 protected by u.s. patents 7,449,356; 7,825,484; 7, 885,423; and 7,961,897. other patents are pending.
admp441 data sheet rev. a | page 2 of 16 table of contents features .............................................................................................. 1 ? applications....................................................................................... 1 ? functional block diagram .............................................................. 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications..................................................................................... 3 ? i2s digital input/output.............................................................. 4 ? timing diagram ........................................................................... 4 ? absolute maximum ratings............................................................ 5 ? esd caution.................................................................................. 5 ? pin configuration and function descriptions............................. 6 ? typical performance characteristics ............................................. 7 ? theory of operation ........................................................................ 8 ? understanding sensitivity ............................................................8 ? power management ......................................................................8 ? startup.............................................................................................8 ? i2s data interface ..........................................................................8 ? digital filter characteristics ..................................................... 10 ? applications information .............................................................. 11 ? power supply decoupling ......................................................... 11 ? handling instructions................................................................ 11 ? supporting documentation...................................................... 11 ? layout and design recommendations........................................ 12 ? outline dimensions ....................................................................... 13 ? ordering guide .......................................................................... 13 ? revision history 1/12rev. 0 to rev. a changes to circuit note title ....................................................... 11 updated outline dimensions ....................................................... 13 deleted figure 18............................................................................ 13 10/11revision 0: initial version
data sheet admp441 rev. a | page 3 of 16 specifications t a = 25c, v dd = 2.4 v, sck = 3.072 mhz, spl = 104 db (3.16 pa rms), unless otherwise noted. all minimum and maximum specifications are guaranteed. typical specifications are not guaranteed. table 1. parameter symbol test conditions/comments min typ max unit performance directionality omni sensitivity at 94 db spl 1 1 khz, 104 db spl ?29 ?26 ?23 dbfs signal-to-noise ratio snr 20 khz bandwidth, a-weighted 61 dba equivalent input noise ein 20 khz bandwidth, a-weighted 33 dba spl dynamic range derived from ein and maximum acoustic input 87 db frequency response 2 low frequency C3 db point 60 hz high frequency C3 db point 15 khz deviation limits from flat response within pass band ?3/+2 db total harmonic distortion thd 104 db spl 3 % power supply rejection psr 217 hz, 100 mv p-p square wave superimposed on v dd ?75 dbfs maximum acoustic input peak 120 db spl noise floor 20 hz to 20 khz, a-weighted, rms ?87 dbfs power supply supply voltage v dd 1.8 3.3 v supply current i dd v dd = 1.8 v normal mode 1.4 1.6 ma standby 0.8 ma power-down 2 a v dd = 3.3 v normal mode 2.2 2.5 ma standby 0.8 ma power-down 4.5 a digital filter group delay 17.25/f s sec f s = 48 khz 359 s f s = 16 khz 1078 s pass-band ripple 0.04 db stop-band attenuation 60 db pass band 0.423 f s 20.3 khz 1 the peak-to-peak amplitude is relative to peak-to-peak amplitude of 2 24 ? 1. the stimulus is a 104 db spl sinusoid ha ving rms amplitude of 3.1623 pa. sensitivity is relative to 1 pa. 2 see figure 6 and figure 8.
admp441 data sheet rev. a | page 4 of 16 i2s digital input/output C40c < t a < +85c, 1.8 v < v dd < 3.3 v, unless otherwise noted. table 2. limit 1 parameter symbol test conditions/comments min max unit digital input voltage input low (l/r, ws, sck) v il 0 0.25 v dd v voltage input high (l/r, ws, sck) v ih 0.7 v dd v dd v sd digital output voltage output low v ol v dd = 1.8 v, i sink = 0.25 ma 0.1 v dd v voltage output low v ol v dd = 1.8 v, i sink = 0.7 ma 0.3 v dd v voltage output high v oh v dd = 1.8 v, i sink = 0.7 ma 0.7 v dd v voltage output high v oh v dd = 1.8 v, i sink = 0.25 ma 0.9 v dd v voltage output low v ol v dd = 3.3 v, i sink = 0.5 ma 0.1 v dd v voltage output low v ol v dd = 3.3 v, i sink = 1.7 ma 0.3 v dd v voltage output high v oh v dd = 3.3 v, i sink = 1.7 ma 0.7 v dd v voltage output high v oh v dd = 3.3 v, i sink = 0.5 ma 0.9 v dd v 1 limits based on characterization results; not production tested. table 3. serial data port timing specifications parameter description min max unit t sch sck high 50 ns t scl sck low 50 ns t scp sck period 312 ns f sck sck frequency 0.5 3.2 mhz t wss ws setup 0 ns t wsh ws hold 20 ns f ws ws frequency 7.8 49.3 khz timing diagram sc k ws sd t scp t sch t scl t wsh t wss 09568-103 figure 3. serial data port timing
data sheet admp441 rev. a | page 5 of 16 absolute maximum ratings table 4. parameter rating supply voltage (v dd ) ?0.3 v to +3.6 v sound pressure level 160 db mechanical shock 10,000 g vibration per mil-std-883 method 2007, test condition b operating temperature range ?40c to +85c digital pin input voltage ?0.3 v to v dd + 0.3 v or 3.6 v, whichever is less stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution t p t l t 25c to peak t s preheat critic a lzon e t l to t p temper a ture time ramp-down ramp-up t smin t smax t p t l 09568-002 figure 4. recommended soldering profile limits table 5. recommended soldering profile limits profile feature sn63/pb37 pb-free average ramp rate (t l to t p ) 1.25c/sec max 1.25c/sec max preheat minimum temperature (t smin ) 100c 100c maximum temperature (t smax ) 150c 200c time (t smin to t smax ), t s 60 sec to 75 sec 60 sec to 75 sec ramp-up rate (t smax to t l ) 1.25c/sec 1.25c/sec time maintained above liquidous (t l ) 45 sec to 75 sec ~50 sec liquidous temperature (t l ) 183c 217c peak temperature (t p ) 215c +3c/?3c 260c +0c/?5c time within 5c of actual peak temperature (t p ) 20 sec to 30 sec 20 sec to 30 sec ramp-down rate 3c/sec max 3c/sec max time 25c (t 25c ) to peak temperature 5 minute max 5 minute max
admp441 data sheet rev. a | page 6 of 16 pin configuration and fu nction descriptions 4 l/r 6 gnd 5 gnd 3 ws 7 v dd 2 sd 8 chipen 1 sck 9 gnd bottom view (not to scale) a dmp441 09568-003 figure 5. pin configuration table 6. pin function descriptions pin o. nemonic tpe description 1 sck input serial data clock for i2s interface. 2 sd output serial data output for i2s interface. this pin tr istates when not actively driving the appropriate output channel. the sd trace should have a 100 k pull-down resistor to discharge the line during the time that all microphones on th e bus have tristated their outputs. 3 ws input serial data-word select for i2s interface. 4 l/r input left/right channel select. when set low, the microphone outputs its signal in the left channel of the i2s frame; when set high, the microphone outputs its signal in the right channel. 5 gnd ground ground. connect to ground on the pcb. 6 gnd ground ground. connect to ground on the pcb. 7 v dd power power, 1.8 to 3.3 v. this pin should be decoupled to pin 6 with a 0.1 f capacitor. 8 chipen input microphone enable. when set low (ground), the mic rophone is disabled and put in power-down mode. when set high (v dd ), the microphone is enabled. 9 gnd ground ground. connect to ground on the pcb.
data sheet admp441 rev. a | page 7 of 16 typical performance characteristics 10 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 50 100 10k frequency (hz) sensitivity (db) 1k 09568-009 figure 6. frequency response mask 0 ?80 100 10k frequency (hz) psr (db) 1k ?10 ?20 ?30 ?40 ?50 ?60 ?70 09568-010 figure 7. typical power supply rejection vs. frequency 10 ?20 ?10 0 10 100 10k frequency (hz) amplitude (db) 1k 09568-011 figure 8. typical frequency response (measured)
admp441 data sheet rev. a | page 8 of 16 theory of operation the admp441 is a high performance, low power, digital output, omnidirectional mems microphone with a bottom port. the complete admp441 solution consists of a mems sensor, signal conditioning, an analog-to-digital converter, anti- aliasing filters, power management, and an industry standard 24-bit i2s interface. the admp441 complies with the tia-920 telecommunications telephone terminal equipment transmission requirements for wideband digital wireline telephones standard. understanding sensitivity the casual user of digital microphones may have difficulty understanding the sensitivity specification. unlike an analog microphone (whose specification is easily confirmed with an oscilloscope), the digital microphone output has no obvious unit of measure. the admp441 has a nominal sensitivity of ?26 dbfs at 1 khz with an applied sound pressure level of 94 db. the units are in decibels referred to full scale. the admp441 default full-scale peak output word is 2 23 C 1 (integer representation), and ?26 dbfs of that scale is (2 23 ? 1) 10 (?26/20) = 420,426. a pure acoustic tone at 1 khz having a 1 pa rms amplitude results in an output digital signal whose peak amplitude is 420,426. although the industry uses a standard specification of 94 db spl, the admp441 test method applies a 104 db spl signal. the higher sound pressure level reduces noise and improves repeatability. the admp441 has excellent gain linearity, and the sensitivity test result at 94 db is derived with very high confidence from the test data. power management the admp441 has three different power states: normal operation, standby mode, and power-down mode. normal operation the microphone becomes operational 2 18 clock cycles (85 ms with sck at 3.072 mhz) after initial power-up. the chipen pin then controls the power modes. the part is in normal opera- tion mode when sck is active and the chipen pin is high. standby mode the microphone enters standby mode when the serial data clock sck stops and chipen is high. normal operation resumes 2 14 clock cycles (5 ms with sck at 3.072 mhz) after sck restarts. the admp441 should not be transitioned from standby to power-down mode, or vice versa. standby mode is only intended to be entered from the normal operation state. power-down mode the microphone enters power-down mode when chipen is low, regardless of the sck operation. normal mode operation resumes 2 17 sck clock cycles (43 ms with sck at 3.072 mhz) after chipen returns high while sck is active. it always takes 2 17 clock cycles to restart the admp441 after v dd is applied. it is not recommended to supply active clocks (ws and sck) to the admp441 while there is no power supplied to v dd . doing this continuously turns on esd protection diodes, which may affect long-term reliability of the microphone. startup the microphones have zero output for the first 2 18 sck clock cycles (85 ms with sck at 3.072 mhz) following power-up. i2s data interface the slave serial data ports format is i2s, 24-bit, twos comple- ment. there must be 64 sck cycles in each ws stereo frame, or 32 sck cycles per data-word. the l/r control pin determines whether the admp441 outputs data in the left or right channel. for a stereo application, the sd pins of the left and right admp441 microphones should be tied together as shown in figure 9 . the format of a stereo i2s data stream is shown in figure 10 . figure 11 and figure 12 show the formats of a mono microphone data stream for left and right microphones, respectively. data output mode the output data pin (sd) is tristated when it is not actively driving i2s output data. sd immediately tristates after the lsb is output so that another microphone can drive the common data line. the sd trace should have a pull-down resistor to discharge the line during the time that all microphones on the bus have tristated their outputs. a 100 k resistor is sufficient for this, as shown in figure 9 . data-word length the output data-word length is 24 bits per channel. the admp441 must always have 64 clock cycles for every stereo data-word (f sck = 64 f ws ). data-word format the default data format is i2s (twos complement), msb-first. in this format, the msb of each word is delayed by one sck cycle from the start of each half-frame.
data sheet admp441 rev. a | page 9 of 16 sck ws sd system master (dsp, microcontroller, codec) chipen sck ws l/r sd v dd left admp441 gnd gnd gnd 0.1f from voltage regulator (1.8v to 3.3v) chipen sck ws l/r sd v dd right admp441 gnd gnd gnd 0.1f 100k ? 09568-004 v dd v dd figure 9. system block diagram msb lsb left channel msb lsb right channel high-z high-z high-z 1 2 3 4 24 25 26 32 33 34 35 36 56 57 58 64 ws s ck (64 f s ) sd (24-bit) 09568-005 figure 10. stereo output i2s format msb lsb left channel high-z high-z 1 2 3 4 24 25 26 32 33 34 35 36 56 57 58 64 ws s ck (64 f s ) sd (24-bit) 09568-006 figure 11. mono output i2s form at left channel (l/r = 0) msb lsb right channel high-z high-z 1 2 3 4 24 25 26 32 33 34 35 36 56 57 58 64 ws s ck (64 f s ) sd (24-bit) 09568-007 figure 12. mono output i2s format right channel (l/r = 1)
admp441 data sheet rev. a | page 10 of 16 digital filter characteristics the admp441 has an internal digital band-pass filter. a high-pass filter eliminates unwanted low frequency signals. a low-pass filter allows the user to scale the pass band with the sampling frequency as well as perform required noise reduction. high pass filter the admp441 incorporates a high-pass filter to remove unwanted dc and very low frequency components. table 7 shows the high- pass characteristics for a nominal sampling rate of 48 khz. the cutoff frequency scales with changes in sampling rate. table 7. high-pass filter characteristics frequency attenuation 3.7 hz C3.0 db 10.4 hz C0.5 db 21.6 hz C0.1 db this digital filter response is in addition to the natural high- pass response of the admp441 mems acoustic transducer that has a ?3 db cutoff of 60 hz. low-pass filter the analog-to-digital converter in the admp441 is a single-bit, high order, sigma-delta (-) running at a high oversampling ratio. the noise shaping of the converter pushes the majority of the noise well above the audio band and gives the microphone a wide dynamic range. however, it does require a good quality low-pass filter to eliminate the high frequency noise. figure 13 shows the response of this digital low-pass filter included in the microphone. the pass band of the filter extends to 0.423 f s and, in that band, has an unnoticeable 0.04 db of ripple. the high frequency cutoff of ?6 db occurs at 0.5 f s . a 48 khz sampling rate results in a pass band of 20.3 khz and a half amplitude corner at 24 khz; the stop-band attenuation of the filter is greater than 60 db. note that these filter specifica- tions scale with sampling frequency. ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 magnitude (db) normalized frequency ( f s ) 09568-008 figure 13. digital low-pass filter magnitude response
data sheet admp441 rev. a | page 11 of 16 applications information power supply decoupling for best performance and to avoid potential parasitic artifacts, placing a 0.1 f ceramic type x7r or better capacitor between pin 7 (v dd ) and ground is strongly recommended. the capacitor should be placed as close to pin 7 as possible. the connections to each side of the capacitor should be as short as possible, and the trace should stay on a single layer with no vias. for maximum effectiveness, locate the capacitor equidistant from the power and ground pins or, when equidistant placement is not possible, slightly closer to the power pin. thermal connec- tions to the ground planes should be made on the far side of the capacitor, as shown in figure 14 . v dd gnd to gnd to v dd c a pacitor 09568-012 figure 14. recommended power su pply bypass capacitor layout handling instructions pick-and-place equipment the mems microphone can be handled using standard pick- and-place and chip shooting equipment. care should be taken to avoid damage to the mems microphone structure as follows: ? use a standard pickup tool to handle the microphone. because the microphone hole is on the bottom of the package, the pickup tool can make contact with any part of the lid surface. ? use care during pick-and-place to ensure that no high shock events above 10,000 g are experienced because such events may cause damage to the microphone. ? do not pick up the microphone with a vacuum tool that makes contact with the bottom side of the microphone. do not pull air out of or blow air into the microphone port. ? do not use excessive force to place the microphone on the pcb. reflow solder for best results, the soldering profile should be in accordance with the recommendations of the manufacturer of the solder paste used to attach the mems microphone to the pcb. it is recommended that the solder reflow profile does not exceed the limit conditions specified in figure 4 and table 5 . board wash when washing the pcb, ensure that water does not make contact with the microphone port. blow-off procedures and ultrasonic cleaning must not be used. supporting documentation evaluation board user guide ug-303, eval-admp441-flex: bottom-port i 2 s output mems microphone evaluation board circuit note cn-0208, high performance digital mems microphones simple interface to sigmadsp audio processor with i 2 s output application notes an-1112 application note , microphone specifications and ter ms e xplained an-1003 application note , recommendations for mounting and connecting analog devices, inc., bottom-ported mems microphones an-1068 application note , reflow soldering of the mems microphone an-1124 application note , recommendations for sealing analog devices, inc., bottom-port mems microphones from dust and liquid ingress for additional information, visit www.analog.com/mic .
admp441 data sheet rev. a | page 12 of 16 layout and desig n recommendations dimensions shown in millimeters 1.33 (2) 2.66 (4) 0.40 0.60 (8) 0.96 1.56 3.16 1.05 (6) 09568-013 0.25 dia. (thru hole) figure 15. recommended printed circuit board land pattern (dimensions shown in millimeters) dimensions shown in millimeters 1.33 (2) 3.76 0.20 2.66 (4) 0.350 0.550 (8) 1.6 4.72 1.07 1.05 (6) 1.05 09568-014 figure 16. recommended printed circui t board solder paste mask pattern (dimensions shown in millimeters)
data sheet admp441 rev. a | page 13 of 16 outline dimensions 12-19-2011-b 3.86 3.76 3.66 4.82 4.72 4.62 bottom view top view side view 0.275 0.250 dia. 0.225 5 0.96 dia. 1.56 dia. 1.05 bsc 1.07 0.30 1.33 bsc 1.05 0.98 0.88 0.24 ref 0.73 ref 2.66 bsc 3.14 ref 4.10 ref 0 . 4 0 0 . 6 0 ( p i n s 1 - 8 ) 1 96 4 r e f e r e n c e c o r n e r p i n 1 figure 17. 9-terminal chip array small outline no lead cavity [lga_cav] 4.72 mm 3 .76 mm 1 mm body (ce-9-1) (dimensions shown in millimeters) ordering guide model 1 temperature range package description package option 2 ordering quantity ADMP441ACEZ-RL ?40c to +85c 9-terminal lga_cav, 13 tape and reel ce-9-1 4,500 ADMP441ACEZ-RL7 ?40c to +85c 9-terminal lga_cav, 7 tape and reel ce-9-1 1,000 eval-admp441z evaluation board eval-admp441z-flex flex evaluation board 1 z = rohs compliant part. 2 this package option is halide-free.
admp441 data sheet rev. a | page 14 of 16 notes
data sheet admp441 rev. a | page 15 of 16 notes
admp441 data sheet rev. a | page 16 of 16 notes ?2011C2012 analog devices, inc. all ri ghts reserved. trademarks and registered trademarks are the prop erty of their respective owners. d09568-0-1/12(a)

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