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logic controlled, 1 a, high-side load switch with reverse current blocking data sheet ADP198 rev. d information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2011C2012 analog devices, inc. all rights reserved. features low rds on of 50 m @ 3.3 v (wlcsp only) low input voltage range: 1.65 v to 6.5 v 1 a continuous operating current built-in level shift for control logic that can be operated by 1.2 v logic low 2.5 a quiescent current @ v in = 2.8 v low 1.1 a shutdown current @ v in = 2.8 v reverse current blocking programmable start-up time ultrasmall 1 mm 1 mm, 4-ball, 0.5 mm pitch (wlcsp) tiny 8-lead lead frame chip scale package (lfcsp) 2.0 mm 2.0 mm 0.55 mm, 0.5 mm pitch applications mobile phones digital cameras and audio devices portable and battery-powered equipment typical application circuits gnd en load vin vout ADP198 level shift and slew rate control off on reverse polarity protection 09484-001 + figure 1. wlcsp gnd en load vin sel0 sel1 vout vin vout ADP198 slew rate control level shift off on reverse polarity protection 09484-002 + figure 2. lfcsp general description the ADP198 is a high-side load switch designed for operation between 1.65 v and 6.5 v that is protected against reverse current flow from output to input. a load switch provides power domain isolation, thereby helping to keep subsystems isolated and powered independently and enabling reduced power consumption. the ADP198 contains a low on-resistance p-channel mosfet that supports more than 1 a of continuous load current. the low 2.5 a quiescent current and ultralow shutdown current make the ADP198 ideal for battery-operated portable equipment. the built-in level shifter for enable logic makes the ADP198 compatible with modern processors and general-purpose input/output (gpio) controllers. the lfcsp version also allows the user to program the start-up time to control the inrush current at turn on. the ADP198 is available in an ultrasmall 1 mm 1 mm, 4-ball, 0.5 mm pitch wlcsp. an 8-lead, 2 mm 2 mm 0.55 mm, 0.5 mm pitch lfcsp is also available.
ADP198 data sheet rev. d | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 typical application circuits ............................................................ 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ....................................................... 5 thermal data ................................................................................ 5 thermal resistance ...................................................................... 5 esd caution .................................................................................. 5 pin configurations and function descriptions ........................... 6 typical performance characteristics ..............................................8 theo ry of operation ...................................................................... 11 applications information .............................................................. 12 ground current .......................................................................... 12 enable feature ............................................................................ 13 timing .......................................................................................... 14 diode oring applications ....................................................... 15 packag ing and ordering information ......................................... 16 outline dimensions ................................................................... 16 ordering guide .......................................................................... 16 revision history 6 /1 2 rev . c to rev. d changes to table headings in table 6 ......................................... 14 added text to diode oring applications section .................... 15 updated outline dimensions ....................................................... 16 4 /1 2 rev . b to rev. c changes to vout time parameters ............................................. 3 1 1 /11 rev . a to rev. b changes to wlcsp turn - on delay time par ameter ................. 3 changes to ordering guide .......................................................... 16 10/11 rev . 0 to rev. a change to features section ............................................................. 1 changes to table 1, specifications section ................................... 3 change to ground current section ............................................. 12 changes to enable feature section .............................................. 13 updated outline dimensions ....................................................... 16 10/ 11 rev ision 0: initial version
data sheet ADP198 rev. d | page 3 of 16 specifications v in = 2.8 v , en = v in , i out = 200 ma, t a = 25c, unless otherwise noted. table 1 . parameter symbol test conditions/comments min typ max unit input voltage range v in t j = ?40c to +85c 1.65 6.5 v en input threshold high v ih v in 5 v, t j = ? 40c to +85c 1.2 v 5 v < v in , t j = ? 40c to +85c 1.3 v low v il 1.65 v v in 6.5 v, t j = ? 40c to +85c 0.4 3 v pull -d own current i en 500 na revers e blocking v out current v en = 0, v in = 0, v out = 6.5 v 7 a v en = 0, v in = 0, v out = 6.5 v , t j = ? 40c to +85c 13 a hysteresis |v in ? v out | 75 mv current quiescent current i q i out = 0 ma, t j = ?40c to +85c, includes en pull - d own current v in = v out = 2.8 v 2.5 a v in = v out = 6.5 v 20 a off state current i off en = gnd 1 .1 a en = gnd, t j = ?40c to +85c 2 a en = gnd, v out = 0 v , t j = ?40c to +85c 2 a vin to vout resistance rds on wlcsp v in = 5 v, i load = 200 ma, v en = 1.5 v 40 m v in = 3.3 v, i load = 200 ma, v en = 1.5 v 50 80 m v in = 2.8 v, i load = 200 ma, v en = 1.5 v 60 m v in = 1.8 v, i load = 200 ma, v en = 1.5 v 130 m v in = 1.65 v, i load = 200 ma, v en = 1.5 v 1 8 0 m lfcsp v in = 5 v, i load = 200 ma, v en = 1.5 v 75 120 m v in = 3.3 v, i load = 200 ma, v en = 1.5 v 90 m v in = 2.8 v, i load = 200 ma, v en = 1.5 v 100 m v in = 1.8 v, i load = 200 ma, v en = 1.5 v 120 m v in = 1.65 v, i load = 200 ma, v en = 1.5 v 200 m vout time wlcsp turn - on delay time t on_dly v in = 3.6 v, i load = 200 ma, v en = 1.5 v, c load = 1 f 7 s ADP198acbz -11 -r7 v in = 3.6 v, i load = 200 ma, v en = 1.5 v, c load = 1 f 4 5 0 s lfcsp turn - on delay time t on_ dly v in = 3.6 v , i load = 200 ma, v en = 1.5 v, c load = 1 f; sel0 = l, sel1 = l 30 s v in = 3.6 v, i load = 200 ma, v en = 1.5 v, c load = 1 f; sel0 = h, sel1 = l 200 s v in = 3.6 v , i load = 200 ma, v en = 1.5 v, c load = 1 f; sel0 = l, sel1 = h 4 5 0 s v in = 3.6 v, i load = 200 ma, v en = 1.5 v, c load = 1 f; sel0 = h, sel1 = h 11 0 0 s
ADP198 data sheet rev. d | page 4 of 16 timing diagram v en v out turn-on rise 90% 10% turn-off delay turn-off fall turn-on delay 09484-003 figure 3 . timing diagram
data sheet ADP198 rev. d | page 5 of 16 absolute maximum rat ings table 2 . parameter rating vin to gnd pins ?0 .3 v to +7 v vout to gnd pins ?0.3 v to +7 v en to gnd pins ?0.3 v to +7 v continuous drain current t a = 25c 1000 ma t a = 85c 1000 ma storage temperature range ?65 c to +150c operating junction temperature range ?40c to +125c soldering cond itions jedec j - std -020 s t r e s s es a b o ve t h o s e l i s t e d u n d e r a b s o l u t e m a x i m um r a t i n gs m a y c a u s e p e r m a n e n t dam a g e t o t h e d e v i c e . this is a s t r e s s r a t i n g o n l y ; fu n c t i o n a l o p e r a t i o n o f t h e d ev i c e a t t h e s e o r a n y o t h e r co n d i t i o ns a b o ve t h o s e indi c a t e d i n t h e o p e r a t i o na l s e c t i o n o f t h is s p e c i fi c a t ion is n o t i m p l i e d . e x p o su r e t o a b s o l u te ma x i m u m r a t in g c o n d i t i o n s fo r e x t e n d e d p e r i o d s m a y a ff e c t d e vi c e r e l i a b i l i t y . thermal data absolute maximum ratings apply individually only, not in combination. the ADP198 can be damaged if the junction temperature limits are exceeded. monitoring ambient tempera ture does not guarantee that t j is within the specified temperature limits. in applications with high power dissipation and poor thermal resistance, the maximum ambient temperature may need to be derated. in applications with moderate power dissipation an d low printed circuit board ( pcb ) thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. the junction temperature (t j ) of the device is dependent on the ambient t emperature (t a ), the power dissipation of the device (p d ), a nd the junction - to - ambient thermal resistance of the package ( ja ). maximum junction temperature (t j ) is calculated from the ambient temperature (t a ) and power dissipation (p d ) using the formula t j = t a + ( p d ja ) the j unction - to - ambient thermal resistance ( ja ) of the package is based on modeling and calculation using a 4 - layer board. the junction - to - ambient thermal resistance is highly dependent on the application and board layout. in applications where high maximum power dissipation exists, close attention to thermal board d esign is required. the value of ja may vary, depending on pcb material, layout, and environmental conditions. the speci - f ied values of ja are based on a 4 - layer, 4 inch 3 inch pcb. refer to jesd 51 - 7 and jesd 51 - 9 for detailed information regarding board constr uction. for additional information, see the an - 617 application note , microcsp ? wafer level chip scale package . jb is the junction - to - board thermal characterization parameter with units of c/w. the jb of the p ackage is based on modeling and calculation using a 4 - layer board. the jesd51 - 12, guidelines for rep orting and using package thermal information , states that thermal cha racterization parameters are not the same as thermal resistances. jb measures the com p onent power flowing through multiple thermal paths rather than a single path as in thermal resistance, jb . therefore, jb thermal paths include convection from the top of th e package as well as radiation from the package, factors that make jb more useful in real - world applications. maximum junction temperature (t j ) is calculated from the board temperature (t b ) and power dissipation (p d ) using the formula t j = t b + ( p d jb ) refer to jesd51 - 8, jesd51 - 9, and jesd51 - 12 for more detailed information about jb . thermal resistance ja and jb are specified for the worst - case conditions, that is, a device soldered in a circuit board for surface - mount packages. table 3 . thermal resistance package type ja jc jb unit 4 - ball, 0.5 mm pit ch wlcsp 260 4 58.4 c/w 8 - lead, 2 mm 2 mm lfcsp 72.1 42.3 47.1 c/w esd caution
ADP198 data sheet rev. d | page 6 of 16 pin configuration s and function descrip tions vin vout 1 2 en a b gnd top view (not to scale) 09484-004 figure 4. 4 - ball wlcsp pin configuration table 4 . pin function d escriptions, wlcsp pin no. mnemonic description a1 vin input voltage. a2 vout output voltage. b1 en enable input. drive en high to turn on the switch and drive en low to turn off the switch. b2 gnd ground.
data sheet ADP198 rev. d | page 7 of 16 1 vout notes 1. the exposed p ad is connected t o the substr a te of the ADP198 and must be connected t o ground. 2 vout 3 gnd 4 sel1 8 vin 7 vin 6 en 5 sel0 t op view ADP198 (not to scale) 09484-005 figure 5. 8 - le ad lfcsp pin configuration table 5 . pin function descriptions , lfcsp pin no. mnemonic description 1 vout output voltage. connect p in 1 and pin 2 together . 2 vout outpu t voltage. connect p in 1 and pin 2 together . 3 gnd ground. 4 sel 1 select turn - on ti me . 5 sel 0 select t urn - o n t ime . 6 en enable input. drive en high to turn on the switch and drive en low to turn off the switch. 7 vin input voltage. connect p in 7 and pin 8 together . 8 vin input voltage. connect p in 7 and pin 8 to gether . ep exposed pad. the exposed pad is connected to the substrate of the ADP198 and must be connected to ground.
ADP198 data sheet rev. d | page 8 of 16 typical performance characteristics 0 0.02 0.04 0.06 0.08 0.10 0.12 ?40 ?5 85 25 125 rds on (?) temper a ture (c) i load = 1000m a i load = 100m a i load = 200m a i load = 400m a i load = 800m a 09484-006 figure 6 . rds on vs. te mperature, wlcsp 0 0.02 0.04 0.06 0.08 0.12 0.10 0.14 0.16 ?40 ?5 85 25 125 rds on (?) temper a ture (c) i load = 1000m a i load = 100m a i load = 200m a i load = 400m a i load = 800m a 09484-007 figure 7 . rds on vs. temperature, lfcsp 0 0.05 0.10 0.15 0.20 0.25 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 rds on (?) v in (v) i load = 1000m a i load = 100m a i load = 10m a i load = 200m a i load = 400m a i load = 800m a 09484-008 figure 8 . rds on vs. input voltage (v in ), wlcsp 0 0.05 0.10 0.15 0.20 0.25 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 rds on (?) v in (v) i load = 1000m a i load = 100m a i load = 10m a i load = 200m a i load = 400m a i load = 800m a 09484-009 figure 9 . rds on vs. input voltage (v in ), lfcsp 0 0.05 0.10 0.15 0.20 0.25 10 100 1000 volt age dro p (v) load (ma) v in = 1.65v v in = 1.80v v in = 2.10v v in = 2.50v v in = 2.80v v in = 3.30v v in = 3.80v v in = 4.50v v in = 5.50v v in = 6.50v 09484-010 figure 10 . voltage drop vs. load current, wlcsp 0 0.05 0.10 0.15 0.20 0.25 10 100 1000 volt age dro p (v) load (ma) v in = 1.65v v in = 1.80v v in = 2.10v v in = 2.50v v in = 2.80v v in = 3.30v v in = 3.80v v in = 4.50v v in = 5.50v v in = 6.50v 09484-0 1 1 figure 11 . voltage drop vs. load current, lfcsp
data sheet ADP198 rev. d | page 9 of 16 ch1 200ma ? b w ch3 2.00v b w a ch3 1.48v 3 1 2 ch2 1.00v b w m40.0 s t 10.20% 09484-012 input current output voltage enable figure 12 . typical rise time and inrush current, v in = 1.8 v, i load = 200 ma, select code 00 ch1 200ma ? b w ch3 2.00v b w a ch3 1.48v 2 1 3 ch2 2.00v b w m20.0 s t 10.20% 09484-013 input current output voltage enable figure 13 . typical rise time and inrush current, v in = 3.6 v, i load = 200 ma, select code 00 ch1 500ma ? b w ch3 2.00v b w a ch3 1.48v 2 1 3 ch2 5.00v b w m10.0 s t 10.20% 09484-014 input current output voltage enable figure 14 . typical rise time and inrush current, v in = 6.5 v, i load = 200 ma, select code 00 0.0 0.5 1.0 1.5 2.0 2.5 3.0 ?40 ?5 25 85 125 ground current (a) temper a ture (c) i load = 1000m a i load = 100m a i load = 200m a i load = 400m a i load = 800m a 09484-015 figur e 15 . ground current vs. temperature 0 2 4 6 8 10 12 14 16 18 20 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 ground current (a) v in (v) i load = 1000m a i load = 100m a i load = 10m a i load = 200m a i load = 400m a i load = 800m a 09484-016 figure 16 . ground current vs. input voltage (v in ) 0 1 2 3 4 5 6 7 8 9 10 ?40 ?20 0 20 40 60 80 100 120 i gnd shutdown current (a) temper a ture (c) v in = 1.65v v in = 2.10v v in = 2.50v v in = 3.30v v in = 3.80v v in = 5.50v v in = 6.50v 09484-017 figure 17 . i gnd shutdown ground current vs. temperature, v out open
ADP198 data sheet rev. d | page 10 of 16 0.01 0.10 1.00 10.00 ?40 ?20 0 20 40 60 80 100 120 i gnd shutdown current (a) temper a ture (c) v in = 1.65v v in = 2.10v v in = 2.50v v in = 3.30v v in = 3.80v v in = 5.50v v in = 6.50v 09484-018 figure 18 . shutdown ground current vs. temperature, v out = 0 v 0 0.20 0.40 0.60 0.80 1.00 1.20 1.40 1.60 1.80 2.00 ?40 ?20 0 20 40 60 80 100 120 i out shutdown current (a) temper a ture (c) v in = 1.65v v in = 2.10v v in = 2.50v v in = 3.30v v in = 3.80v v in = 5.50v v in = 6.50v 09484-019 figure 19 . i out shutdown current vs. temperature, v out = 0 v 0 0.20 0.40 0.60 0.80 1.00 1.20 1.40 1.60 1.80 2.00 ?40 ?20 0 20 40 60 80 100 120 i out shutdown current (a) temper a ture (c) v in = 1.65v v in = 2.10v v in = 2.50v v in = 3.30v v in = 3.80v v in = 5.50v v in = 6.50v 09484-020 figure 20 . reverse input shutdown current vs. temperature, v in = 0 v 0.01 0.10 1.00 10.00 ?40 ?20 0 20 40 60 80 100 120 i gnd shutdown current (a) temper a ture (c) v in = 1.65v v in = 2.10v v in = 2.50v v in = 3.30v v in = 3.80v v in = 5.50v v in = 6.50v 09484-021 figure 21 . reverse shutdown ground current vs. temperature, v out = 0 v
data sheet ADP198 rev. d | page 11 of 16 theory of operation gnd en vin sel0 sel1 vout ADP198 slew rate control level shift reverse polarity protection 09484-022 figure 22 . functional block diagram the ADP198 is a high - side pmos load switch that is designed for supply operation between 1.65 v and 6.5 v. the pmos load switch has a low on resistance of 50 m? at v in = 3.3 v and supports 1 a of continuous load current. the ADP198 features low quiescent current at 2.5 a typical using a 2 .8 v supply. the enable input incorporates a nominal 4 m? pull - down resistor . sel0 and sel1 program the start - up time of the load switch to reduce inrush current when the switch is turned on. the reverse current protection c ircuitry prevents current from flow in g backwards through the ad p198 when the output voltage is g reater than the input voltage. a comparator senses the differ - ence betw een the input and output voltages. when the difference between the input voltage and output voltage exceeds 75 m v, the body of the pfet is switched to v out and t urned off or opened. in other words, the gate is connected to vout. t he packaging is a space - sav ing 1 mm 1 mm , 4 - ball wlcsp. the ADP198 is also available in a 2 mm 2 mm 0.55 mm, 0. 5 mm pitch lfc s p.
ADP198 data sheet rev. d | page 12 of 16 application s information ground current the major source for ground current in the ADP198 is an internal 4 m? pull - down resistor on the enable pin. figure 23 shows the typica l ground current when v en = v in and varies from 1. 65 v to 6.5 v. 0 2 4 6 8 10 12 14 16 18 20 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 ground current (a) v in (v) i load = 1000m a i load = 100m a i load = 10m a i load = 200m a i load = 400m a i load = 800m a 09484-023 figure 23 . ground current vs. load current as shown in figure 24 , an increase in quiescent current can occur when v en v in . this is ca used by the cmos logic nature of the level shift circuitry as it translates a v en signal 1.2 v to a logic high. this increase is a function of the v in ? v en delta. 0 10 20 30 40 50 60 0 1 2 3 4 5 6 ground current (a) enable vo lt age (v) 09484-024 figure 24 . typical ground current when v en v in
data sheet ADP198 rev. d | page 13 of 16 enable featur e the ADP198 uses the en pin to enable and disable the vout pin under normal operating conditions. as shown in figure 25, when a rising v en voltage crosses the active threshold, vout turns on. when a falling v en voltage crosses the inactive threshold, vout turns off. 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0.45 0.50 0.55 0.60 0.65 0.70 0.75 0.80 v out (v) enable vo lt age (v) v in rising v in falling 09484-025 figure 25 . typical en operation as shown in figure 25 , the en pin has hysteresis built in. this prevents on/off oscillations that can occur due to noise on the en pin as it passes through the threshold points. the e n pin active/inactive thresholds derive from the v in voltage; therefore, these thresholds va ry with the changing input voltage. figure 26 shows the typical en active/inactive thresholds when the input voltage varies from 1. 65 v to 6.5 v. 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1 2 3 4 5 6 7 enable threshold (v) input vo lt age (v) en rise en fall 09484-026 figure 26 . typical en thresholds vs. input voltage (v in )
ADP198 data sheet rev. d | page 14 of 16 timing turn - on delay is defined as the delta between the time that v en reaches >1.2 v and when v out rises to ~10% of its final value. the ADP198 includes circuitry to have typical 10 s turn - on delay at 3.6 v v in to limit the v in inrush current. the rise time is defined as the delta between the time from 10% to 90% of v out reaching its fina l value. it is dependent on the rc time constant where c = load capacitance (c load ) and r = rds on ||r load . because rds on is usually smaller than r load , an adequate approximation for rc is rds on c load . an input or load capacitor is not needed for the ADP198 ; however, capacitors can be used to suppress noise on the board. if s ignificant load capacitance is connected, inrush current may be a concern. figure 27 through figure 30 show the turn - on delay and output rise time for each of the four settings on sel0 and sel1. ch1 200ma ? b w ch3 2.00v b w a ch3 1.48v 2 1 3 ch2 2.00v b w m20.0 s t 10.20% 09484-027 input current output voltage enable figur e 27 . typical rise time and inrush current, c load = 1 f, v in = 3.6 v, i l oad = 200 ma, code 00 ch1 200ma ? b w ch3 2.00v b w a ch3 1.48v 2 1 3 ch2 2.00v b w m40.0 s t 10.20% 09484-028 input current output voltage enable figure 28 . typical rise time and inrush current, c load = 1 f, v in = 3.6 v, i load = 200 ma, code 01 ch1 200ma ? b w ch3 2.00v b w a ch3 1.48v 2 1 3 ch2 2.00v b w m100 s t 10.20% 09484-029 input current output voltage enable figure 29 . typical rise time and inrush current, c load = 1 f, v in = 3.6 v, i load = 200 ma, code 10 ch1 200ma ? b w ch3 2.00v b w a ch3 1.48v 2 1 3 ch2 2.00v b w m200 s t 10.20% 09484-030 input current output voltage enable figure 30 . typical rise time and inrush current, c load = 1 f, v in = 3.6 v, i load = 200 ma, code 11 the turn - of f time is defined as the delta between the time from 90% to 10% of v out reaching its final value. it is also dependent on the rc time constant. table 6 . start - up time pin settings sel1 sel0 start - up t ime (s) 0 0 30 0 1 200 1 0 4 50 1 1 1100
data sheet ADP198 rev. d | page 15 of 16 diode or ing applications + load 6v ac v2 v out = v2 ? (i load r on ) vout vin en ADP198 09484-031 figure 31 . ADP198 in a typical diode or ing application figure 31 shows a n application where in an ac power supply a nd battery are ored together to provide a seamless transition from the primary ( ac ) supply to the secondary (v2) supply when the p rimary supply is disconnected. by connecting the enable input of the ADP198 to v2, the transition from ac power to battery power is automatic. figure 32 shows the forward voltage vs . the forward current characteristics of a s chottky diode and the ADP198 . the low on resistance of the ADP198 makes it far superior to a s chottky diode in diode oring applications. in addition to low on resistance, the ADP198 reverse leakage cu rrent is much lower than a typical 1 a , 20 v schottky rectifier. for example, at 85 c, the reverse current of a s chottky rectifier can be as high as 30 a with only 2.5 v of reverse bias. figure 32 shows that about 75 mv of hyste resis built into the circuitry that senses the voltage differential between the input and output voltage . when the difference between the input volt age and output voltage exceeds 75 mv, the ADP198 is switched o n. forward voltage (v) current (a) schottky forward voltage slope = 1 r on 75mv (v hys ) 300mv 1a 09484-032 figure 32 . forward voltage vs . forward c urrent of a schottky diode and ADP198
ADP198 data sheet rev. d | page 16 of 16 packaging and ordering information outline dimensions 0.990 0.950 0.910 1.065 1.025 0.985 bottom view (ball side up) top view (ball side down) a 12 b ball a1 identifier 0.50 ref 0.640 0.595 0.550 end view 0.340 0.320 0.300 0.370 0.355 0.340 seating plane 0.270 0.240 0.210 coplanarity 0.05 0 4-13-2012-a figure 33. 4-ball wafer level chip scale package [wlcsp] (cb-4-4) dimensions shown in millimeters 1.70 1.60 1.50 0.425 0.350 0.275 top view 8 1 5 4 0.30 0.25 0.20 bottom view pin 1 index area 2.00 bsc sq seating plane 0.60 0.55 0.50 1.10 1.00 0.90 0.20 ref 0.175 ref 0.05 max 0.02 nom 0.50 bsc exposed pad p i n 1 i n d i c a t o r ( r 0 . 1 5 ) for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. 07-11-2011-b figure 34. 8-lead lead frame chip scale package [lfcsp_ud] 2.00 2.00 mm body, ultra thin, dual lead (cp-8-10) dimensions shown in millimeters ordering guide model 1 temperature range start-up time (s) package description package option branding ADP198acbz-r7 ?40c to +85c 30 4-ball wafer level chip scale package [wlcsp] cb-4-4 8c ADP198acbz-11-r7 ?40c to +85c 1000 4-ball wafer level chip scale package [wlcsp] cb-4-4 2w ADP198acpz-r7 ?40c to +85c pin selectable: 30, 200, 450, and 1000 8-lead lead frame chip scale package [lfcsp_ud] cp-8-10 ljl ADP198cp-evalz evaluation board 1 z = rohs compliant part. ?2011C2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d09484-0-6/12(d) www.analog.com/ADP198

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