acpl-p480 high cmr intelligent power module and gate drive interface optocoupler data sheet features ? performance specifed for common ipm applications over industrial temperature range. ? short maximum propagation delays ? minimized pulse width distortion (pwd) ? very high common mode rejection (cmr) ? hysteresis ? totem pole output (no pull-up resistor required) ? available in stretched so-6 package. ? safety approval: ul recognized with 3750 v rms for 1 minute (5000 vrms for 1 minute for option 020 device) per ul1577. csa approved. iec/en/din en 60747-5-2 approved with v iorm = 891 v peak for option 060. specifcations ? wide operating temperature range: C40c to 100c. ? maximum propagation delay t phl / t plh = 350 ns ? maximum pulse width distortion (pwd) = 250 ns. ? propagation delay diference: min. C100 ns, max. 250 ns ? wide operating v cc range: 4.5 to 20 volts ? 20 kv/s minimum common mode rejection (cmr) at v cm = 1000 v. applications ? ipm interface isolation ? isolated igbt/mosfet gate drive ? ac and brushless dc motor drives ? industrial inverters ? general digital isolation note: a 0.1 f bypass capacitor must be connected between pins 4 and 6. truth table (positive logic) led vo on high off low description the acpl-p480 fast speed optocoupler contains a gaasp led and photo detector with built-in schmitt trigger to provide logic-compatible waveforms, eliminating the need for additional wave shaping. the totem pole output eliminates the need for a pull up resistor and allows for direct drive intelligent power module or gate drive. minimized propagation delay diference between devices make these optocouplers excellent solutions for improving inverter efciency through reduced switching dead time. functional diagram caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd. gr ou nd v cc 6 1 5 2 4 3 ano de n.c. ca th od e v o shi el d 6 5 4 lead (pb) free rohs 6 fully compliant rohs 6 fully compliant options available; -xxxe denotes a lead-free product
package outline drawings acpl-p480 stretched so-6 package, 7 mm clearance dimensions in millimeters [inches] coplanarity = 0.1mm [0.004 inches] 0.380.127 [.015.005 ] 1.27[.050] bsg 4.580 +0.25 4 0 .180 +.010 - .000 0.45 .018 7.62 6.81 .300 .268 [.063.005 ] 1.5900.127 a [.382.010] 9.70.25 0 3.1800.127 7.00 45.00 7.00 7.00 7.00 [.040.010] 1.0.25 0 0.200.10 [.008.004] 0.20[.008] 2.16[.085 ] 10.7[.421] [.125.005 ] land pattern recommendation ordering information acpl-p480 is ul recognized with 3750 vrms for 1 minute per ul1577 and is approved under csa component accep - tance notice #5, file ca 88324. part number option package surface mount tape & reel ul 1577 5000 vrms / 1 minute rating iec/en/din en 60747-5-2 quantity rohs compliant acpl-p480 -000e stretched so-6 x 100 per tube -500e x x 1000 per reel -020e x x 100 per reel -520e x x x 1000 per reel -060e x x 100 per tube -560e x x x 1000 per reel to order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. example 1: acpl-p480-560e to order product of stretched so-6 package in tape and reel packaging with iec/en/din en 60747-5-2 safety approval in rohs compliant. example 2: acpl-p480-000e to order product of stretched so-6 package in tube packaging and rohs compliant. option datasheets are available. contact your avago sales representative or authorized distributor for information.
regulatory information the acpl-p480 is approved by the following organizations: recommended pb-free ir profle note: non-halide fux should be used. note: non-halide fux should be used. recommended solder refow temperature profle iec/en/din en 60747-5-2 (option 060 only) approval under: iec 60747-5-2 :1997 + a1:2002 en 60747-5-2:2001 + a1:2002 din en 60747-5-2 (vde 0884 teil 2):2003-01 ul approval under ul 1577, component recognition program up to v iso = 3750 v rms . file e55361. csa approval under csa component acceptance notice #5, file ca 88324. 0 time (seconds) temperature ( c) 200 100 50 150 100 200 250 300 0 30 sec. 50 sec. 30 sec. 160 c 140 c 150 c peak temp. 245 c peak temp. 240 c peak temp. 230 c solderin g time 200 c preheating tim e 150 c, 90 + 30 sec. 2. 5 c 0.5 c/sec. 3 c + 1 c/-0.5 c tight typical loos e room temperature preheating rate 3 c + 1 c/-0.5 c/sec. reflow heating rate 2. 5 c 0.5 c/sec. 217 c ramp-down ramp-up 3 c/sec. max. ? 150 - 200 c 260 +0/-5 c t 25 c to peak ? 60 to 150 sec. 20-40 sec. time within 5 c of actual t p t s preheat t l t l t smax t smin 25 t p time (seconds) temperature (?c) notes: 6 c/sec. max. the time from 25 c to peak temperature = 8 minutes max. t smax = 200 c, t smin = 150 c peak temperature 60 to 180 sec.
table 1. iec/en/din en 60747-5-2 insulation characteristics* (acpl-p480 option 060) description symbol characteristic unit installation classifcation per din vde 0110/1.89, table 1 for rated mains voltage 150 v rms for rated mains voltage 300 v rms for rated mains voltage 450 v rms for rated mains voltage 600 v rms i C iv i C iiv i C iii i C iii climatic classifcation 55/100/21 pollution degree (din vde 0110/1.89) 2 maximum working insulation voltage v iorm 891 v peak input to output test voltage, method b* v iorm x 1.875=v pr , 100% production test with t m =1 sec, partial discharge < 5 pc v pr 1670 v peak input to output test voltage, method a* v iorm x 1.5=v pr , type and sample test, t m =60 sec, partial discharge < 5 pc v pr 1336 v peak highest allowable overvoltage (transient overvoltage t ini = 10 sec) v iotm 6000 v peak safety-limiting values C maximum values allowed in the event of a failure. case temperature input current output power t s i s, input p s, output 175 230 600 c ma mw insulation resistance at t s , v io = 500 v r s >109 w * refer to the optocoupler section of the isolation and control components designers catalog, under product safety regulations section, (iec/en/ din en 60747-5-2) for a detailed description of method a and method b partial discharge test profles. table 2. insulation and safety related specifcations parameter symbol acpl-p480 units conditions minimum external air gap (external clearance) l(101) 7.0 mm measured from input terminals to output terminals, shortest distance through air. minimum external tracking (external creepage) l(102) 8.0 mm measured from input terminals to output terminals, shortest distance path along body. minimum internal plastic gap (internal clearance) 0.08 mm through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. minimum internal tracking (internal creepage) na mm measured from input terminals to output terminals, along internal cavity. tracking resistance (comparative tracking index) cti >175 v din iec 112/vde 0303 part 1 isolation group iiia material group (din vde 0110, 1/89, table 1)
table 4. recommended operating conditions parameter symbol min. max. units note power supply voltage v cc 4.5 20 v forward input current (on) i f(on) 6 10 ma forward input voltage (off) v f(off) - 0.8 v operating temperature t a -40 100 c table 3. absolute maximum ratings parameter symbol min. max. units note storage temperature t s -55 125 c operating temperature t a -40 100 c average input current i f(avg) 10 ma peak transient input current (<1 s pulse width, 300 pps) (<200 s pulse width, < 1% duty cycle) i f(tran) 1.0 40 a ma reverse input voltage v r 5 v average output current i o 25 ma supply voltage v cc 0 25 output voltage v o -0.5 25 total package power dissipation p t 210 mw 1 solder refow temperature profle see refow thermal profle. table 5. electrical specifcations over recommended operating conditions t a = -40 c to 100 c, v cc = +4.5 v to 20 v, i f(on) = 6 ma to 10 ma, v f(off) = 0 v to 0.8 v, unless otherwise specifed. all typicals at t a = 25 c. parameter symbol min. typ. max. units test conditions fig. note logic low output voltage v ol 0.5 v i ol = 6.4 ma 1, 3 logic high output voltage v oh 2.4 v cc - 1.1 v i oh = -2.6 ma 2, 3, 7 2.7 i oh = -0.4 ma output leakage current (v o = v cc +0.5v) i ohh 100 a v cc = 5 v, i f = 10ma 500 a v cc = 20 v, i f = 10ma logic low supply current i ccl 1.9 3.0 ma v cc = 5.5 v, v f = 0 v, i o = open 2.0 3.0 ma v cc = 20 v, v f = 0 v, i o = open logic high supply current i cch 1.5 2.5 ma v cc = 5.5 v, i f = 10 ma, i o = open 1.6 2.5 ma v cc = 20 v, if = 10 ma i o = open logic low short circuit output current i osl 25 ma v o = v cc = 5.5 v, v f =0v 2 50 ma v o = v cc = 20 v, v f =0v logic high short circuit output current i osh -25 ma v cc = 5.5 v, i f =6ma, v o =gnd 2 -50 ma v cc = 20 v, i f =6ma, v o =gnd input forward voltage v f 1.5 1.7 v t a = 25?c, i f =6ma 4 1.85 v i f =6ma input reverse breakdown voltage bv r 5 v i r = 10 a input diode temperature coefcient d v f / d t a 1.7 mv/c i f = 6 ma input capacitance c in 60 pf f = 1 mhz, v f = 0 v 3
table 6. switching specifcations over recommended operating conditions t a = -40 c to 100 c, v cc = +4.5 v to 20 v, i f(on) = 6 ma to 10 ma, v f(off) = 0 v to 0.8 v, unless otherwise specifed. all typicals at t a = 25 c. parameter symbol min. typ. max. units test conditions fig. note propagation delay time to logic low output level t phl 150 350 ns with peaking capacitor 5, 6 5 propagation delay time to logic high output level t plh 110 350 ns with peaking capacitor 5, 6 5 pulse width distortion |t phl - t plh | = pwd 250 ns 8 propagation delay diference between any 2 parts pdd -100 250 ns 10 output rise time (10-90%) t r 16 ns 5, 8 output fall time (90-10%) t f 20 ns 5, 8 logic high common mode transient immunity |cm h | 20 kv/s |v cm | = 1000 v, i f = 6.0 ma, v cc = 5 v, t a = 25?c 9 6 logic low common mode transient immunity |cm l | 20 kv/s |v cm | = 1000 v, v f = 0 v, v cc = 5 v, t a = 25?c 9 6 table 7. package characteristics parameter symbol min. typ. max. units test conditions fig. note input-output momentary withstand voltage* v iso 3750 v rms rh < 50%, t = 1 min. t a = 25c 4, 7 5000 (for option 020) input-output resistance r i-o 10 12 v i-o = 500 vdc 4 input-output capacitance c i-o 0.6 f = 1 mhz, v i-o = 0 vdc 4 * the input-output momentary withstand voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. for the continuous voltage rating refer to the iec/en/din en 60747-5-2 insulation characteristics table (if applicable). notes: 1. derate total package power dissipation, p t , linearly above 70c free-air temperature at a rate of 4.5 mw/c. 2. duration of output short circuit time should not exceed 10 ms. 3. input capacitance is measured between pin 1 and pin 3. 4. device considered a two-terminal device: pins 1, 2 and 3 shorted together and pins 4, 5 and 6 shorted together. 5. the t plh propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.3 v point on the leading edge of the output pulse. the t phl propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.3 v point on the trailing edge of the output pulse. 6. cm h is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic high state, v o > 2.0 v. cm l is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic low state, v o < 0.8 v. 7. in accordance with ul 1577, each optocoupler is proof tested by applying an insulation test voltage 4500 v rms for one second (leakage detection current limit, i i-o 5 a). ; each optocoupler with option 020 is proof tested by applying an insulation test voltage 6000 v rms for 1 second (leakage detection current limit, i i-o 5 a). this test is performed before the 100% production test for partial discharge (method b) shown in the iec/en/din en 60747-5-2 insulation characteristics table, if applicable. 8. pulse width distortion (pwd) is defned as |t phl - t plh | for any given device. 9. use of a 0.1 f bypass capacitor connected between pins 4 and 6 is recommended. 10. the diference between t plh and t phl between any two devices under the same test condition.
figure 5. circuit for t plh , t phl , t r , t f figure 4. typical input diode forward characteristic figure 3. typical output voltage vs. forward input current figure 2. typical logic high output current vs. temperature figure 1. typical logic low output voltage vs. temperature 0 . 1 0 . 1 1 0 . 1 2 0 . 1 3 0 . 1 4 0 . 1 5 - 5 0 0 5 0 1 0 0 1 5 0 v o l - l o w l e v e l o u t p u t v o l t a g e - v t a - t e m p e r a t u r e - c v c c = 4 . 5 / 2 0 v v f = 0 v i o = 6 . 4 m a v c c = 4 . 5 v v c c = 2 0 v - 2 5 - 2 0 - 1 5 - 1 0 - 5 0 - 5 0 0 5 0 1 0 0 1 5 0 t a - t e m p e r a t u r e - c i o h - h i g h l e v e l o u t p u t c u r r e n t - m a v c c = 4 . 5 v i f = 6 m a v o = 2 . 4 v v o = 2 . 7 v 0 0 . 5 1 1 . 5 2 2 . 5 3 3 . 5 4 4 . 5 0 1 2 3 4 5 i f - i n p u t c u r r e n t - m a v o - o u t p u t v o l t a g e - v i o = - 2 . 6 m a t a = 2 5 c v c c = 4 . 5 v i o = 6 . 4 m a i f - f o r w a r d c u r r e n t - m a 1 . 1 0 . 0 0 1 v f - f o r w a r d v o l t a g e - v 1 . 0 1 0 0 0 1 . 3 0 . 0 1 1 . 5 1 . 2 1 . 4 0 . 1 t a = 2 5 c 1 0 1 0 0 i f + - v f 5 k ? * r 1 d output v monitoring node pulse gen. t r = t f = 5 ns f = 100 khz 10 % duty cycle v o = 5 v z o = 50 6 1 5 2 4 3 shield c 1 = 120 pf v c c input monitoring node 5 v d 2 d 3 d 4 c 2 = 15 pf 619 ? * 0.1 f bypass ? see note 9 k * d 1 o i f (on) 50 % i f (on) 0 ma t plh t phl v oh 1.3 v v ol input i f output v o the probe and jig capacitances are included in c 1 and c 2 . all diodes are 1n916 or 1n3064. 10 ma 6 ma i 330 ? 580 ? r f(on) 1
figure 9. test circuit for common mode transient immunity and typical waveforms figure 8. typical propagation delay vs. supply voltage figure 7. typical logic high output voltage vs. supply voltage figure 6. typical propagation delays vs. temperature. 5 0 7 0 9 0 1 1 0 1 3 0 1 5 0 1 7 0 1 9 0 2 1 0 2 3 0 - 6 0 - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 t a - t e m p e r a t u r e - c t p - p r o p a g a t i o n d e l a y - n s t p l h v c c = 2 0 v i f = 1 0 m a t p h l 0 5 1 0 1 5 2 0 2 5 0 5 1 0 1 5 2 0 2 5 v c c - s u p p l y v o l t a g e - v v o - o u t p u t v o l t a g e - v t a = 2 5 o c i o = - 2 . 6 m a 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 1 6 0 1 8 0 2 0 0 0 5 1 0 1 5 2 0 2 5 v c c - s u p p l y v o l t a g e - v t p - p r o p a g t i o n d e l a y - n s t p h l i f ( m a ) 1 0 6 t p l h i f ( m a ) 6 1 0 t a = 2 5 o c v cm (peak) output v o 0 v v oh |v cm | v ol v o (max.) v o (min.) switch at a: i f = 6 m a switch at b: v f = 0 v b - a + - r in v cc output v o mo ni toring node 0. 1 f v cm v ff 6 1 5 2 4 3 shi el d + for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies limited in the united states and other countries. data subject to change. copyright ? 00- 008 avago technologies limited. all rights reserved. obsoletes av0-0en av0 -0 en - may , 008
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