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sram as8s128k32 as8s128k32 rev. 4.3 01/10 micross components reserves the right to change products or speci cations without notice. 1 features ? access times of 15, 17, 20, 25, 35, and 45 ns ? built in decoupling caps for low noise operation ? organized as 128k x32; user con gured as 256kx16 or 512k x8 ? operation with single 5 volt supply ? low power cmos ? ttl compatible inputs and outputs ? 2v data retention, low power standby options markings ? timing 15ns -15 17ns -17 20ns -20 25ns -25 35ns -35 45ns -45 ? package ceramic quad flatpack q no. 702 ceramic quad flatpack q1 pin grid array -8 series p no. 802 pin grid array -8 series pn no. 802 note : pn indicates a no connect on pins 8, 21, 28, 39 general description the as8s128k32 is a 4 megabit cmos sram module organized as 128kx32-bits and user con gurable to 256kx16 or 512kx8. the as8s128k32 achieves high speed access, low power consumption and high reliability by employing advanced cmos memory technology. the military temperature grade product is suited for military applications. the as8s128k32 is offered in a ceramic quad atpack module per smd-5962-95595 with a maximum height of 0.140 inches. this module makes use of a low pro le, mutlichip mod- ule design. this device is also offered in a 1.075 inch square ceramic pin grid array per smd 5692-93187, which has a maximum height of 0.195 inches. this package is also a low pro le, multi-chip module design reducing height requirements to a minimum. available as military specifications ? smd 5962-95595: -q ? smd 5962-93187: -p or -pn ? mil-std-883 128k x 32 sram sram memory array for more products and information please visit our web site at www.micross.com m3 m2 m1 i/o 0 - i/o 7 i/o 16 - i/o 23 i/o 24 - i/o 31 i/o 8 - i/o 23 we2 a0 - 16 oe we1 ce1 ce2 ce3 ce4 we3 we4 m0 128k x 8 128k x 8 128k x 8 128k x 8 pin assignment (top view) 66 lead pga- pins 8, 21, 28, 39 are no connects (pn) 66 lead pga- pins 8, 21, 28, 39 are grounds (p) 68 lead cqfp (q & q1)
sram as8s128k32 as8s128k32 rev. 4.3 01/10 micross components reserves the right to change products or speci cations without notice. 2 absolute maximum ratings * voltage of vcc supply relative to vss................-1v to +7v storage temperature...................................-65c to +150c short circuit output current(per i/o).........................20ma voltage on any pin relative to vss..............-.5v to vcc+1v maximum junction temperature**...........................+175c *stresses greater than those listed under ?absolute maximum rat- ings? may cause permanent damage to the device. this is a stress rating only and functional operation on the device at these or any other conditions above those indicated in the op- erational sections of this speci cation is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. **junction temperature depends upon package type, cycle time, loading, ambient temperature and air ow. see the application infor- mation section at the end of this datasheet for more information. electrical characteristics and recommended dc operating conditions (-55c sram as8s128k32 as8s128k32 rev. 4.3 01/10 micross components reserves the right to change products or speci cations without notice. 3 ac test conditions test specifications input pulse levels........................................vss to 3v input rise and fall times..........................................5ns input timing reference levels.................................1.5v output reference levels........................................1.5v output load.............................................see figures 1 notes: vz is programable from -2v to + 7v. i ol and i oh programmable from 0 to 16 ma. vz is typically the midpoint of v oh and v ol . i ol and i oh are adjusted to simulate a typical resistive load circuit. symbol p arameter max units notes c add a0 - a18 capacitance 40 pf 4 c oe oe\ capacitance 40 pf 4 c we, c ce we\ and ce\ capacitance 20 pf 4 c io i/o 0- i/o 31 capacitance 20 pf 4 figure 1 capacitance table (v in = 0v, f = 1 mhz, t a = 25 o c) oh ol i i current source current source vz = 1.5v (bipolar supply) device under test ceff = 50pf -+ + truth table mode oe\ ce\ we\ i/o power read l l h q active write x l l d active standby x h x high z standby not selected h l h high z active sram as8s128k32 as8s128k32 rev. 4.3 01/10 micross components reserves the right to change products or speci cations without notice. 4 electrical characteristics and recommended ac operating conditions (note 5) (-55 c ta 125c; vcc = 5v 10%) symbol min max min max min max min max min max min max units notes read cycle read cycle time t rc 15 17 20 25 35 45 ns address access time t aa 15 17 20 25 35 45 ns chip enable access time t ace 15 17 20 25 35 45 ns output hold from address change t oh 22 2 2 2 2 ns chip enable to output in low-z t lzce 2 2 2 2 2 2 ns 4, 6, 7 chip disable to output in high-z t hzce 7 8 9 10 14 15 ns 4, 6, 7 chip enable to power-up time t pu 00 0 0 0 0 4 chip disable to power-down time t pd 15 17 20 25 35 45 4 output enable access time t aoe 6 7 7 8 12 12 ns output enable to output in low-z t lzoe 00 0 0 0 0 ns4, 6 output disable to output in high-z t hzoe 6 7 7 9 12 12 ns 4, 6, 7 write cycle write cycle time t wc 15 17 20 25 35 45 ns chip enable to end of write t cw 12 12 15 17 20 22 ns address valid to end of write t aw 12 12 15 17 20 22 ns address setup time t as 00 0 0 0 0 ns address hold from end of write t ah 11 1 1 1 1 ns write pulse width t wp1 12 1 12 1 15 17 20 20 ns write pulse width t wp2 12 1 12 1 15 17 20 20 ns data setup time t ds 8 9 10 12 15 15 ns data hold time t dh 11 1 1 1 1 ns write disable to output in low-z t lzwe 2 2 2 2 2 2 ns 4, 6, 7 write enable to output in high-z t hzwe 7 9 10 11 14 15 ns 4, 6, 7 -35 -45 description -20 -25 -17 -15 notes: 1) for oe\ = high condition. for oe\ = low condition t wp1 = t wp2 = 15 ns min. sram as8s128k32 as8s128k32 rev. 4.3 01/10 micross components reserves the right to change products or speci cations without notice. 5 7. at any given temperature and voltage condition, t hzce , is less than t lzce , and t hzwe is less than t lzwe . 8. ? w / e is high for read cycle. 9. device is continuously selected. chip enables and output enable are held in their active state. 10. address valid prior to or coincident with latest occurring chip enable. 11. t rc = read cycle time. 12. chip enable ( ? c / e) and write enable ( ? w / e) can initiate and terminate a write cycle. 13. 32 bit operation notes 1. all voltages referenced to v ss (gnd). 2. -3v for pulse width <20ns. 3. i cc is dependent on output loading and cycle rates. the speci ed value applies with the outputs 4. this parameter is sampled. 5. test conditions as speci ed with output loading as shown in fig. 1 unless otherwise noted. 6. t hzce , t hzoe and t hzwe are speci ed with c l = 5pf as in fig. 2. transition is measured +/- 200 mv typical from steady state coltage, allowing for actual tester rc time constant. open, and f= h z. t rc(min) 1 low v cc data retention waveform data retention electrical characteristics description symbol min max units notes v cc for retention data v dr 2--v ce\ > v cc - 0.2v v cc = 2.0v i ccdr -- 6 ma v in > v cc - 0.2v v cc = 3v i ccdr -- 11.6 ma chip deselect to data retention time t cdr 0--ns4 operation recovery time t r t rc ns 4, 11 data retention current conditions tr tcdr data retention mode data retention mode vdr vdr vcc ce\ 4.5v 4.5v >2v v ih v il sram as8s128k32 as8s128k32 rev. 4.3 01/10 micross components reserves the right to change products or speci cations without notice. 6 read cycle no. 2 (7,8,10) read cycle no. 1 (8,9) taa toh trc trc previous data valid valid data valid address dq tpd tpu thzce tace tlzce thzoe tlzoe taoe trc trc data valid ce\ oe\ dq icc sram as8s128k32 as8s128k32 rev. 4.3 01/10 micross components reserves the right to change products or speci cations without notice. 7 write cycle no. 1 (chip enable controlled) write cycle no. 2 (write enable controlled) tdh tds twp1 twp1 tah tcw taw tcw tas twc twc high z data vaild address ce\ we\ d q tlzwe thzwe tdh tds twp2 twp2 tas tcw tah taw tcw twc twc data valid address valid address ce\ we\ d q sram as8s128k32 as8s128k32 rev. 4.3 01/10 micross components reserves the right to change products or speci cations without notice. 8 mechanical definitions* micross case #702 (package designator q) smd 5962-95595, case outline m *all measurements are in inches. min max a 0.123 0.200 a1 0.118 0.186 a2 0.005 0.015 b b 0.013 0.017 d d1 0.870 0.890 d2 0.980 1.000 e 0.936 0.956 e r l1 0.035 0.045 0.505 bsc 0.010 typ micross specifications symbol 0.010 ref 0.800 bsc a a2 see detail a e3 detail a l1 1 o - 7 o r b d2 d1 d b e sram as8s128k32 as8s128k32 rev. 4.3 01/10 micross components reserves the right to change products or speci cations without notice. 9 mechanical definitions* micross case (package designator q1) smd 5962-95595, case outline a *all measurements are in inches. min max a --- 0.200 a1 0.054 --- b 0.013 0.017 b c 0.00 9 0.012 d/e 0. 9 80 1.000 d1/e1 0.870 0.8 9 0 d2/e2 e l 0.035 0.045 r symbol smd specifications 0.010 typ 0.010 typ 0.800 bsc 0.050 bsc sram as8s128k32 as8s128k32 rev. 4.3 01/10 micross components reserves the right to change products or speci cations without notice. 10 mechanical definitions* *all measurements are in inches. micross case #802 (package designator p & pn) smd 5962-93187, case outline 4 and 5 a a1 l b e b1 4 x d d1 d2 e1 pin 66 e pin 11 pin 1 (identi ed by 0.060 square pad) pin 56 b2 min max a 0.135 0.195 a1 0.025 0.035 symbol 1.000 bsc smd specifications sram as8s128k32 as8s128k32 rev. 4.3 01/10 micross components reserves the right to change products or speci cations without notice. 11 ordering information *available processes it = industrial temperature range -40 o c to +85 o c xt = extended temperature range -55 o c to +125 o c 883c = full military processing -55 o c to +125 o c package notes p = pins 8, 21, 28, and 39 are grounds. pn = pins 8, 21, 28, and 39 are no connects. device number package type speed ns process device number package type speed ns process as8s128k32 q -15 /* as8s128k32 q1 -15 /* as8s128k32 q -17 /* as8s128k32 q1 -17 /* as8s128k32 q -20 /* as8s128k32 q1 -20 /* as8s128k32 q -25 /* as8s128k32 q1 -25 /* as8s128k32 q -35 /* as8s128k32 q1 -35 /* as8s128k32 q -45 /* as8s128k32 q1 -45 /* device number package type speed ns process as8s128k32 as8s128k32 p pn -15 -15 /* /* as8s128k32 as8s128k32 p pn -17 -17 /* /* as8s128k32 as8s128k32 p pn -20 -20 /* /* as8s128k32 as8s128k32 p pn -25 -25 /* /* as8s128k32 as8s128k32 p pn -35 -35 /* /* as8s128k32 as8s128k32 p pn -45 -45 /* /* example: as8s128k32q-25/xt example: as8s128k32pn-20/883c example: as8s128k32q1-15/it sram as8s128k32 as8s128k32 rev. 4.3 01/10 micross components reserves the right to change products or speci cations without notice. 12 micross to dscc part number cross reference micross package designator q micross part # smd part # as8s128k32q-55/883c 5962-9559505hma as8s128k32q-55/883c 5962-9559505hmc as8s128k32q-45/883c 5962-9559506hma as8s128k32q-45/883c 5962-9559506hmc as8s128k32q-35/883c 5962-9559507hma as8s128k32q-35/883c 5962-9559507hmc as8s128k32q-25/883c 5962-9559508hma as8s128k32q-25/883c 5962-9559508hmc as8s128k32q-20/883c 5962-9559509hma as8s128k32q-20/883c 5962-9559509hmc as8s128k32q-17/883c 5962-9559510hma as8s128k32q-17/883c 5962-9559510hmc micross part # smd part # as8s128k32q-55/883c 5962-9559512hma as8s128k32q-55/883c 5962-9559512hmc as8s128k32q-45/883c 5962-9559513hma as8s128k32q-45/883c 5962-9559513hmc as8s128k32q-35/883c 5962-9559514hma as8s128k32q-35/883c 5962-9559514hmc as8s128k32q-25/883c 5962-9559515hma as8s128k32q-25/883c 5962-9559515hmc as8s128k32q-20/883c 5962-9559516hma as8s128k32q-20/883c 5962-9559516hmc as8s128k32q-17/883c 5962-9559517hma as8s128k32q-17/883c 5962-9559517hmc please note, -15 not currently available on the smd's. micross package designator q1 micross part # smd part # as8s128k32q1-55/883c 5962-9559505haa as8s128k32q1-55/883c 5962-9559505hac as8s128k32q1-45/883c 5962-9559506haa as8s128k32q1-45/883c 5962-9559506hac as8s128k32q1-35/883c 5962-9559507haa as8s128k32q1-35/883c 5962-9559507hac as8s128k32q1-25/883c 5962-9559508haa as8s128k32q1-25/883c 5962-9559508hac as8s128k32q1-20/883c 5962-9559509haa as8s128k32q1-20/883c 5962-9559509hac as8s128k32q1-17/883c 5962-9559510haa as8s128k32q1-17/883c 5962-9559510hac micross part # smd part # as8s128k32q1-55/883c 5962-9559512haa as8s128k32q1-55/883c 5962-9559512hac as8s128k32q1-45/883c 5962-9559513haa as8s128k32q1-45/883c 5962-9559513hac as8s128k32q1-35/883c 5962-9559514haa as8s128k32q1-35/883c 5962-9559514hac as8s128k32q1-25/883c 5962-9559515haa as8s128k32q1-25/883c 5962-9559515hac as8s128k32q1-20/883c 5962-9559516haa as8s128k32q1-20/883c 5962-9559516hac as8s128k32q1-17/883c 5962-9559517haa as8s128k32q1-17/883c 5962-9559517hac micross package designator p & pn micross part # smd part # as8s128k32p-55/883c 5962-9318705h5a as8s128k32p-55/883c 5962-9318705h5c as8s128k32p-45/883c 5962-9318706h5a as8s128k32p-45/883c 5962-9318706h5c as8s128k32p-35/883c 5962-9318707h5a as8s128k32p-35/883c 5962-9318707h5c as8s128k32p-25/883c 5962-9318708h5a as8s128k32p-25/883c 5962-9318708h5c as8s128k32p-20/883c 5962-9318709h5a as8s128k32p-20/883c 5962-9318709h5c as8s128k32p-17/883c 5962-9318710h5a as8s128k32p-17/883c 5962-9318710h5c micross part # smd part # as8s128k32pn-55/883c 5962-9318705h4a as8s128k32pn-55/883c 5962-9318705h4c as8s128k32pn-45/883c 5962-9318706h4a as8s128k32pn-45/883c 5962-9318706h4c as8s128k32pn-35/883c 5962-9318707h4a as8s128k32pn-35/883c 5962-9318707h4c as8s128k32pn-25/883c 5962-9318708h4a as8s128k32pn-25/883c 5962-9318708h4c as8s128k32pn-20/883c 5962-9318709h4a as8s128k32pn-20/883c 5962-9318709h4c as8s128k32pn-17/883c 5962-9318710h4a as8s128k32pn-17/883c 5962-9318710h4c sram as8s128k32 as8s128k32 rev. 4.3 01/10 micross components reserves the right to change products or speci cations without notice. 13 document title 128k x 32 sram, sram memory array revision history rev # history release date status 4.2 updated iccdr(2v) limit from 6ma to 8ma june 2008 release 4.3 added micross information january 2010 release |
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