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  general description the edi7f328xdnsn and edi7f 2328 xdnsn are organized as one and two banks of 8m x 32 respectively. the modules are based on intel's e28f640j3, 8m x 8 / 4m x 16 device family. both modules offer access times of 120-150ns features 8m x 32 and 2 x 8m x 32 densities based on intel's strataflash (j3) family of flash devices e28f640j3 (64) 128kb erase blocks (symetrical) high performance interface async page mode reads 120/25 ns read access time 2.7v - 3.6v vcc operation 128 bit protection register; 64 bit unique device identifier 64 bit user programmable otp cells common flash interface (cfi) scaleable command set (scs) 32 byte write buffer, 64m total erase cycles 100,000 erase cycles per block package 80 pin simm capacitance functional block pin configurations electronic designs, inc. edi7f328xdnsn / EDI7F2328XDNSN datasheet advance 8m x 32 / 2 x 8m x 32; intel j3 ba sed, flash electronic designs, inc., one research drive, westborough ma. 01581 tel# (508)366-5151 fax # (508)836-4850 rev. 0.1 9/00 commercial product marketing 8m x 8 8m x 8 8m x 8 8m x 8 w0\ w1\ w2\ w3\ a0-a22 e0\ g\ 8m x 8 8m x 8 8m x 8 8m x 8 w0\ w1\ w2\ w3\ a0-a22 e0\ g\ w0\ w1\ w2\ w3\ e0\ g\ 8m x 8 8m x 8 8m x 8 8m x 8 w0\ w1\ w2\ w3\ a0-a22 e1\ g\ w0\ w1\ w2\ w3\ e0\ g\ dq0-7 dq8-15 dq16-23 dq24-31 dq0-7 dq8-15 dq16-23 dq24-31 dq0-7 dq8-15 dq16-23 dq24-31 edi7f328dnsn; EDI7F2328XDNSN; 8m x 32 2 x 8m x 32 strataflash strataflash 8m x 32 2 x 8m x 32 parameter sym max max unit address lines data lines chip & write enable lines output enable lines ca cdq cg 35 15 15 35 cg 70 30 30 70 pf pf pf pf pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 p- name pin# 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 pin# 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 p- name p- name pin# 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 p- name 60 vss vcc nc g\ w0\ w1\ nc dq16 dq17 dq18 dq19 dq20 dq21 dq22 dq23 dq24 dq25 dq26 dq27 dq28 nc nc * * vss dq29 dq30 dq31 w2\ a22 a21 a20 a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 w3\ vss dq15 dq14 dq13 dq12 dq11 dq10 dq9 dq8 dq7 dq6 dq5 dq4 dq3 dq2 dq1 dq0 nc vcc pd1 pd2 pd3 pd4 pd5 pd6 pd7 vss * simm density 32mb pin 24=e0\ pin 23=nc 64mb pin 24=e0\ pin 23=e1\
mechanical ordering information electronic designs, inc. edi7f328xdnsn / EDI7F2328XDNSN datasheet advance 8m x 32 / 2 x 8m x 32; intel j3 ba sed, flash electronic designs, inc., one research drive, westborough ma. 01581 tel# (508)366-5151 fax # (508)836-4850 rev. 0.1 9/00 commercial product marketing 32megabyte wed7f328xdnsn100c 8m x 32 module @100ns based on intel e28f640j3 (10%vcc); 80 pad simm wed7f328xdnsn120c 8m x 32 module @120ns based on intel e28f640j3 (10%vcc). 80 pad simm wed7f328xdnsn150c 8m x 32 module @150ns based on intel e28f640j3 (10%vcc), 80 pad simm 64megabyte wed7f2328xdnsn100c 2 x 8m x 32 module @100ns, based on intel e28f640j3 (10%vcc), 80 pad simm wed7f2328xdnsn120c 2 x 8m x 32 module @120ns, based on intel e28f640j3 (10%vcc), 80 pad simm wed7f2328xdnsn150c 2 x 8m x 32 module @150ns, based on intel e28f640j3 (10%vcc), 80 pad simm


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