original creation date: 07/28/94 last update date: 08/04/94 last major revision date: 07/28/94 mncopcg-xxx/v-mrp rev 0b0 military data sheet single-chip microcmos microcontroller general description the cop888 family of microcontrollers uses an 8-bit single chip core architecture fabricated with national semiconductor's m2-cmos(tm) process technology. the cop888cg is a member of this expandable 8-bit core processor family of microcontrollers. they are fully static parts, fabricated using double-metal silicon gate microcmos technology. features include an 8-bit memory mapped architecture, microwire/plus serial i/o, three 16-bit timer/counters supporting three modes (processor independent pwm generation, external event counter, and input capture mode capabilities), full duplex uart, two comparators, and two power savings modes (halt and idle), both with a multi-sourced wakeup/interrupt capability. this multi-sourced interrupt capability may also be used independent of the halt or idle modes. each i/o pin has software selectable configurations. the devices operate over a voltage range of 2.5v to 6v. high throughput is achieved with an efficient, regular instruction set operating at a maximum of 1us per instruction rate. ns part numbers copcg-xxx/v-mpc industry part number cop888cg prime die cop8cg88 processing hermetic - mil-std-883, method 5004 plastic - sop-5-264 quality conformance inspection hermetic - mil-std-883, method 5005 plastic - sop-5-264 subgrp description temp ( c) o 1 static tests at +25 2 static tests at +85 3 static tests at -55 4 dynamic tests at +25 5 dynamic tests at +85 6 dynamic tests at -55 7 functional tests at +25 8a functional tests at +85 8b functional tests at -55 9 switching tests at +25 10 switching tests at +85 11 switching tests at -55 1
military data sheet mncopcg-xxx/v-mrp rev 0b0 features - fully static cmos, with low current drain - two power saving modes: halt and idle - 1us instruction cycle time - 4096 bytes on-board rom (cop888cg) - 192 bytes on-board ram (cop888cg) - single supply operation: 2.5v-6v - full duplex uart - two analog comparators - microwire/plus(tm) serial i/o - watchdog(tm) and clock monitor logic - idle timer - multi-input wakeup (miwu) with optional interrupts (8) - three 16-bit timers, each with two 16-bit registers supporting: - processor independent pwm mode - external event counter mode - input capture mode - 8-bit stack pointer sp (stack in ram) - two 8-bit register indirect data memory pointers (b and x) - fourteen multi-source vectored interrupts servicing - external interrupt - idle timer t0 - three timers (each with 2 interrupts) - mircowire/plus - multi-input wake up - software trap - uart (2) - default vis - versatile instruction set - true bit manipulation - memory mapped i/o - bcd arithmetic instructions - package: - 44 plcc with 39 i/o pins - software selectable i/o options - tri-state(r) output - push-pull output - weak pull up input - high impedance input - schmitt trigger inputs on ports g and l - temperature range: -55 c to +85 c - form factor emulation devices - real time emulation and full program debug offered by national's development systems 2
military data sheet mncopcg-xxx/v-mrp rev 0b0 (absolute maximum ratings) (note 1) supply voltage (vcc) 7v voltage at any pin -0.3v to vcc + 0.3v total current into vcc pin (source) 100ma total current out of gnd pin (sink) 110ma storage temperature range -65 c to +140 c note 1: absolute maximum ratings indicate limits beyond which damage to the device may occur. dc and ac electrical specifications are not ensured when operating the device at absolute maximum ratings. 3
mncopcg-xxx/v-mrp rev 0b0 military data sheet electrical characteristics dc parameters symbol parameter conditions notes pin- name min max unit sub- groups operating voltage 2.5 6 v 1, 2, 3 supply current cki = 10mhz, vcc = 6.0v, tc = 1us 1 12.5 ma 1, 2, 3 cki = 4mhz, vcc = 6.0v, tc = 2.5us 1 5.5 ma 1, 2, 3 cki = 4mhz, vcc = 4.0v, tc = 2.5us 1 2.5 ma 1, 2, 3 cki = 1mhz, vcc = 4.0v, tc = 10us 1 1.4 ma 1, 2, 3 halt current cki = 0mhz, vcc = 6.0v 2 10 ua 1, 2, 3 cki = 0mhz, vcc = 4.0v 2 6 ua 1, 2, 3 idle current cki = 10mhz, vcc = 6.0v, tc = 1us 3.5 ma 1, 2, 3 cki = 4mhz, vcc = 6.0v, tc = 2.5us 2.5 ma 1, 2, 3 cki = 1mhz, vcc = 4.0v, tc = 10us 0.7 ma 1, 2, 3 vih input levels reset logic high 0.8vcc v 1, 2, 3 vil input levels reset logic low 0.2vcc v 1, 2, 3 vih input levels cki, all other inputs logic high 0.7vcc v 1, 2, 3 vil input levels cki, all other inputs logic low 0.2vcc v 1, 2, 3 hi-z input leakage vcc = 6.0v, vin = 0v -2 2 ua 1, 2, 3 input pullup current vcc = 6.0v, vin = 0v 40 250 ua 1, 2, 3 output current d outputs source, vcc = 4.0v, voh = 3.3v .4 ma 1, 2, 3 source, vcc = 2.5v, voh = 1.8v .2 ma 1, 2, 3 sink, vcc = 4.0v, vol = 1.0v 10 ma 1, 2, 3 sink, vcc = 2.5v, vol = 0.4v 2 ma 1, 2, 3 4
mncopcg-xxx/v-mrp rev 0b0 military data sheet electrical characteristics dc parameters(continued) symbol parameter conditions notes pin- name min max unit sub- groups output current all others source (weak pull-up) vcc=4.0v, voh=2.7v 10 110 ua 1, 2, 3 source (weak pull-up) vcc=2.5v, voh=1.8v 2.5 33 ua 1, 2, 3 source (push-pull mode) vcc = 4.0v, voh = 3.3v .4 ma 1, 2, 3 source (push-pull mode) vcc = 2.5v, voh = 1.8v .2 ma 1, 2, 3 sink (push-pull mode) vcc=4.0v, vol=0.4v 1.6 ma 1, 2, 3 sink (push-pull mode) vcc=2.5v, vol=0.4v .7 ma 1, 2, 3 tri-state leakage vcc = 6v -2 2 ua 1, 2, 3 vr ram retention voltage 500ns rise and fall time (min) 2 v 1, 2, 3 5
mncopcg-xxx/v-mrp rev 0b0 military data sheet electrical characteristics ac parameters symbol parameter conditions notes pin- name min max unit sub- groups tc instruction cycle time crystal/resonator 4v <= vcc =< 6v 1 dc us 9, 10, 11 2.5 = vcc =< 4v 2.5 dc us 9, 10, 11 tc instruction cycle time r/c oscillator mode 4v <= vcc =< 6v 3 dc us 9, 10, 11 2.5 <= vcc =< 4v 7.5 dc us 9, 10, 11 tpd1, tpd0 output propagation delay so, sk, rl = 2.2k, cl = 100pf, 4v <= vcc =< 6v 3 .7 us 9, 10, 11 so, sk, rl = 2.2k, cl = 100pf, 2.5v <= vcc =< 4v 3 1.75 us 9, 10, 11 all others, rl = 2.2k, cl = 100pf, 4v <= vcc =< 6v 3 1 us 9, 10, 11 all others, rl = 2.2k, cl = 100pf, 2.5v <= vcc =< 4v 3 2.5 us 9, 10, 11 input pulse width interrupt input high time 4 1 tc 9, 10, 11 input pulse width interrupt input low time 4 1 tc 9, 10, 11 input pulse width timer input high time 4 1 tc 9, 10, 11 input pulse width timer input low time 4 1 tc 9, 10, 11 reset pulse width 1 us 9, 10, 11 input offset voltage .4v <= vin =< vcc -1.5v +25 mv 9, 10, 11 input common mode voltage range .4 vcc -1.5 v 9, 10, 11 low level output current vol = 0.4v 1.6 ma 9, 10, 11 high level output current voh = 4.6v 1.6 ma 9, 10, 11 note 1: supply current measured after running 2000 cycles with a square wave cki input, cko open, inputs at rails and outputs open. note 2: the halt mode will stop cki from oscillating in the rc and the crystal configurations. measurement of idd halt is done with device neither sourcing or sinking current; with l, c, and g0-g5 programmed as low outputs and not driving a load; all inputs tied to vcc; clock monitor and comparators disabled. parameter refers to halt mode entered via setting bit 7 of the g port data register. part will pull up cki during halt in crystal clock mode. 6
mncopcg-xxx/v-mrp rev 0b0 military data sheet (continued) note 3: the output propagation delay is referenced to the end of the instruction cycle where the output change occurs. note 4: tc = instruction cycle time. 7
mncopcg-xxx/v-mrp rev 0b0 burn-in/qci electrical end-point tests op# operation description sub-groups 01 mrp, b4 - must be performed within 48 hours of moisture 1,9 02 mrp, c1 - must be performed within 96 hours of burn-in 1,9 03 mrp, c1 2,3,10,11 04 mrp, c2 - must be performed within 48 hours of moisture 1,9 05 mrp, d2 1,9 06 mrp, d3 1,2,9,10 07 mrp, d4 - test between precondition and temp. cycle 1,9 08 mrp, d4 1,2,9,10 graphics and diagrams graphics# description v44ark plastic chip carrier,sq,.050ld pitch,44ld(p/p dwg) see attached graphics following this page. 8
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