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  epc700/epc702 24v/50ma general-purpose output-driver general description the epc70x family is a general purpose low-side power switch for 24v interfaces. a high-side switch is also available, please refer to the separate data sheet of epc701/703. the device is very easy to use and capable to drive a load of 50ma at 30vdc. if a higher driving current is necessary or if the output voltage shall be higher than 30vdc, these chips can be used to drive an external power transistor. in this mode of operation, the external tran sistor is fully protected against over-current by the epc chip. if the current through the external load exceeds a specified threshold during a longer time period than a predefined time, the output is turned off to protect the output switch. the switch is turned on again after a predefined off-time, thus enabling the load again in a self-healing mechanism. the over-current information is indicated on the status pin. epc700 and epc702 are easy to use and reduce the need of ex - ternal components to the minimum, thus saving pcb space and money. features ? low-side power switch ? driving capability without external transistor 50 ma/30vdc ? programmable short-circuit detection delay-time and recovery time ? static (epc700) or flashing (epc702) indication of the over-current status ? self-healing output mode ? available in csp6 package with very small footprint and standard qfn16 package applications ? plc ? sensors ? controllers functional block diagram 25.05.2011 page 1 file: unbenannt this document is confidential and protected by law and international trades. it must not be shown to any third party nor be copied in any form without our written permission . functional block diagram epc70x lst in status gnd control logic configuration registers i sink i source out sense r sense over current sense + C + ref vdd over-current delay / release gnd gnd gnd gnd ? 2011 espros photonics corporation characteristics subject to change without notice 1 datasheet epc700_702 - v2.2 www.espros.ch
epc700/epc702 absolute maximum ratings (note 1 ) recommended operating conditions power supply voltage v dd maximum power dissipation storage temperature range (t s ) lead temperature solder, 4 sec. (t l ) -0.3 to +36.0 v (note 2) 100mw -40c to +85c +260c power supply voltage (v dd ) operating temperature (t o ) humidity (non-condensing) min. 9.6 -40 +5 max. 30 +85 +95 units v c % note 1: absolute maximum ratings indicate limits beyond which damage to the device may occur. recommended operating conditions indi - cate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. for guaranteed specifica - tions and test conditions, see electrical characteristics. note 2: supply voltages up to 36 volts may be present for 10 seconds only. note 3: this device is a highly sensitive cmos amplifier with an esd rating of jedec hbm class 1c (>1kv). handling and assembly of this device should only be done at esd protected workstations. electrical characteristics v dd = 9.6v < v dd < 30v, -40c < t a < +85c symbol parameter conditions/comments values units min. typ. max. v dd supply voltage 9.6 30 v v dd ripple on supply voltage peak-peak 10 %v dd i dd supply current no load 300 400 a v out output voltage 0 30 v v sat output saturation voltage @50ma output current 1 2 v i sens sens current current trigger threshold -50 -60 -70 ma v sens current sens voltage over-current trigger threshold voltage (by using an external power switch) 0.18 0.2 0.25 v i peak short circuit peak current initial current during a short circuit (<1ms, 50 series resistor) -0.5 a v status st atus output logical high 2 5.5 v logical low -0.3 0.8 sink driving capability -8 -10 -12 ma f status status output frequency epc702 only, duty cycle 50% 1.5 1.7 1.9 hz v in input logical high 2.0 5.5 v logical low -0.3 0.8 hysteresis 0.25 pull-down resistance 100 150 200 k p dis power dissipation on-chip power dissipation 100 mw t on response time on 1.0 1.2 s t off response time off 0.7 1.0 s t del off-delay time time between over-current detection and status/out change (default value), refer to section programming 40.0 50.0 60.0 s programmable off-delay values 5/10/20/50/100/200/500/1,000 t minoff recovery time minimum down time of the out pin to protect the external transistor (default value), refer to section programming 400 500 600 ms programmable values 10/20/50/100/200/500/1,000/ 1,500 f rt short circuit recovery delay time factor t minoff /t delay = f rt (when used without external driver transistor, refer to section over-current reset sequence ) 1,000 t startup start-up time vdd ramp > 100 v/ms 200 s c l_max external load capacitance load capacitance that can be driven through out without triggering over-current @2kohm load and 5s delay time 30 nf ? 2011 espros photonics corporation characteristics subject to change without notice 2 datasheet epc700_702 - v2.2 www.espros.ch
epc700/epc702 connection diagrams pin connection csp6 epc70x lst top view 6 5 4 1 2 3 gnd sens in out status v dd 03.08.2010 page 1 file: this document is confidential and protected by law and international trades. it must not be shown to any third party nor be copied in any form without our written permission . pin connections qfn16-veed- 1vn4 lst 03.08.2010 page 1 file: this document is confidential and protected by law and international trades. it must not be shown to any third party nor be copied in any form without our written permission . top view 1 2 3 4 5 6 7 8 9 10 11 12 1 3 1 4 1 5 1 6 gnd in status v dd sens out 6-pin chip scale package (csp) 16-pin qfn package 6-pin csp 16-pin qfn pin name description 1 8 gnd negative power supply pin 2 7 in input from the controller 3 5 status output status signal to the controller 4 16 v dd positive power supply pin 5 14 sens input either to switch internal/external mode or to measure the voltage drop on an external shunt resistor to detect over-current 6 13 out output n/a 1-4, 6, 9-12, 15 nc not connected. connect these pins to gnd. ? 2011 espros photonics corporation characteristics subject to change without notice 3 datasheet epc700_702 - v2.2 www.espros.ch
epc700/epc702 functional description normal operation during typical operation the out follows the in as shown in figure 1 . as long as the output current does not exceed the current threshold, out is stable on and status is stable high-z. the delay from in to out is defined as t on and t off for the rising and the falling edge respectively. please note that the status of the pin out is dependent whether the chip is operated with or without external driver transistor. in the subsequent diagrams, the version with external driver transistor is shown only. over-current sequence a short on the load side will lead to an over-current through out. if an over-current stays longer than the time t del and t ext , out is turned off as shown in the figure below. at the same time status changes its state to indicate an over-current situation to an external controller. status can also be used to drive directly an indicator led due to its 10ma driving capability. epc700 delivers a constant on-signal, whereas epc702 has a flashing output. note: the parameter t ext used in this paper is described in figure 7 . ? 2011 espros photonics corporation characteristics subject to change without notice 4 datasheet epc700_702 - v2.2 www.espros.ch figure 1 : normal operation timing diagram operation mode epc700 lst in out (without external transistor) status epc700 short sens high-z 05.01.2011 page 1 file: this document is confidential and protected by law and international trades. it must not be shown to any third party nor be copied in any form without our written permission . 05.01.2011 page 1 file: this document is confidential and protected by law and international trades. it must not be shown to any third party nor be copied in any form without our written permission . t led t led t led t led t led t led t led t led status epc702 0 0 high-z 0 v th sens high-z t off t on out (with external transistor) v sat vdd v sat figure 2 : short circuit detection timing diagram typical overcurrent epc700 lst v th sens t del t ext in out status epc700 short sens high-z 04.08.2010 page 1 file: this document is confidential and protected by law and international trades. it must not be shown to any third party nor be copied in any form without our written permission . status epc702 0 0 0 0 t led high-z
epc700/epc702 current peak at out a short current peak when out is turned on, typically generated by a capacitive load, could trigger the short-circuit protection logic. however, if the current peak is shorter than t ext plus t del , the over-current peak will be ignored. make sure that the energy drawn by such a current peak does not destroy the internal/external output transistor. over-current reset sequence if there is a permanent short circuit at out, such short circuit will be detected and out is turned off. after a waiting time t minoff , the device tries to turn on out again. if the short circuit is still present, out is immediately turned off again. this sequence continues until the short circuit is removed or in goes to low or power is turned off. this mode is called self-healing since the device tries to self-heal the short circuit end to switch back into normal operation. as a consequence in the case of a permanent over-current , short current peaks are issued into the load, respectively short. the time t minoff has to be set to a value that the internal/external switch cannot be damaged by a too high power dissipation. without an exter - nal switch, the time t minoff has to be 1,000 times longer than the time t del . if one wants to reduce the waiting time in case of a short circuit situation, it can be done by simply taking in to a low state and then to high again. please refer to the timing diagram in figure 5 . however, make sure that the maximum power dissipation of the chip or the external switching transistor will never be exceeded above the allowed maximum. ? 2011 espros photonics corporation characteristics subject to change without notice 5 datasheet epc700_702 - v2.2 www.espros.ch figure 3 : short over-current pulse, i.e., by switching a capacitive load timing diagram not enough overcurrent epc700 lst v th sens epc700/epc702 application information epc700 and epc702 have two modes of operation, where the sens pin is used to define the mode. when sens is tied to vdd, the chip operates as a sink driver capable to sink max. 50ma at 30vdc (refer to figure 6 ). the load is connected directly between v l and the out pin. if the current through the internal switch exceeds i sens , the switch is turned off. if the sens pin is at low level, the out pin is driven by a source driver also capable to drive 50ma into an external power transistor. this mode is used if the required output current has to be higher than 50ma, e.g. 1a and the output voltage exceeds 30vdc (refer to figure 7 ). the load current is measured by monitoring the voltage drop over a resistor. if the internal switch is used, also the current measurement resistor is located internally ( figure 6 ). in the case of using an external power transistor as shown in figure 7 , the current measurement resistor r s has to be placed externally. if the voltage drop at r s exceeds the threshold of 200 mv, the output stage is deactivated. the timing diagrams of the signals can be found in section functional description. the in signal must be low during power-up (t startup ) for proper function of the chip. the epc70x has a built in pull down resistor , so not external active driving is needed during startup. epc700 or epc702 using the internal switch figure 6 shows the epc700/702 in the mode using the internal switch. to enable this mode, the sens pin has to be connected to vdd. note that the vdd of the chip and v l at the load can have a different value. the values for both vdd and v l need to be between 9.6 and 30v. the factor f rt between minimum off-time and delay-time must be maintained in order not to damage the chip due to overheating. t his factor h as to be higher th a n 1,000 . in the w orst case scenario a peak current of approx. 0.5 a is flowing from v l at 30v into the chip with a t del set at 50s if a short -circuit occurs. if the recovery time t minoff in this case i s smaller then 50ms , the average power dissipation would exceed the safe operation condition and the device will get damage d . the diode d 1 is to protect the internal switch against voltage surges when inductive loads are turned off. r1 is to protect the internal switch in case of a short circuit on the load when a very low impedance power supply is used. the voltage v l can be higher than vdd in this configuration. however, it must not be above the maximum value of 'supply voltage' stated in the table electrical characte - ristics . epc700 or epc702 using an external switching transistor figure 7 shows the operation mode using an external switch t 1 in order to extend the output current/voltage drive capability. in this example, a bipolar transistor is used, whereas the base current is limited by the resistor r b . the maximum base current is 50ma. in order not to damage the chip, the user has to select the resistor r b such that chip does not need to drive more than 50ma. other possible switches are a npn bjt or an n-channel mosfet. the load is turned on and off by setting the pin in to high respectively to low level. when the load is turned on, the load current flows from v l through the resistor r s and through the transistor t 1 to gnd. this current creates a voltage drop over r s . the resulting voltage is applied to pin sens, which measures the voltage drop. if it exceeds the threshold of an internal comparator, set to 200mv, the output is turned off after the given delay time t del . if the delay time should be extended to a value above the possible settings of t del (refer to table 3 ), an rc network can added, designated as r t and c t in figure 7 . the additional time delay t ext can be calculated approx. as r t x c t . however, the time varies according to the current through r s . this design concept is especially useful, when a large capacitor in the load path needs to be charged. the additional delay in the over-current detection helps in such a situation. note that the vdd of the chip and v l on the load are different in most of the applica - tions. the value of vdd must be between 9.6 and 30v. v l instead, can be on a level which is appropriate to the external switching transistor. the diode d 1 is to protect the transistor t 1 against voltage surges when inductive loads are turned off. ? 2011 espros photonics corporation characteristics subject to change without notice 6 datasheet epc700_702 - v2.2 www.espros.ch dieter k?gi 25.05.2011 page 1 file: unbenannt this document is confidential and protected by law and international trades. it must not be shown to any third party nor be copied in any form without our written permission . gnd gnd vdd in status epc700 epc702 sense out vdd d l r l r1 50 c t gnd vdd in status epc700 epc702 sense out gnd r t r sense t1 r1 v l vdd d l r l v l vdd max figure 6 : epc700 or epc702 using the internal switch to drive a load of up to 50ma /30vdc dieter k?gi 25.05.2011 page 1 file: this document is confidential and protected by law and international trades. it must not be shown to any third party nor be copied in any form without our written permission . gnd gnd vdd in status epc700 epc702 sense out vdd d l r l r1 50 c t gnd vdd in status epc700 epc702 sense out gnd r t r sense t1 r1 v l vdd d l r l v l vdd max figure 7 : epc700 or epc702 operation mode using an external switching transistor. in case of a short-circuit in the load the turn-off delay can be extended by an external rc network. this network adds t ext to the internal delay t del .
epc700/epc702 programming the time delay (t del ), until the output is turned off after the detection of an over-current condition can be programmed in order to adapt the ti - ming to specific requirements, i.e., if a capacitive load has to be operated or an external transistor allows other values. the default value is 50s which allows to charge a load capacitor of approx. 100 C 500nf without an external power transistor, dependent on the source impe - dance, the load impedance and the voltage v l . the time until the output is turned on again after a short circuit can be programmed as well (t minoff ). this self-healing mechanism is very use - ful because no operator interaction is necessary after a short circuit to enable normal function once the short circuit has been eliminated. the default value is 500ms which means that the device tries to turn the output on after 0.5s waiting time in the short circuit mode. this waiting time is recommended as long as t del is not changed. if t del has been changed, the parameter t minoff shall be changed accordingly in order to respect parameter f rt . the user has to ensure that the maximum operation conditions never exceed in order to avoid damage of the device. it is to note that the parameters programmed are stored in a non-volatile random access memory. thus, the parameters can be lost after a power down for longer than 5ms (data retention time @ 25 o c: min. 100ms ). the corresponding requirements for safety applications have to take in consideration. parameters can be changed as many times as necessary and even under operation to change the behavior of an output. during power-on, the default values are restored automatically. programming interface the interface to store changed parameters are the pins in and status. in is the chip select pin and status, which is under normal opera - tion an output, is used as an input pin. as long as the in pin is at low state, parameters can be stored through the status pin. since in is low during the programming of new parameters, out is low as well. the digital input high threshold is typically at 2.2v, thus a 5v compatible communication. please note that the voltage at status should not exceed 5.5v. single wire communication interface the epc70x is based on a single wire communication interface by using the status pin . programming is done by a 21-bit manchester code accor ding to ieee 802.4. clock (internal) 1 0 0 1 1 0 0 data manchester code figure 8 : m anchester encoding sample figure 8 shows such a sample m anchester encoded data-stream. the clock and the corresponding data is used to generate the m anchester data-stream. each positive clock - edge in the m anchester encoded data (indicated with the up - arrow) corresponds to a 1 and each negative clock - edge (indicated with the down - arrow) corresponds to a 0. data clock frequency range the communication frequency range has to be according to table 1 . minimal typical maximum data clock 396khz 450khz 540khz table 1 : frequency range for programming configuration bit stream for changing the delay time in order to guarantee a reliable communication with the manchester encoded bit stream on status, some additional bits have been added to the configuration bits. table 2 shows the digital pattern for the delay time configuration and the recovery time configuration. bit # 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 t del value 1 0 1 1 0 0 0 0 0 1 1 1 1 0 d1 d2 d3 1 d1 d2 d3 t minoff value 1 0 1 1 0 0 0 0 1 0 0 0 1 0 o1 o2 o3 1 o1 o2 o3 table 2 : configuration of the delay and the recovery time ? 2011 espros photonics corporation characteristics subject to change without notice 7 datasheet epc700_702 - v2.2 www.espros.ch
epc700/epc702 the delay time is set with d 1 , d 2 , and d 3 . the bits d 1 , d 2 , and d 3 are the inverted values of d 1 , d 2 , and d 3 . table 3 shows the value mapping table for the 8 different delay times. delay [s] d1 d2 d3 d1 d2 d3 comments 50 1 1 1 0 0 0 default value 5 1 1 0 0 0 1 10 1 0 1 0 1 0 20 1 0 0 0 1 1 100 0 1 1 1 0 0 200 0 1 0 1 0 1 500 0 0 1 1 1 0 1000 0 0 0 1 1 1 table 3 : delay-time programming table an un-configured chip is applying a default delay time of 50s corresponding to [d 1 , d 2 , d 3 ] = 000 and [d 1 , d 2 , d 3 ] = 111. the recovery time is set to o 1 , o 2 , and o 3 , resp. o 1 , o 2 , and o 3 which are the inverted values of o 1 , o 2 , and o 3 . table 4 shows the value mapping table for the 8 different recovery time delay values. recovery time [ms] o 1 o 2 o 3 o 1 o 2 o 3 comments 500 1 1 1 0 0 0 default value 10 1 1 0 0 0 1 20 1 0 1 0 1 0 50 1 0 0 0 1 1 100 0 1 1 1 0 0 200 0 1 0 1 0 1 1000 0 0 1 1 1 0 1500 0 0 0 1 1 1 table 4 : recovery time programming table an un-configured chip is applying the default recovery time of 500ms corresponding to [o 1 , o 2 , o 3 ] = 000 and [o 1 , o 2 , o 3 ] = 111. programming example an example for changing the delay time to 100s is shown in the following diagram: figure 9 : programming example to set t del to 100s ? 2011 espros photonics corporation characteristics subject to change without notice 8 datasheet epc700_702 - v2.2 www.espros.ch <name> file: this document is confidential and protected by law and international trades. it must not be shown to any third party nor be copied in any form without our written permission . 02.08.2010 page 1 <xx> clock 1 0 0 1 1 0 0 data manchester code 0 0 1 1 1 1 0 0 1 1 1 0 0 1 0 bit # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 <br> epc700/epc702 layout information (a ll measures in mm , <partname> <x000 000> <name> <data> m 1:1 din a4 <name> part name part no. designed approved scale page t h i s d o c u m e n t i s c o n f i d e n t i a l a n d p r o t e c t e d b y l a w a n d i n t e r n a t i o n a l t r a d e s . i t m u s t n o t b e s h o w n t o a n y t h i r d p a r t y n o r b e c o p i e d i n a n y f o r m w i t h o u t o u r w r i t t e n p e r m i s s i o n . file: unbenannt 1 26.02.2009 ) csp-6 package mechanical dimensions layout recommendations mechanical dimension csp6 lst 0.43 0.43 0 . 5 6 ? 0.12 1.4 +0.0/-0.1 1 . 0 + 0 . 0 / - 0 . 1 0 . 3 0 . 1 5 0 . 0 1 solder balls sn7.5ag2.5 08.02.2012 page 1 file: this document is confidential and protected by law and international trades. it must not be shown to any third party nor be copied in any form without our written permission . pin 1 0.43 0.43 0 . 5 6 ? 0.3 1.86 1 . 5 6 no solder mask inside this area 0.1524 qfn-16 package mechanical dimension qfn16 package lst top view 2 . 9 - 3 . 1 0.3 2.9 - 3.1 0 . 1 - 0 . 2 1.9 0.25 25.05.2011 page 1 file: this document is confidential and protected by law and international trades. it must not be shown to any third party nor be copied in any form without our written permission . 0.5 0 . 9 0 . 0 2 bottom view 0 . 2 5 1 . 9 ? 2011 espros photonics corporation characteristics subject to change without notice 9 datasheet epc700_702 - v2.2 www.espros.ch <br> epc700/epc702 reflow solder profile for infrared or conventional soldering the solder profile has to follow the recommendations of ipc/jedec j-std-020c (min. revision c) for pb-free assembly for both types of packages. the peak soldering t emperature (t l ) should not exceed +260c for a maximum of 4 sec. packaging information (all measures in mm) tape & reel information the devices are packaged into embossed tapes for automatic placement systems. the tape is wound on 178 mm (7 inch) or 330 mm (13 inch) reels and individually packaged for shipment. g eneral tape-and-reel specification data are available in a separate data sheet and indic - ate the tape sizes for various package types. further tape-and-reel specifications can be found in the electronic industries association (eia) standard 481-1, 481-2, 481-3. pin 1 8 pin 1 1 2 8 2 csp6 tape qfn16 tape pin 1 8 pin 1 1 2 8 4 csp6 tape qfn16 tape epc does not guarantee that there are no empty cavities in the tape. thus, the pick-and-place machine should check the presence of a chip during picking. ordering information part number package rohs compliance packaging method epc700-csp6 csp6 yes reel epc700-qfn16 qfn16 yes reel <a href='http://www.datasheet.hk/search.php?part=epc701-csp6&stype=part'>EPC701-CSP6</a> csp6 yes reel epc701-qfn16 qfn16 yes reel epc702-csp6 csp6 yes reel epc702-qfn16 qfn16 yes reel epc703-csp6 csp6 yes reel epc703-qfn16 qfn16 yes reel ? 2011 espros photonics corporation characteristics subject to change without notice 10 datasheet epc700_702 - v2.2 www.espros.ch <br> epc700/epc702 important notice espros photonics ag and its subsidiaries (epc) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to epcs terms and conditions of sale supplied at the time of order acknowledgment. epc warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with epcs standard war - ranty. testing and other quality control techniques are used to the extent epc deems necessary to support this warranty. except where man - dated by government requirements, testing of all parameters of each product is not necessarily performed. epc assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using epc components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. epc does not warrant or represent that any license, either express or implied, is granted under any epc patent right, copyright, mask work right, or other epc intellectual property right relating to any combination, machine, or process in which epc products or services are used. information published by epc regarding third-party products or services does not constitute a license from epc to use such products or services or a war ranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from epc under the patents or other intellectual property of epc. resale of epc products or services with statements different from or beyond the parameters stated by epc for that product or service voids all express and any implied warranties for the associated epc product or service. epc is not responsible or liable for any such statements. epc products are not authorized for use in safety-critical applications (such as life support) where a failure of the epc product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of epc products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by epc. further, buyers must fully indemnify epc and its representatives against any damages arising out of the use of epc products in such safety- critical applications. epc products are neither designed nor intended for use in military/aerospace applications or environments unless the epc products are spe - cifically designated by epc as military-grade or "enhanced plastic." only products designated by epc as military-grade meet military specific - ations. buyers acknowledge and agree that any such use of epc products which epc has not designated as military-grade is solely at the buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. epc products are neither designed nor intended for use in automotive applications or environments unless the specific epc products are desig - nated by epc as compliant with iso/ts 16949 requirements. buyers acknowledge and agree that, if they use any non-designated products in automotive applications, epc will not be responsible for any failure to meet such requirements. ? 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