1 white electronic designs corporation ? (508) 366-5151 ?www.whiteedc.com edi8l32512v not recommended for new design 512kx32 sram module, 3.3v features dsp memory solution adsp-21060l (sharc) adsp-21062l (sharc) ?exas instruments tms320lc31 risc memory solution ?mpc860 (power quic) random access memory array ?fast access times: 12, 15, 17, and 20ns individual byte enables user configurable organization with minimal additional logic master output enable and write control ?ttl compatible inputs and outputs ?fully static, no clocks surface mount package ?68 lead plcc, no. 99 jedec m0-47ae ?small footprint, 0.990 sq. in. ?multiple ground pins for maximum noise immunity single +3.3v ( 5%) supply operation october 2000 rev. 3 eco# 13316 pin description a 0-18 address inputs e 0-3 chip enables (one per byte) w master write enable g master output enable dq 0-31 common data input/output v cc power (+3.3v 5%) v ss ground nc no connection block diagram fig. 1 pin configuration the edi8l32512v is a high speed, 3.3v, 16 megabit sram. the device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state dsp and risc micropro- cessor memory solutions. the device can be configured as a 512k x 32 and used to create a single chip external data memory solution for ti? tms320lc31 (figure 5), or analog? sharc dsp (figure 6). the device provides a 56% space savings when compared to four 512k x 8, 36 pin sojs. in addition the edi8l32512c has only a 10pf load on the data lines vs. 32pf for four plastic sojs. the device provides a memory upgrade of the edi8l32256v (256k x 32) or the edi8l32128v (128k x 32) (figure 8). alternatively, the device? chip enables can configure it as a 1m x 16. a 1mx 48 program memory array for analog? sharc dsp is created using three devices (figure 7). if this memory is too deep, two 512k x 24s (edi8l24512v) can be used to create a 512k x 48 array or two 128k x 24s (edi8l24128v) can be used to create a 128k x 48 array. note: solder reflow temperature should not exceed 260 c for 10 seconds. top view note: for memory upgrade information, refer to page 7, figure 8 edi mcm-l upgrade path. 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 dq17 dq18 dq19 v ss dq20 dq21 dq22 dq23 v cc dq24 dq25 dq26 dq27 v ss dq28 dq29 dq30 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 dq14 dq13 dq12 v ss dq11 dq10 dq9 dq8 v cc dq7 dq6 dq5 dq4 v ss dq3 dq2 dq1 dq31 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 a6 a5 a4 a3 a2 a1 a0 v cc a13 a12 a11 a10 a9 a8 a7 dq0 9dq16 8 a18 7 a17 6e3 5e2 4e1 3e0 2nc 1v cc 68 nc 67 nc 66 g 65 w 64 a16 63 a15 62 a14 61 dq15 a 0 - 18 g w e 0 e 1 e 2 e 3 dq 0 -dq 7 dq 8 -dq 15 dq 16 -dq 23 dq 24 -dq 31 512k x 32 memory array 19
2 white electronic designs corporation ? (508) 366-5151 ?www.whiteedc.com edi8l32512v absolute maximum ratings voltage on any pin relative to v ss -0.5v to 7.0v operating temperature t a (ambient) commercial 0 c to +70 c industrial -40 c to +85 c storage temperature, plastic -55 c to +125 c power dissipation 2.5 watts output current 20 ma junction temperature, t j +175 c recommended operating conditions parameter symbol min typ max unit supply voltage v cc 3.135 3.3 3.465 v supply voltage v ss 000v input high voltage v ih 2.2 vcc +0.3 v input low voltage v il -0.3 +0.8 v truth table e w g mode output power h x x standby high z icc 2 , icc 3 l h h output deselect high z icc 1 l h l read data out icc 1 l l x write data in icc 1 * stress greater than those listed under "absolute maximum ratings" may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions greater than those indi- cated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. parameter symbol conditions 12 & 15 17 & 20 units min typ max min typ max operating power supply current i cc1 w = v il , i i/o = 0ma, min cycle 440 720 440 640 ma standby (ttl) power supply current i cc2 e v ih , v in v il or v in v ih 100 200 100 200 ma full standby power cmos i cc3 e v cc -0.2v 60 100 60 100 ma supply current v in v cc -0.2v or v in 0.2v input leakage current i li v in = 0v to v cc 10 10 a output leakage current i lo v i/o = 0v to v cc 10 10 a output high voltage v oh i oh = -4.0ma 2.4 2.4 v output low voltage v ol i ol = 4.0ma 0.4 0.4 v dc electrical characteristics (v cc = 3.3v, t a = 25?c) capacitance (f = 1.0mhz, v in = v cc or v ss ) parameter sym max unit address lines c i 30 pf data lines c d/q 10 pf write & output enable line w, g 30 pf chip enable line e 0-3 8pf input pulse levels v ss to 3.0v input rise and fall times 5ns input and output timing levels 1.5v output load figure 1 ( note: for t ehqz , t ghqz and t wlqz , cl = 5pf, figure 2) 30pf 480 ? vcc q figure 1 figure 2 255 ? 5pf 480 ? vcc q 255 ? ac test conditions
3 white electronic designs corporation ? (508) 366-5151 ?www.whiteedc.com edi8l32512v ac characteristics ?read cycle (v cc = 3.3v, v ss = 0v, t a = 0 ? c to + 70 ? c ) symbol 12ns 15ns 17ns 20ns parameter jedec alt. min max min max min max min max units read cycle time t avav t rc 12 15 17 20 ns address access time t avqv t aa 12 15 17 20 ns chip enable access time t elqv t acs 10 12 15 20 ns chip enable to output in low z (1) t elqx t clz 3333ns chip disable to output in high z (1) t ehqz t chz 6789ns output hold from address change t avqx t oh 3333ns output enable to output valid t glqv t oe 6789ns output enable to output in low z (1) t glqx t olz 3333ns output disable to output in high z (1) t ghqz t ohz 6789ns 1. this parameter is guaranteed by design but not tested. ac characteristics ?write cycle (v cc = 3.3v, v ss = 0v, t a = 0 ? c to + 70 ? c ) symbol 12ns 15ns 17ns 20ns parameter jedec alt. min max min max min max min max units write cycle time t avav t wc 12 15 17 20 ns chip enable to end of write t elwh t cw 8101112ns t eleh t cw 8101112ns address setup time t avwl t as 0000ns t avel t as 0000ns address valid to end of write t avwh t aw 8101112ns t aveh t aw 8101112ns write pulse width t wlwh t wp 8101112ns t eleh t wp 8101112ns write recovery time t whax t wr 0000ns t ehax t wr 0000ns data hold time t whdx t dh 0000ns t ehdx t dh 0000ns write to output in high z (1) t wlqz t whz 06070809ns data to write time t dvwh t dw 6789ns t dveh t dw 6789ns output active from end of write (1) t whqx t wlz 3333ns 1. this parameter is guaranteed by design but not tested.
4 white electronic designs corporation ? (508) 366-5151 ?www.whiteedc.com edi8l32512v a q read cycle 1 (w high; g, e low) t avqx t avqv t avav data 2 address 1 address 2 data 1 a q read cycle 2 (w high) t avqv t elqv t glqv t elqx t glqx t avav t ehqz t ghqz g e ws32k32-xhx fig. 2 timing waveform - read cycle fig. 4 write cycle - e controlled fig. 3 write cycle - w controlled a d write cycle 2, e controlled t aveh t eleh t ehax t dveh t ehdx t avav data valid high z w t wleh e q t avel a d write cycle 1, w controlled t avwh t elwh t whax t wlwh t dvwh t wlqz t whqx t avwl t whdx t avav data valid high z w e q
5 white electronic designs corporation ? (508) 366-5151 ?www.whiteedc.com edi8l32512v not recommended for new design package 99: 68 lead plcc jedec mo-47ae all dimensions are in inches 0.956 max 0.180 max 0.115 max 0.040 max 0.050 bsc 0.020 0.015 0.995 max 0.930 0.890 0.956 max 0.995 max commercial temperature range (0 c to +70 c) part number speed package (ns) no. edi8l32512v12ac 12 99 EDI8L32512V15AC 15 99 edi8l32512v17ac 17 99 edi8l32512v20ac 20 99 ordering information industrial temperature range (-40 c to +85 c) part number speed package (ns) no. edi8l32512v15ai 15 99 edi8l32512v17ai 17 99 edi8l32512v20ai 20 99 coplanarity (lowest lead to highest lead 0.004 max)
6 white electronic designs corporation ? (508) 366-5151 ?www.whiteedc.com edi8l32512v e0\ e1\ e2\ e3\ w\ g\ strb\ r/w\ primary databus d31 - d0 a18 a17 a16 a15 a14 a13 a12 a4 a3 a2 a1 a0 dq31 dq30 dq29 dq28 dq27 dq4 dq3 dq2 dq1 dq0 a d d r e s s b u s d a t a b u s } 8l32512c only edi8l32512v address bus a 31 - 0 e 0 e 1 e 2 e 3 w g a 18 a 17 a 16 a 15 a 14 a 4 a 3 a 2 a 1 a 0 a d d r e s s b u s d a t a b u s analog device adsp-2106xl ms 0 wr databus d31-0 rd d31 d30 . . . . d5 d4 d3 d2 d1 d0 dq 31 dq 30 dq 29 dq 28 dq 27 dq 4 dq 3 dq 2 dq 1 dq 0 edi8l32512v e0\ e1\ e2\ e3\ w\ g\ strb\ r/w\ primary databus d31 - d0 a18 a17 a16 a15 a14 a13 a12 a4 a3 a2 a1 a0 dq31 dq30 dq29 dq28 dq27 dq4 dq3 dq2 dq1 dq0 a d d r e s s b u s d a t a b u s } 8l32512c only edi8l32512v primary address bus a 23 - 0 e 0 e 1 e 2 e 3 w g a 18 a 17 a 16 a 15 a 14 a 13 a 12 a 4 a 3 a 2 a 1 a 0 dq 31 dq 30 dq 29 dq 28 dq 27 dq 4 dq 3 dq 2 dq 1 dq 0 a d d r e s s b u s d a t a b u s primary databus d 31 - 0 ti tms320lc31 strb r/w } 8l32512c only fig. 5 interfacing the texas instruments tms320lc31 with the edi8l32512v (512kx32) fig. 6 interfacing the analog sharc dsp with the edi8l32512v (512kx32 array).
7 white electronic designs corporation ? (508) 366-5151 ?www.whiteedc.com edi8l32512v fig. 7 interfacing the analog sharc dsp with the edi8l32512v (1mx48 array) fig. 8 mcm-l upgrade path dq 31 dq 16 dq 15 dq 0 d a t a b u s a 18-0 e 0 e 1 e 2 e 3 w g dq 15 word1 dq 0 dq 31 dq 16 dq 15 dq 0 d a t a b u s dq 31 word2 dq 16 dq 31 dq 16 dq 15 dq 0 d a t a b u s dq 47 word3 dq 17 edi8l32512v (configured as 1mx16) edi8l32512v (configured as 1mx16) edi8l32512v (configured as 1mx16) address bus a 31 - 0 analog device adsp-2106xl ms 0 ms 1 wr databus d 47 - 0 rd a 18-0 e 0 e 1 e 2 e 3 w g a 18-0 e 0 e 1 e 2 e 3 w g 512kx32 256kx32 128kx32 e3 e2 e0 g w 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 dq31 a6 a5 a4 a3 a2 a1 a0 vcc a13 a12 a11 a10 a09 a08 a07 dq00 dq31 a6 a5 a4 a3 a2 a1 a0 vcc a13 a12 a11 a10 a09 a08 a07 dq00 dq31 a6 a5 a4 a3 a2 a1 a0 vcc a13 a12 a11 a10 a09 a08 a07 dq00 dq16 nc nc e3 e2 e1 e0 nc v cc nc nc g w a16 a15 a14 dq15 dq16 nc a17 b53 b52 b51 b50 e1 v cc nc e0 g w a16 a15 a14 dq15 dq16 a18 a17 e1 nc v cc nc nc a16 a15 a14 dq15 dq17 dq18 dq19 v ss dq20 dq21 dq22 dq23 v cc dq24 dq25 dq26 dq27 v ss dq28 dq29 dq30 dq14 dq13 dq12 v ss dq11 dq10 dq09 dq08 v cc dq07 dq06 dq05 dq04 v ss dq03 dq02 dq01 dq14 dq13 dq12 v ss dq11 dq10 dq09 dq08 v cc dq07 dq06 dq05 dq04 v ss dq03 dq02 dq01 dq14 dq13 dq12 v ss dq11 dq10 dq09 dq08 v cc dq07 dq06 dq05 dq04 v ss dq03 dq02 dq01 8l32512v 8l32256v 8l32128v dq17 dq18 dq19 v ss dq20 dq21 dq22 dq23 v cc dq24 dq25 dq26 dq27 v ss dq28 dq29 dq30 dq17 dq18 dq19 v ss dq20 dq21 dq22 dq23 v cc dq24 dq25 dq26 dq27 v ss dq28 dq29 dq30
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