?2012 fairchild semiconductor corporation april 2012 fds3672 rev. c2 fds3672 fds3672 n-channel powertrench ? mosfet 100v, 7.5a, 22m ? features r ds(on) = 19m ? (typ.), v gs = 10v, i d = 7.5a q g (tot) = 28nc (typ.), v gs = 10v low miller charge low q rr body diode optimized efficiency at high frequencies uis capability (single pulse and repetitive pulse) formerly developmental type 82763 applications dc/dc converters and off-line ups distributed power architectures and vrms primary switch for 24v and 48v systems high voltage synchronous rectifier mosfet maximum ratings t a = 25c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v dss drain to source voltage 100 v v gs gate to source voltage 20 v i d drain current 7.5 a continuous (t a = 25 o c, v gs = 10v, r ja = 50 o c/w) continuous (t a = 100 o c, v gs = 10v, r ja = 50 o c/w) 4.8 a pulsed figure 4 a e as single pulse avalanche energy (note 1) 416 mj p d power dissipation 2.5 w derate above 25 o c20mw/ o c t j , t stg operating and storage temperature -55 to 150 o c r ja thermal resistance, junction to ambient at 10 seconds (note 3) 50 o c/w r ja thermal resistance, junction to ambient at 1000 seconds (note 3) 85 o c/w r jc thermal resistance, junction to case (note 2) 25 o c/w device marking device package reel size tape width quantity fds3672 fds3672 so-8 330mm 12mm 2500 units so-8 branding dash 1 5 2 3 4 4 3 2 1 5 6 7 8
?2012 fairchild semiconductor corporation fds3672 rev. c2 fds3672 electrical characteristics t a = 25c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics (v gs = 10v) drain-source diode characteristics notes: 1: starting t j = 25c, l = 13mh, i as = 8a. 2: r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the s older mounting surface of the drain pins. r jc is guaranteed by design while r ca is determined by the user?s board design. 3: r ja is measured with 1.0 in 2 copper on fr-4 board symbol parameter test conditions min typ max units b vdss drain to source breakdown voltage i d = 250 a, v gs = 0v 100 - - v i dss zero gate voltage drain current v ds = 80v - - 1 a v gs = 0v t c = 150 o c- - 250 i gss gate to source leakage current v gs = 20v - - 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a2-4v r ds(on) drain to source on resistance i d = 7.5a, v gs = 10v - 0.019 0.023 ? i d = 6.8a, v gs = 6v - 0.023 0.028 i d = 7.5a, v gs = 10v, t c = 150 o c - 0.035 0.043 c iss input capacitance v ds = 25v, v gs = 0v, f = 1mhz -2015- pf c oss output capacitance - 285 - pf c rss reverse transfer capacitance - 70 - pf q g(tot) total gate charge at 10v v gs = 0v to 10v v dd = 50v i d = 7.5a i g = 1.0ma -2837nc q g(th) threshold gate charge v gs = 0v to 2v - 4 6 nc q gs gate to source gate charge - 10 - nc q gs2 gate charge threshold to plateau - 6.8 - nc q gd gate to drain ?miller? charge - 6 - nc t on tur n -o n t im e v dd = 50v, i d = 4a v gs = 10v, r gs = 10 ? --51ns t d(on) turn-on delay time - 14 - ns t r rise time - 20 - ns t d(off) turn-off delay time - 37 - ns t f fall time - 27 - ns t off turn-off time - - 96 ns v sd source to drain diode voltage i sd = 7.5a - - 1.25 v i sd = 4a - - 1.0 v t rr reverse recovery time i sd = 7.5a, di sd /dt= 100a/ s- - 55 ns q rr reverse recovered charge i sd = 7.5a, di sd /dt= 100a/ s- - 90nc
?2012 fairchild semiconductor corporation fds3672 rev. c2 fds3672 typical characteristics t a = 25c unless otherwise noted figure 1. normalized power dissipation vs ambient temperature figure 2. maximum continuous drain current vs case temperature figure 3. normalized maximum transient thermal impedance figure 4. peak current capability t a , ambient temperature ( o c) power dissipation multiplier 0 0 25 50 75 100 150 0.2 0.4 0.6 0.8 1.0 1.2 125 0 2 4 6 8 25 50 75 100 125 150 i d , drain current (a) t c , case temperature ( o c) v gs = 10v 0.001 0.01 0.1 1 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 10 3 2 t , rectangular pulse duration (s) z ja , normalized single pulse notes: duty factor: d = t 1 /t 2 peak t j = p dm x z ja x r ja + t a p dm t 1 t 2 duty cycle - descending order 0.5 0.2 0.1 0.05 0.01 0.02 thermal impedance r ja =50 o c/w 10 100 1000 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 10 3 5 i dm , peak current (a) t , pulse width (s) transconductance may limit current in this region v gs = 10v t a = 25 o c i = i 25 150 - t c 125 for temperatures above 25 o c derate peak current as follows:
?2012 fairchild semiconductor corporation fds3672 rev. c2 fds3672 figure 5. forward bias safe operating area figure 7. transfer characteristics figure 8. saturation characteristics figure 9. drain to source on resistance vs drain current figure 10. normalized drain to source on resistance vs junction temperature typical characteristics t a = 25c unless otherwise noted 0.01 0.1 1 10 100 1.0 10.0 100 300 300 0.1 i d , drain current (a) v ds , drain to source voltage (v) t j = max rated t c = 25 o c single pulse limited by r ds(on) area may be operation in this 10 s 100ms 10ms 1s 100 s 1ms 0 10 20 30 2.53.03.54.04.55.05.5 i d , drain current (a) v gs , gate to source voltage (v) pulse duration = 80 s duty cycle = 0.5% max v dd = 15v t j = 150 o c t j = 25 o c t j = -55 o c 0 10 20 30 0 0.5 1.0 1.5 2.0 i d , drain current (a) v ds , drain to source voltage (v) v gs = 6v pulse duration = 80 s duty cycle = 0.5% max v gs = 5v v gs = 4.5v v gs = 10v t a = 25 o c 18 20 22 24 02468 i d , drain current (a) v gs = 6v v gs = 10v drain to source on resistance (m ? ) pulse duration = 80 s duty cycle = 0.5% max 0.5 1.0 1.5 2.0 -80 -40 0 40 80 120 160 normalized drain to source t j , junction temperature ( o c) on resistance v gs = 10v, i d = 7.5a pulse duration = 80 s duty cycle = 0.5% max figure 6. unclamped inductive switching capability 0.1 1 10 100 1 2 4 6 8 10 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a)
?2012 fairchild semiconductor corporation fds3672 rev. c2 fds3672 figure 11. normalized gate threshold voltage vs junction temperature figure 12. normalized drain to source breakdown voltage vs junction temperature figure 13. capacitance vs drain to source voltage figure 14. gate charge waveforms for constant gate currents typical characteristics t a = 25c unless otherwise noted 0.4 0.6 0.8 1.0 1.2 1.4 -80 -40 0 40 80 120 160 normalized gate t j , junction temperature ( o c) v gs = v ds , i d = 250 a threshold voltage 0.90 0.95 1.00 1.05 1.10 -80 -40 0 40 80 120 160 t j , junction temperature ( o c) normalized drain to source i d = 250 a breakdown voltage 10 100 1000 0.1 1 10 100 5000 c, capacitance (pf) v gs = 0v, f = 1mhz c iss = c gs + c gd c oss ? c ds + c gd c rss = c gd v ds , drain to source voltage (v) 0 2 4 6 8 10 0 5 10 15 20 25 30 v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 50v i d = 7.5a i d = 4a waveforms in descending order:
?2012 fairchild semiconductor corporation fds3672 rev. c2 fds3672 test circuits and waveforms figure 15. unclamped energy test circuit figure 16. unclamped energy waveforms figure 17. gate charge test circuit figure 18. gate charge waveforms figure 19. switching time test circuit figure 20. switching time waveforms t p v gs 0.01 ? l i as + - v ds v dd r g dut vary t p to obtain required peak i as 0v v dd v ds bv dss t p i as t av 0 v gs + - v ds v dd dut i g(ref) l v dd q g(th) v gs = 2v q g(tot) v gs = 10v v ds v gs i g(ref) 0 0 q gs q gd q gs2 v gs r l r gs dut + - v dd v ds v gs t on t d(on) t r 90% 10% v ds 90% 10% t f t d(off) t off 90% 50% 50% 10% pulse width v gs 0 0
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