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max2369 complete dual-band quadrature transmitter ________________________________________________________________ maxim integrated products 1 ref n.c. n.c. n.c. n.c. tank+ tank- iflo v cc shdn i- i+ rfl rfh lock v cc v cc v cc txgate ifin+ ifin- n.c. n.c. r bias 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 clk di cs v cc v cc ifout+ ifout- v gc v cc v cc q+ q- gnd gnd gnd gnd lol loh n.c. v cc gnd v cc ifcp v cc max2369 +45 -45 90 0 0 90 /2 ifpll /2 19-1924; rev 1; 10/01 general description the max2369 is a dual-band, triple-mode complete transmitter for cellular phones. the device takes a differ- ential i/q baseband input and mixes it up to if through a quadrature modulator and if variable-gain amplifier (vga). the signal is then routed to an external bandpass filter and upconverted to rf through an ssb mixer and rf vga. the signal is further amplified with an on-board pa driver. the max2369 is designed for dual-band operation and supports tdma for the pcs band as well as tdma and amps for the cellular band. the desired mode of operation is selected by loading data on the spi/ microwire-compatible 3-wire serial bus. the max2369 then routes the signals to the appropriate ports depending on which band is selected. the max2369 includes two rf lo input ports and two pa driver ports, eliminating the need for external switching circuitry. the max2369 takes advantage of the serial bus to set modes such as charge-pump current, high or low side- band injection, and if/rf gain balancing. it is packaged in a small (7mm ? 7mm) 48-pin qfn package with exposed paddle. applications dual-band tdma/amps handsets gait handsets triple-mode, dual-mode, or single-mode mobile phones satellite phones wireless data links (wan/lan) wireless local area networks (lans) high-speed data modems high-speed digital cordless phones wireless local loop (wll) features dual-band, triple-mode operation +7dbm output power with -34dbc acpr (nadc modulation) 100db power control range supply current drops as output power is reduced on-chip if vco and if pll qspi/spi/microwire-compatible 3-wire bus digitally controlled operational modes +2.7v to +5.5v operation single sideband upconverter eliminates saw filters power control distributed at if and rf for optimum dynamic range spi and qspi are trademarks of motorola, inc. microwire is a trademark of national semiconductor corp. pin configuration appears at end of data sheet. selector guide appears at end of data sheet. functional diagram *exposed paddle for price, delivery, and to place orders, please contact maxim distribution at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ordering information part temp. range pin-package max2369egm -40 c to +85 c 48 qfn-ep*
max2369 complete dual-band quadrature transmitter 2 _______________________________________________________________________________________ absolute maximum ratings dc electrical characteristics ( max2369 test fixture: v cc = v batt = +2.75v, shdn = txgate = +2.0v, vgc = +2.5v, r bias = 16k ? , t a = -40 c to +85 c, unless otherwise noted. typical values are at t a = +25 c, and operating modes are defined in table 6.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd ...........................................................-0.3v to +3.6v rfl, rfh.............................................................................+5.5v di, clk, cs , vgc, shdn , txgate , lock.....................................................-0.3v to (v cc + 0.3v) ac input pins (ifin, q, i, tank, ref, lol, loh) ...............................................................1.0v peak digital input current ( shdn , txgate , clk, di, cs ) ................................................................10ma continuous power dissipation (t a = +70 c) 48-pin qfn-ep (derate 27mw/ c above +70 c) .............. 2.5w operating temperature range ...........................-40 c to +85 c junction temperature ......................................................+150 c storage temperature range .............................-65 c to +160 c lead temperature (soldering, 10s) .................................+300 c parameter conditions min typ max units operating supply voltage 2.7 3.0 v vgc = 0.5v 80 106 vgc = 2.0v 85 112 pcs mode vgc = 2.5v 120 150 vgc = 0.5v 82 107 vgc = 2.0v 87 113 cellular digital mode vgc = 2.5v 123 155 vgc = 0.5v 77 101 vgc = 2.0v 80 105 fm mode vgc = 2.5v 105 133 ma (note 1) addition for iflo buffer 6.5 11 txgate = 0.6v 16 25 operating supply current shdn = 0.6v, sleep mode 0.5 20 a logic high 2.0 v logic low 0.6 v logic input current -5 +5 a vgc input current -12 +12 a vgc input resistance during shutdown shdn = 0.6v 200 280 k ? lock indicator high 50k ? pullup load v cc - 0.4 v lock indicator low 50k ? pullup load 0.4 v
max2369 complete dual-band quadrature transmitter _______________________________________________________________________________________ 3 ac electrical characteristics ( max2369 evaluation kit: 50 ? system, operating modes as defined in table 6, input voltage at i and q = 200mv rms differential, common mode = v cc /2, 300khz quadrature cw tones, if synthesizer locked with passive lead-lag second-order loop filter, ref = 200mvp-p at 19.44mhz, v cc = shdn = cs = txgate = +2.75v, v bat = +2.75v, if output load = 400 ? , loh, lol input power = -7dbm, f lol = 1017.26mhz, f loh = 2061.26mhz, ifin = 125mv rms at 181.26mhz, is-136 tdma modulation, f rfh = 1880mhz, f rfl = 836mhz, t a = +25 c, unless otherwise noted.) parameter conditions min typ max units modulator, quadrature modes (digital cellular, digital pcs, fm iq) if frequency range 120 235 mhz i/q common-mode input voltage v cc = 2.7v to 3.0v (notes 2, 3, 4) 1.35 v cc / 2 v cc 1.25 v if gain control range vgc = 0.5v to 2.5v, ifg = 100 85 db if output power, digital mode vgc = 2.5v, ifg = 100 -10 dbm gain variation over temperature relative to +25 c, t a = -40 c to +85 c (note 4) 0.8 db rx band noise power vgc = 2.5v, ifg = 100, f if = 181.26mhz, noise measured at f if 20mhz -145 dbm/hz carrier suppression vgc = 2.5v, ifg = 100 30 49 db sideband suppression vgc = 2.5v, ifg = 100 30 38 db modulator, fm mode if gain control range vgc = 0.5v to 2.5v, ifg = 100 85 db vgc = 2.5v, ifg = 111, i/q modulation -8.5 output power vgc = 2.5v, ifg = 111, direct vco modulation -5.5 dbm upconverter and predriver if frequency range 120 235 mhz low-band frequency range rfl port 800 1000 mhz high-band frequency range rfh port 1700 2000 mhz lol frequency range 800 1150 mhz loh frequency range 1400 2300 mhz vgc = 2.5v, nadc modulation, acpr < -32dbc/ -55dbc at +30khz/+60khz offset 5.8 7 output power, rfl (note 4) vgc = 2.5v, fm mode 9 12 dbm output power, rfh (note 4) vgc = 2.6v, nadc modulation, acpr = -32db/ -55dbc at +30khz/+60khz offset 4 6.6 dbm power-control range vgc = 0.5v to 2.5v 30 db gain variation over temperature relative to +25 c, t a = -40 c to +85 c (note 4) 3 db rfl -25 rf image rejection (note 4) rfh -24 dbc rfl, vgc = 2.5v -22 lo leakage (note 4) rfh, vgc = 2.6v -24 dbm rfl, vgc = 2.5v -133 rx band noise power rfh, vgc = 2.6v -134 dbm/ hz
max2369 complete dual-band quadrature transmitter 4 _______________________________________________________________________________________ ac electrical characteristics (continued) ( max2369 evaluation kit: 50 ? system, operating modes as defined in table 6, input voltage at i and q = 200mv rms differential, common mode = v cc /2, 300khz quadrature cw tones, if synthesizer locked with passive lead-lag second-order loop filter, ref = 200mvp-p at 19.44mhz, v cc = shdn = cs = txgate = +2.75v, v bat = +2.75v, if output load = 400 ? , loh, lol input power = -7dbm, f lol = 1017.26mhz, f loh = 2061.26mhz, ifin = 125mv rms at 181.26mhz, is-136 tdma modulation, f rfh = 1880mhz, f rfl = 836mhz, t a = +25 c, unless otherwise noted.) note 1: see table 6 for register settings. note 2: acpr is met over the specified v cm range. note 3: v cm must be supplied by the i/q baseband source with 6a capability. note 4: guaranteed by design and characterization. note 5: when enabled, turbolock is active during acquisition and injects boost current in addition to the normal charge-pump current. note 6: charge pump compliance range is 0.5v to v cc - 0.5v. parameter conditions min typ max units if_pll reference frequency 5 30 mhz frequency reference signal level 0.1 0.6 vp-p if main divide ratio 256 16384 if reference signal ratio 2 2048 vco operating range 240 470 mhz if lo output power buf_en = 1 -6 dbm icp = 00 148 200 260 icp = 01 185 260 345 icp = 10 295 400 515 charge-pump source/sink current icp = 11 385 530 700 a turbolock boost current (note 5) 385 530 700 a charge-pump source/sink matching locked, all values of icp, over specified compliance range (note 6) 5% charge-pump high-z leakage over specified compliance range (note 6) 10 na
max2369 complete dual-band quadrature transmitter _______________________________________________________________________________________ 5 typical operating characteristics (max2369evkit, v cc = +2.8v, v bat = 3.0v, t a = +25 c, unless otherwise noted.) -10 -6 -8 -2 -4 2 0 4 8 6 10 0 200 300 400 100 500 600 700 900 800 1000 if p ll settling time time (?) frequency deviation (khz) max2369 toc01 f if = 181.26mhz tank 1/s11 vs. frequency max2369 toc02 4 5 1 2 3 z 0 = 200 ? equivalent parallel r-c 1: 200mhz, 1.76k ? , 0.26pf 2: 260mhz, 1.66k ? , 0.31pf 3: 330mhz, 1.58k ? , 0.34pf 4: 780mhz, 1.21k ? , 0.43pf 5: 1ghz, 0.94k ? , 0.47pf 80 100 90 120 110 130 140 1.5 1.7 1.8 1.9 1.6 2.0 2.1 2.2 2.3 2.4 2.5 2.6 i cc vs. vgc input max2369 toc03 vgc (v) i cc (ma) cellular pcs -30 -35 -40 -45 -50 -55 -60 -20 -25 -10 -15 -5 5 0 10 output power vs. vgc input max2369 toc04 vgc (v) output power (dbm) 1.5 1.9 2.1 1.7 2.3 2.5 cellular pcs -120 -80 -100 -40 -60 -20 0 0 1.0 1.5 0.5 2.0 2.5 3.0 if output power vs. vgc input and if dac setting max2369 toc05 vgc (v) p out (dbm) 011 111 100 101 110 001 000 010 -110 -90 -100 -40 -50 -60 -70 -80 -30 -20 -10 0 1.0 01.5 0.5 2.0 2.5 3.0 if output power vs. vgc input max2369 toc06 vgc (v) if power (dbm) -40? +85? +25? -120 -80 -100 -40 -60 -20 0 0 1.0 1.5 0.5 2.0 2.5 3.0 if output power vs. vgc input max2369 toc07 vgc (v) p out (dbm) 2.7v, 3.0v, 3.3v -100 -80 -90 -60 -70 -40 -50 -30 -10 -20 0 181.21 181.23 181.25 181.27 181.29 181.31 sideband suppression and lo feedthrough (ifout) max2369 toc08 frequency (mhz) p out (dbm) sideband desired lo
max2369 complete dual-band quadrature transmitter 6 _______________________________________________________________________________________ -3.0 -1.5 -2.0 -2.5 -1.0 -0.5 0 020 15 5 10 253035404550 i/q baseband frequency response max23669 toc09 frequency (mhz) (dbc) -50 -150 0.001 0.01 0.1 1 10 phase noise low-band oscillator vs. frequency offset (181.26mhz) -130 max2369 toc10 offset frequency (mhz) phase noise (dbc/hz) -110 -90 -70 -80 -100 -120 -140 -60 f comp = 360khz -90 -70 -80 -50 -60 -30 -40 -20 0 -10 10 1500 1700 1900 2100 2300 2500 rfh output spectrum max2369 toc12 frequency (mhz) amplitude (dbm) image desired lo -80 -60 -70 -40 -50 -30 -20 -20 -16 -12 -8 -4 0 4 8 cascaded acpr/alt vs. power (rfl) max2369 toc13 power (dbm) acpr (dbc) acpr with root raised cosine filter acpr without filter alt with or without filter -80 -60 -70 -40 -50 -30 -20 -24 -20 -16 -12 -8 -4 0 4 6 cascaded acpr/alt vs. power (rfh) max2369 toc14 power (dbm) acpr/alt (dbc) acpr with root raised cosine filter acpr without root raised cosine filter alt with or without root raised cosine filter lol port s11 max2369 toc17 1: 700mhz, 72 ? j51 ? 2: 966mhz, 60 ? j46 ? 3: 1.22mhz, 52 ? j38 ? 4: 1.5ghz, 40 ? j25 ? 4 1 2 3 loh port s11 max2369 toc18 1600mhz to 2500mhz 1: 1.6ghz, 40 ? j25 ? 2: 1.75ghz, 36 ? j22 ? 3: 1.88ghz, 34 ? j18 ? 4: 2.01ghz, 32 ? j15 ? 5: 2.5ghz, 29 ? j0 ? 4 5 1 2 3 typical operating characteristics (continued) (max2369evkit, v cc = +2.8v, v bat = 3.0v, t a = +25 c, unless otherwise noted.) -80 -60 -70 -40 -50 -20 -30 -10 10 0 20 500 700 900 1100 1300 1500 rfl output spectrum max2369 toc11 frequency (mhz) amplitude (dbm) image desired lo
max2369 complete dual-band quadrature transmitter _______________________________________________________________________________________ 7 pin description vgc v cc ifout+, ifout- v cc rf and if variable-gain control analog input. vgc floats to +1.5v. apply +0.5v to +2.6v to control the gain of the rf and if stages. an rc filter on this pin may be used to reduce dac noise or pdm clock spurs from this line. 20 supply pin for the if vga. bypass with a capacitor as close to the pin as possible. the bypass capacitor must not share its ground vias with any other branches. 21 differential if outputs. these pins must be inductively pulled up to v cc . a differential if band- pass filter is connected between this port and ifin+ and ifin-. the pullup inductors can be part of the filter structure. the differential output impedance of this port is nominally 600 ? . the trans- mission lines from these pins should be short to minimize the pickup of spurious signals and noise. 18, 19 power supply. bypass to ground with a 1000pf capacitor. 16, 17 pin name function 1 rfl transmitter rf output for cellular band (800mhz to 1000mhz) for both fm and digital modes. this open-collector output requires a pullup inductor to the supply voltage, which is part of the output matching network and may be connected directly to the battery. 2 rfh transmitter rf output for pcs band (1700mhz to 2000mhz). this open collector output requires a pullup inductor to the supply voltage. the pullup inductor is part of the output match- ing network and may be connected directly to the battery. open-collector output indicating lock status of the if pll. requires a pullup resistor. control using configuration register bit ld_mode. lock 3 4 v cc power supply. supply pin for the driver stage. v cc must be bypassed to system ground as close to the pin as possible. the ground vias for the bypass capacitor should not be shared by any other branch. bypass to ground with 100pf and 100nf capacitors. power supply. connect to pin 4 for normal operation. v cc 5 6 v cc supply pin for the upconverter stage. v cc must be bypassed to system ground as close to the pin as possible. the ground vias for the bypass capacitor should not be shared by any other branch. digital input. a logic low on txgate shuts down everything except the if pll, if vco, and ser- ial bus and registers. this mode is used for if pll settling before the transmit time slot. txgate 7 8, 9 ifin+, ifin- differential inputs to the rf upconverter. these pins are internally biased to +1.5v. the input impedance for these ports is nominally 400 ? differential. the if filter should be ac-coupled to these ports. keep the differential lines as short as possible to minimize stray pickup and shunt capacitance. no connection. leave these pins floating. n.c. 10, 11 12 r bias bias resistor pin. rbias is internally biased to a bandgap voltage of +1.18v. an external resistor or current source must be connected to this pin to set the bias current for the upconverters and pa driver stages. the nominal resistor value is 16k ? . this value can be altered to optimize the linearity of the driver stage. input pins from the 3-wire serial bus (spi/qspi/microwire compatible). an r-c filter on each of these pins may be used to reduce noise. clk, di, cs 13, 14, 15
max2369 complete dual-band quadrature transmitter 8 _______________________________________________________________________________________ pin description (continued) pin function 23, 24 differential q-channel baseband inputs to the modulator. these pins go directly to the bases of a differential pair and require an external common-mode bias voltage. 22 supply for the i/q modulator. bypass with capacitor as close to the pin as possible. the bypass capacitor must not share its ground vias with any other branches. 30, 31 differential tank pins for the if vco. these pins are internally biased to +1.6v. 29 buffered lo output. control the output buffer using register bit buf_en and the divide ratio using the register bit buf_div. 28 supply pin to the vco section. bypass as close to the pin as possible. the bypass capacitor should not share its vias with any other branches. 27 shutdown input. a logic low on shdn shuts down the entire ic. an r-c lowpass filter may be used to reduce digital noise. 25, 26 differential i-channel baseband inputs to the modulator. these pins go directly to the bases of a differential pair and require an external common-mode bias voltage. name q+, q- v cc tank-, tank+ iflo v cc shdn i+, i- gnd dc and ac gnd return for the ic. connect to pc board ground plane using multiple vias. exposed paddle gnd v cc loh lol ref v cc ifcp v cc ground. connect to pc board ground plane. 40, 45, 46, 47, 48 supply pin. bypass as close to the pin as possible. the bypass capacitor may share with sup- ply pin for digital circuitry, pin 39. 41 high-band rf lo input port. ac-couple to this port. 43 low-band rf lo input port. ac-couple to this port. 44 reference frequency input. ref is internally biased to v cc - 0.7v and must be ac-coupled to the reference source. this is a high-impedance port (25k ? ii 3pf). 36 supply for the if charge pump. this supply can differ from the system v cc . bypass as close to the pin as possible. the bypass capacitor must not share its vias with any other branches. 37 high-impedance output of the if charge pump. connect to the tune input of the if vcos through the if pll loop filter. keep the line from ifcp to the tune input as short as possible to prevent spurious pickup, and connect the loop filter as close to the tune input as possible. 38 supply pin for digital circuitry. bypass as close to the pin as possible. the bypass capacitor must not share its vias with any other branch. 39 32, 33, 34, 35, 42 no connection. leave these pins floating. n.c.
max2369 complete dual-band quadrature transmitter _______________________________________________________________________________________ 9 detailed description the max2369 complete quadrature transmitter accepts differential i/q baseband inputs with external common- mode bias. a modulator upconverts this to if frequency in the 120mhz to 235mhz range. a gain control voltage pin (vgc) controls the gain of both the if and rf vgas simultaneously to achieve best noise and linearity per- formance. the if signal is brought off-chip for filtering, then fed to a single sideband upconverter followed by the rf vga and pa driver. the rf upconverter requires an external vco for operation. the if pll and operat- ing mode can be programmed by an spi/qspi/ microwire-compatible 3-wire interface. the following sections describe each block in the max2369 functional diagram. i/q modulator differential in-phase (i) and quadrature-phase (q) input pins are designed to be dc-coupled and biased with the baseband output from a digital-to-analog converter (dac). i and q inputs need a dc bias of v cc /2 and a current-drive capability of 6a. common-mode voltage will work within a 1.35v to (v cc - 1.25v) range. typically, i and q will be driven differentially with a 200mv rms baseband signal. optionally, i and q may be pro- grammed for 100mv rms operation with the iq_level bit in the configuration register. the if vco output is fed into a divide-by-two/quadrature generator block to derive quadrature components to drive the iq modulator. the output of the modulator is fed into the vga. if vco the vco oscillates at twice the desired if frequency. oscillation frequency is determined by external tank components (see applications information ). typical phase-noise performance for the tank is shown in typical operating characteristics. iflo output buffer iflo provides a buffered lo output when buf_en is 1. the iflo output frequency is equal to the vco fre- quency when buf_div is 0, and half the vco frequen- cy when buf_div is 1. the output power is -6dbm. this output is used in test mode. if pll the if pll uses a charge-pump output to drive a loop filter. the loop filter will typically be a passive second- order lead lag filter. outside the filter s bandwidth, phase noise will be determined by the tank compo- nents. the two components that contribute most signifi- cantly to phase noise are the inductor and varactor. use high-q inductors and varactors to maximize equiv- alent parallel resistance. the icp_max bit in the opc- trl register can be set to 1 to increase the charge pump current. if vga the if vga allows varying an if output level that is con- trolled by the vgc voltage. the voltage range on vgc of +0.5v to +2.6v provides a gain-control range of 85db. the if output ports from the vga are optimized for if frequency from 120mhz to 235mhz. ifout ports support direct vco fm modulation. the differential if output port has an output impedance of 600 ? when pulled up to v cc through a choke. single sideband mixer the rf transmit mixer uses a single sideband architec- ture to eliminate an off-chip rf filter. the mixer is fol- lowed by the rf vga. the rf vga is controlled by the same vgc pin as the if vga to provide optimum lineari- ty and noise performance. the total power control range is >100db. pa driver the max2369 includes two power-amplifier (pa) drivers. each is optimized for the desired operating frequency. rfl is optimized for cellular-band operation. rfh is opti- mized for pcs operation. the pa drivers have open-col- lector outputs and require pullup inductors. the pullup inductors can act as the shunt element in a shunt series match. programmable registers the max2369 includes five programmable registers consisting of two divide registers, a configuration regis- ter, an operational control register, and a test register. each register consists of 24 bits. the 4 least significant bits (lsbs) are the register s address. the 20 most sig- nificant bits (msbs) are used for register data. all regis- ters contain some don't care bits. these can be either a zero or a 1 and do not affect operation ( figure 1 ). data is shifted in msb first, followed by the 4-bit address. when cs is low, the clock is active and data is shifted with the rising edge of the clock. when cs transitions to high, the shift register is latched into the register selected by the contents of the address bits. power-up defaults for the five registers are shown in table 1 . the registers should be initialized according to table 2 . the dividers and control registers are pro- grammed from the spi/qspi/microwire-compatible serial port.
max2369 complete dual-band quadrature transmitter 10 ______________________________________________________________________________________ the ifm register sets the main frequency divide ratio for the if pll. the ifr register sets the reference fre- quency divide ratio. the if vco frequency can be determined by the following: if vco frequency = f ref ? (ifm / ifr) where f ref is the external reference frequency. the operational control register (opctrl) controls the state of the max2369. see table 3 for the function of each bit. the configuration register (config) sets the configura- tion for the if pll and the baseband i/q input levels see table 4 for a description of each bit. the test register is not needed for normal use. power management bias control is distributed among several functional sections and can be controlled to accommodate many different power-down modes as shown in table 5 . the shutdown control bit is of particular interest since it differs from the shdn pin. when the shutdown control bit is active (shdn_bit = 0), the serial interface is left active so that the part can be turned on with the serial bus while all other functions remain shut off. in contrast, table 1. register power-up default states table 2. register initialization for f ref = 19.44mhz, f if = 181.26mhz, f comp = 360khz figure 1. register configuration msb 24 bit register lsb data 20 bits address 4 bits b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 a3 a2 a1 a0 ifm divide ratio register (14 bits) address x x x x x x b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 0 0 1 0 ifr divide ratio register (11 bits) address x x x x x x x x x b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 0 0 1 1 control register (16 bits) address x x x x b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 0 1 0 0 configuration register (16 bits) address x x x x b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 0 1 0 1 test register (8 bits) address x x x x x x x x x x x x b7 b6 b5 b4 b3 b2 b1 b0 0 1 1 1 x = don t care register default address function ifm 6519 dec 0010 b if m divider count ifr 0492 dec 0011 b if r divider count opctrl 892f hex 0100 b operational control settings config d03f hex 0101 b configuration and setup control test 0000 hex 0111 b test-mode control register default address function ifm 1007 dec 0010 b if m divider count ifr 0054 dec 0011 b if r divider count opctrl 890f hex 0100 b operational control settings config 903d hex 0101 b configuration and setup control test 0000 hex 0111 b test-mode control
max2369 complete dual-band quadrature transmitter ______________________________________________________________________________________ 11 max2369 0 90 if pll n.c. ref n.c. n.c. n.c. tank+ tank- iflo v cc i- i+ v cc gnd rfl rfh gnd gnd gnd n.c. v cc v cc v cc v cc gnd v cc ifcp v cc n.c. ifin- ifin+ lock lol loh n.c. rbias bias ctrl v cc q- q+ v cc v cc v cc v cc v cc vgc ifout- ifout+ v cc v cc v cc dac gain control input cellular output 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 37 38 39 40 41 42 43 44 45 46 47 48 45 -45 /2 /2 0 90 clk di cs shdn logic input shdn txgate logic input lock output txgate frac-n pll tank loop filter v cc v cc v cc v cc pcs output figure 2. max2369 typical application circuit when the shdn pin is low it shuts down everything. in either case, pll programming and register information is lost. to retain the register information, use standby mode ( stby = 0). signal flow control table 6 shows an example of key registers for triple- mode operation. applications information the max2369 is designed for use in dual-band, triple- mode systems. it is recommended for triple-mode hand- sets. a typical application circuit is shown in figure 2 . 3-wire interface figure 3 shows the 3-wire interface timing diagram. the 3-wire bus is spi/qspi/microwire compatible.
table 3. operation control register (opctrl) max2369 complete dual-band quadrature transmitter 12 ______________________________________________________________________________________ bit location (0 = lsb) 0 shuts down everything except serial interface, and also resets all registers to power-up state. 0 1 shdn_bit 0 shuts down modulator and upconverter, leaving pll locked and registers active. this is the programmable equivalent to the txgate pin. 1 1 txstby 0 shuts down everything except registers and serial interface. 2 1 stby 0 selects direct vco modulation. (if vco is externally modulated and the i/q modulator is bypassed); 1 selects quadrature modulation. 3 1 mod_type 10 9 8, 7, 6 5 12, 11 13 14 15 0 turns iflo buffer off; 1 turns iflo buffer on. set to 0 for normal operation. 0 unused set to 0 for normal operation. 0 unused 3-bit if gain control. alters if gain by approximately 2db per lsb (0 to 14db). provides a means for adjusting balance between rf and if gain for optimized linearity. 100 ifg when this register is 1, the upper sideband is selected (lo below rf). when this register is 0, the lower sideband is selected (lo above rf). 1 side_band sets operating mode according to the following: 00 = fm mode 01 = cellular digital mode; rfl is selected 10 = not used 11 = pcs mode; rfh is selected 01 mode 1 keeps if turbo-mode current active even when frequency acquisition is achieved. this mode is used when high operating if charge-pump current is needed. 0 icp_max set to 0 for normal operation. 0 unused 4 1 selects lol input port; 0 selects loh port. 1 lo_sel function power-up state bit name 0 buf_en
max2369 complete dual-band quadrature transmitter ______________________________________________________________________________________ 13 bit name function if_pll_shdn 1 0 shuts down the if pll. this mode is used with an external if vco and if pll. unused 1 set to 0 for normal operation. unused 0 set to 0 for normal operation. icp 00 a 2-bit register sets the if charge-pump current as follows: 00 = 200a 01 = 260a 10 = 400a 11 = 530a vco_bypass 0 1 bypasses if vco and enables a buffered input for external vco use. buf_div 0 1 selects 2 on iflo port; 0 bypasses the divider. iq_level 1 1 selects 200mv rms input mode; 0 selects 100mv rms input mode. unused 00 not used. leave in the power-up/initialized state. 15 14 13 9, 8 10 11 12 7, 6 if_pd_pol 1 5 if phase-detector polarity; 1 selects positive polarity (increasing tuning voltage on the vco produces increasing frequency); 0 selects negative polarity (increasing tuning voltage on the vco produces decreasing frequency). unused 111 4, 3 ,2 not used. leave in the power-up/initialized state. ld_mode 1 0 determines output mode for lock detector pin as follows: 0 = test mode, ld_mode cannot be 0 for normal operation 1 = if pll lock detector power-up state bit location (0 = lsb) table 4. configuration register (config) electromagnetic compliance considerations two major concepts should be employed to produce a noise-free and emc-compliant transmitter: minimize cir- cular current-loop area to reduce h-field radiation and minimize voltage drops to reduce e-field radiation. to minimize the circular current-loop area, bypass as close to the part as possible and use the distributed capacitance of a ground plane. to minimize voltage drops, make v cc traces short and wide, and make rf traces short. the don't care bits in the registers should be zero in order to minimize electromagnetic radiation due to unnecessary bit banging. rc filtering can also be used to slow the clock edges on the 3-wire interface, reduc- ing high-frequency spectral content. rc filtering also provides for transient protection against iec802 testing by shunting high frequencies to ground, while the series resistance attenuates the transients for error-free operation. the same applies to the override pins ( shdn , txgate ). when floating the override pins, bypass to ground with the capacitors as close to the part as possible. high-frequency bypass capacitors are required close to the pins with a dedicated via to ground. the 48-pin qfn-ep package provides minimal inductance ground by using an exposed paddle under the part. provide at least five low-inductance vias under the paddle to ground to minimize ground inductance. use a solid ground plane wherever possible. any cutout in the ground plane may act as slot radiator and reduce its shield effectiveness. keep the rf lo traces as short as possible to reduce lo radiation and susceptibility to interference. unused 1 1 set to 0 for normal operation.
max2369 complete dual-band quadrature transmitter 14 ______________________________________________________________________________________ table 5. power-down modes table 6. register and control pin states for key operating modes x = don? care off power-down modes comments upconverter modulator serial bus opctrl reg if lo buffer if vco if pll if pll regs config reg shdn pin ultra-low shutdown current xxxxxxxxx txgate pin for punctured tx mode x x if pll shdn for external if pll use x x tx stby tx is off, but if lo stays locked x x reg stby shuts down, but preserves registers x x x x x reg shdn serial bus is still active x x xxxxxx opctrl register c o n t r o l pins mode description lo_sel mode mod_type stby txstby shdn_bit if_pll_shdn txgate shdn pcs digital rfh selected 0 11 1 1 1 1 1 h h cellular digital rfl selected 1 01 1 1 1 1 1 h h fm direct vco modulation, rfl selected 1 00 0 1 1 1 1 h h fm_iq fm with iq modulation, rfl selected 1 00 1 1 1 1 1 h h pcs txgate gated transmission, pcs 0 11 1 1 x 1 1 l h cellular txgate gated transmission, cellular digital 1 01 1 1 x 1 1 l h sleep everything off x xx x x x x x x l
max2369 complete dual-band quadrature transmitter ______________________________________________________________________________________ 15 t cs t ch t cwl t cwh di note: the 3-wire bus is spi/qspi/microwire-compatible. clk cs t es b19 (msb) b18 b0 a3 a1 a0 (lsb) t cs > 50ns t ch > 10ns t cwh > 50ns t es > 50ns t cwl > 50ns t ew > 50ns t ew figure 3. 3-wire interface diagram if tank design the if vco tank (tank+, tank-) is fully differential. the external tank components are shown in figure 4 . the frequency of oscillation is determined by the follow- ing equation: c int = internal capacitance of tank port c d = capacitance of varactor c var = equivalent variable tuning capacitance c par = parasitic capacitance due to pc board pads and traces c cent = external capacitor for centering oscillation fre- quency c c = external coupling capacitor to the varactor internal to the ic, the charge pump will have a leakage of less than 10na. this is equivalent to a 300m ? shunt resistor. the charge-pump output must see an extremely high dc resistance of greater than 300m ? . this will minimize charge-pump spurs at the compari- son frequency. make sure there is no solder flux under the varactor or loop filter. layout issues the max2369 ev kit can be used as a starting point for layout. for best performance, take into consideration power-supply issues, as well as the rf, lo, and if lay- out. power-supply layout to minimize coupling between different sections of the ic, the ideal power-supply layout is a star configuration, which has a large decoupling capacitor at a central v cc node. the v cc traces branch out from this node, each going to a separate v cc node in the max2369 circuit. at the end of each trace is a bypass capacitor with impedance to ground less than 1 ? at the frequen- cy of interest. this arrangement provides local decou- pling at each v cc pin. use at least one via per bypass capacitor for a low-inductance ground connection. matching network layout the layout of a matching network can be very sensitive to parasitic circuit elements. to minimize parasitic inductance, keep all traces short and place compo- nents as close to the ic as possible. to minimize para- sitic capacitance, a cutout in the ground plane (and any other planes) below the matching network compo- nents can be used. on the high-impedance ports (e.g., if inputs and out- puts), keep traces short to minimize shunt capacitance. f 2(c c c c)l c cc 2(c + c ) osc int cent var par var dc dc = +++ = 1 l c d c cent c par c c c c c d max2369 c int -r n figure 4. tank port oscillator
max2369 complete dual-band quadrature transmitter tank layout keep the traces coming out of the tank short to reduce series inductance and shunt capacitance. keep the inductor pads and coupling capacitor pads small to minimize stray shunt capacitance. pin configuration ref n.c. n.c. n.c. n.c. tank + tank - iflo v cc shdn i- i+ rfl rfh lock v cc v cc v cc txgate ifin+ ifin- n.c. n.c. r bias 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 clk di cs v cc v cc ifout+ ifout- vgc v cc v cc q+ q- gnd gnd gnd gnd lol loh n.c. v cc gnd v cc ifcp v cc max2369 top view qfn-ep maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2001 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information for the latest package outline information, go to www.maxim-ic.com/packages .
e nglish ? ???? ? ??? ? ??? what's ne w p roducts solutions de sign ap p note s sup p ort buy comp any me mbe rs max2369 part number table notes: see the max2369 quickview data sheet for further information on this product family or download the max2369 full data sheet (pdf, 240kb). 1. other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales . 2. didn't find what you need? ask our applications engineers. expert assistance in finding parts, usually within one business day. 3. part number suffixes: t or t&r = tape and reel; + = rohs/lead-free; # = rohs/lead-exempt. more: see full data sheet or part naming c onventions . 4. * some packages have variations, listed on the drawing. "pkgc ode/variation" tells which variation the product uses. 5. part number free sample buy direct package: type pins size drawing code/var * temp rohs/lead-free? materials analysis max2369egm+d qfn;48 pin;7x7x0.9mm dwg: 21-0092h (pdf) use pkgcode/variation: g4877+1 * -40c to +85c rohs/lead-free: yes materials analysis max2369egm+td qfn;48 pin;7x7x0.9mm dwg: 21-0092h (pdf) use pkgcode/variation: g4877+1 * -40c to +85c rohs/lead-free: yes materials analysis max2369egm-d qfn;48 pin;7x7x0.9mm dwg: 21-0092h (pdf) use pkgcode/variation: g4877-1 * -40c to +85c rohs/lead-free: no materials analysis MAX2369EGM-TD qfn;48 pin;7x7x0.9mm dwg: 21-0092h (pdf) use pkgcode/variation: g4877-1 * -40c to +85c rohs/lead-free: no materials analysis didn't find what you need? c ontac t us: send us an email c opyright 2 0 0 7 by m axim i ntegrated p roduc ts , dallas semic onduc tor ? legal n otic es ? p rivac y p olic y

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