1/6 preliminary data november 2002 this is preliminary information on a new product now in development or undergoing evaluation. details are subject to change wit hout notice. STSJ100NH3LL n-channel 30v - 0.0027 w - 100a powerso-8 ? stripfet? iii power mosfet for dc-dc conversion n typical r ds (on) = 0.0027 w @ 10v n optimal r ds (on) x qg trade-off @ 4.5v n conduction losses reduced n switching losses reduced n improved junction-case thermal resistance description the STSJ100NH3LL utilizes the latest advanced design rules of sts proprietary stripfet? technology. this process compled to unique metallization techniques realizes the most advanced low voltage mosfet in so-8 ever produced. the exposed slug reduces the r thj-c improving the current capability. applications n specifically designed and optimised for high efficiency cpu core dc/dc converters for mobile pc s type v dss r ds(on) i d STSJ100NH3LL 30 v <0.0035 w 100 a powerso-8 ? internal schematic diagram drain contact also on the backside absolute maximum ratings ( ) pulse width limited by safe operating area. symbol parameter value unit v ds drain-source voltage (v gs = 0) 30 v v dgr drain-gate voltage (r gs = 20 k w ) 30 v v gs gate- source voltage 18 v i d drain current (continuous) at t c = 25c 100 a i d drain current (continuous) at t c = 25c (#) 22 a i d drain current (continuous) at t c = 100c 62.5 a i dm ( ) drain current (pulsed) 400 a p tot total dissipation at t c = 25c total dissipation at t c = 25c (#) 70 3 w w
STSJ100NH3LL 2/6 thermal data (#) when mounted on fr-4 board with 1 inch 2 pad, 2 oz of cu and t [ 10 sec. electrical characteristics (t case = 25 c unless otherwise specified) off on (* ) dynamic rthj-c rthj-amb t j t stg thermal resistance junction-case (#)thermal resistance junction-ambient maximum operating junction temperature storage temperature max max 1.8 42 150 -55 to 150 c/w c/w c c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 30 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating t c = 125c 1 10 a a i gss gate-body leakage current (v ds = 0) v gs = 18 v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 a 1v r ds(on) static drain-source on resistance v gs = 10 v i d = 50 a v gs = 4.5 v i d = 50 a 0.0027 0.0035 0.0035 0.005 w w symbol parameter test conditions min. typ. max. unit g fs (*) forward transconductance v ds =10 v i d = 12 a 30 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1 mhz, v gs = 0 4450 655 50 pf pf pf
3/6 STSJ100NH3LL switching on switching off source drain diode (*) pulsed: pulse duration = 300 s, duty cycle 1.5 %. ( ) pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 15 v i d = 50 a r g = 4.7 w v gs = 10 v (resistive load, figure 1) 18 50 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd =15v i d =100a v gs =4.5v (see test circuit, figure 2) 32 12.5 10 43 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd = 15 v i d = 50 a r g = 4.7 w, v gs = 10 v (resistive load, figure 3) 75 8 ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm ( ) source-drain current source-drain current (pulsed) 100 400 a a v sd (*) forward on voltage i sd = 100 a v gs = 0 1.2 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 100 a di/dt = 100a/s v dd = 25 v t j = 150c (see test circuit, figure 3) 32 34 2.1 ns nc a electrical characteristics (continued)
STSJ100NH3LL 4/6 fig. 2: gate charge test circuit fig. 3: test circuit for diode recovery behaviour fig. 1: switching times test circuits for resistive load
5/6 STSJ100NH3LL
STSJ100NH3LL 6/6 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is registered trademark of stmicroelectronics a 2002 stmicroelectronics - all rights reserved all other names are the property of their respective owners. stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com
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