1 of 2 february 13, 2006 dsc 5691 ?2005 integrated device technology, inc. all rights reserved. advanced datasheet for informational purposes only. product spec ifications subject to change without notice. not an offer for sale the information presented herein is subject to a non-disclosure agreement (nda) and is for planning purposes only. nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance. device overview the idt70K2000 is a serial rapidio tm pre-processing switch (pps). the pps is central to the "dsp farms" proce ssing architecture. it may also be used in serial rapidio backplane switching. the pps performs a variety of data processing on the payload of sample packets to accelerate the subsequent algo- rithmic operations of a receiving processor (dsp, crp, fpga). it supports serial rapidio tm packet switching (unicast, multicast, or broadcast) from any input to any output port. the pps accelerate s baseband processing in support of a variety of wireless standards. it may also be used for video imaging such as that in medical equipment, high-end surveillance, or similar signal processing-inten- sive applications. features interfaces - srio ? 40 bidirectional serial rapidio (srio) lanes v 1.3 ? port speeds selectable; 3.125gbps, 2.5gbps, or 1.25gbps ? short haul or long haul reach for each phy speed ? configurable in up to 22 ports (1x and 4x link implementations) ? error management supports standard and enhanced port operations interfaces - i 2 c ? one i 2 c port for maintenance and error reporting switch ? 10gbps peak throughput packet processor ? 100gbps peak throughput ? 10 individual packet processing sc enarios (ppsc), each capable of: within sample processing ? sign extension/deletion, endian change ? programmable number of bits per sample 2b; 4<=b<=32 bits ? sample format; i/q format or i only within packet processing ? any sample can be extracted from any 256 locations of any of 22 incoming sample packets ? the chosen sample can be placed into any location of the resultant packet (up to 256 locations) ? up to 22 samples can be summed to give one sample ouput, which is placed in any location of resultant packet ? multiple packets can be generated from a single ppsc going to a single port ? up to 8 packets can be created by a single ppsc ? each packet can be assigned a specific 32-bit memory address (in srio header) ? multiple packets from a group of input sample packets can be gener- ated by concurrently using multiple ppsc ? swrite packets formed for packet processor output packets ? incoming packet header information will be used in the resultant packet summation of up to 22 packets ? 37 bit summing of each i or q sub-sample ? dynamic range or saturation of result to 4-32 bit range ? 8 group scenarios each of which can address up to 4 individual ppsc synchronization ? non-tdm sychronization of packets from multiple ports package: 676-ball grid array, 27mm x 27mm, 1.0mm ball pitch block diagram product brief 70K2000 serial rapidio tm pre-processing switch for dsp clusters
2 of 2 february 13, 2006 idt 70K2000 ?2005 integrated device technology, inc. all rights reserved. advanced datasheet for informational purposes only. product spec ifications subject to change without notice. not an offer for sale the information presented herein is subject to a non-disclosure agreement (nda) and is for planning purposes only. nothing contained in this presentation, whether verbal or wri tten, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance. functional description the pre-processing switch (pps) from idt is optimized for dsp cluster applica- tions at board level. its main function is to have a backplane interface which can connect to a backplane switch or directly to multiple rf cards. on the line card side it can also connect to multiple ports. it supports up to 22 ports which are configurable as line card, or backplane ports. it is an end-point free (switch) device in an srio network. if packets are addressed to a certain port or a range of addresses, the unproc- essed data samples in their payload will be preprocessed to make them more ?dsp-friendly?. if not, the packets are switched as defined by the transport layer srio specification. the packet manipul ation in the pps is transparent to the srio protocol. the pps receives the packets from a total of 22 ports. depending on the device id field within a received packet, tw o functions can be performed by the pps: 1) packet processing : if destid in the srio transport layer is one of the packet processing scenario (ppsc) addresses specified in the ppsc registers, the pps terminates the srio packet and implements the sample preprocessing. the sample preprocessing operations are defined in packet process- ing scenarios (ppsc). there are a total of 10 individual ppscs in the pps. there are also 8 group ppscs (gppsc), each of which may be linked to 4 individual ppscs. 2) switching : all other addresses are treated as regular srio destina- tion addresses, and packets are switched accordingly. also three major options exist within this category: a. multicast:if a multicast id is received, the pps performs a multicast as defined in the srio multicast registers. b. unicast: all other operations are performed as specified in srio. c. maintenance packets: as specified in srio. the pps can be programmed through a cpu or a dsp connected to one of the srio ports of the device or with a cpu connected to an i 2 c or jtag bus. this option is added to allow the user to use a conventional cpu instead of a srio interface. the packets received from packet processing or switching are sent to re-trans- mit buffers, which are 8 maximum sized packets deep. 4 levels of priority can be assigned in srio packets for both sample packets and standard packets to adjust the transmission priority. the packets are switched depending on the priority. the switched packet priority then is compared to sample packet priority, and the highest priority goes into the re-transmit buffer first. once in the re-transmit buffer, the priorities do not affect the place in the buffer. the packet processing module can reach a peak throughput of 100gbps, which is the line rate for 10 ports in 4x configuration, each at 3.125gbps. it is pro- grammed via the ppsc registers. re-p rogramming each ppsc dynamically is possible, and does not affect the operation of all other ppscs, but does incur a pause on the affected ppsc. the srio switch can sustain a peak throughput of 10gbps, and switches dynamically in accordance with the packet headers. . pre-processing switch in support of baseband processing board, cellular base station figure 1 interface overview * the idt70K2000 provides direct support for backplane connections using the serial rapidio standard. the addition of an appropri ate bridge allows for further backplane flexibility, accommodating desi gns based on a wide range of standards such as cpri, obsai, gbe, pcie, or asi. rf card rf receiver (down converter) a/d d/a mac phy canbefull-mesh implementation or centralized switch baseband card pre-processing switch dsp/ crp n dsp/ crp 1 dsp/ crp 2 1x or 4x ports 3.125 gbps, 2.5 gbps, or 1.25 gbps long-haul or short-haul 5686 drw 01 bridge *
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