TK4P55DA switching regulator applications ? low drain-source on-resistance: r ds (on) = 2.0 (typ.) ? high forward transfer admittance: |y fs | = 1.8 s (typ.) ? low leakage current: i dss = 10 a (max) (v ds = 550 v) ? enhancement mode: v th = 2.4 to 4.4 v (v ds = 10 v, i d = 1 ma) absolute maximum ratings (ta = 25c) characteristics symbol rating unit drain-source voltage v dss 550 v gate-source voltage v gss 30 v dc (note 1) i d 3.5 drain current pulse (t = 1 ms) (note 1) i dp 14 a drain power dissipation (tc = 25c) p d 80 w single pulse avalanche energy (note 2) e as 121 mj avalanche current i ar 3.5 a repetitive avalanche energy (note 3) e ar 8 mj channel temperature t ch 150 c storage temperature range t stg ? 55 to 150 c note: using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operat ing temperature/current/voltage, etc. ) are within the absolute maximum ratings. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?handling precautions?/?derating concep t and methods?) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). thermal characteristics note 1:ensure that the channe l temperature does not exceed 150 . note 2: v dd = 90 v, t ch = 25c(initial), l = 17.1 mh, r g = 25 , i ar = 3.5 a note 3: repetitive rating: pulse width limited by maximum channel temperature this transistor is an electrostatic-sensitive device. handle with care. unit: mm + 0.25 ? 0.12 1.52 6.1 0.12 5.34 0.13 2.29 1 3 + 0.4 ? 0.6 10.0 6.6 0.2 2 0.76 0.12 1.14max 1.01max 2.3 0.1 0.58max 0.07 0.07 1.08 0.2 1. gate 2. drain heat sink 3. source jedec ? jeita ? toshiba 2-7k1a weight: 0.36 g (typ.) characteristics symbol max unit thermal resistance, channel to case r th (ch-c) 1.56 c/w thermal resistance, channel to ambient r th (ch-a) 125 c/w 1 3 2 internal connection silicon n channel mos type ( -mos ) www.freescale.net.cn www.freescale.net.cn 1/5
electrical characteristics (ta = 25c) characteristics symbol test condition min typ. max unit gate leakage current i gss v gs = 30 v, v ds = 0 v ? ? 1 a drain cut-off current i dss v ds = 550 v, v gs = 0 v ? ? 10 a drain-source breakdown voltage v (br) dss i d = 10 ma, v gs = 0 v 550 ? ? v gate threshold voltage v th v ds = 10 v, i d = 1 ma 2.4 ? 4.4 v drain-source on-resistance r ds (on) v gs = 10 v, i d = 1.8 a ? 2.0 2.45 forward transfer admittance ? y fs ? v ds = 10 v, i d = 1.8 a 0.4 1.8 ? s input capacitance c iss ? 380 ? reverse transfer capacitance c rss ? 2.5 ? output capacitance c oss v ds = 25 v, v gs = 0 v, f = 1 mhz ? 45 ? pf rise time t r ? 15 ? turn-on time t on ? 35 ? fall time t f ? 7 ? switching time turn-off time t off ? 55 ? ns total gate charge q g ? 9 ? gate-source charge q gs ? 5 ? gate-drain charge q gd v dd 400 v, v gs = 10 v, i d = 3.5 a ? 4 ? nc source-drain ratings and characteristics (ta = 25c) characteristics symbol test condition min typ. max unit continuous drain reverse current (note 1) i dr ? ? ? 3.5 a pulse drain reverse current (note 1) i drp ? ? ? 14 a forward voltage (diode) v dsf i dr = 3.5 a, v gs = 0 v ? ? ? 1.7 v reverse recovery time t rr ? 800 ? ns reverse recovery charge q rr i dr = 3.5 a, v gs = 0 v, di dr /dt = 100 a/ s ? 4.4 ? c marking(note 4) note 4: r l = 111 0 v 10 v v gs v dd 200 v i d = 1.8 a v out 50 duty 1%, t w = 10 s TK4P55DA lot no. part no. (or abbreviation code) * weekly code: (four digits) week of manufacture (01 for first week of year, continuing up to 52 or 53) year of manufacture (the last 2digits of the calendar year) www.freescale.net.cn www.freescale.net.cn 2/5
10 0 0 2 4 6 8 0.8 4 tc = ? 55 c 25 100 1.6 2.4 3.2 8 6.4 4.8 3.2 0 0 20 50 v gs = 6 v 10 8 30 10 7 7.5 1.6 6.5 40 0.1 0.1 1 1 100 v gs = 10 v 10 0 8 12 16 20 0 i d = 3.5 a 4 8 12 16 4 4 3.2 1.6 0.8 0 v gs = 6 v 6.5 7 8 10 2.4 r ds (on) ? i d v ds ? v gs i d ? v ds ? y fs ? ? i d i d ? v ds forward transfer admittance ? y fs ? (s) drain current i d (a) drain current i d (a) drain-source voltage v ds (v) drain-source voltage v ds (v) gate-source voltage v gs (v) gate-source voltage v gs (v) drain current i d (a) drain current i d (a) i d ? v gs common source tc = 25c pulse test commonsource tc = 25c pulse test common source v ds = 20 v pulse test common source tc = 25 pulse test common source tc = 25c pulse test drain current i d (a) drain-source on-resistance r ds (on) ( ) drain-source voltage v ds (v) 0 2 4 6 8 10 0.9 1.8 0.1 10 0.1 1 25 100 tc = ? 55 c 10 common source v ds = 10 v pulse test 7.5 7.3 20 1 10 www.freescale.net.cn www.freescale.net.cn 3/5
0 4 8 v dd = 100 v v ds v gs 400 200 12 16 500 400 300 200 100 0 20 16 12 8 4 0 0 1 2 3 5 ? 80 ? 40 0 40 80 120 160 4 1 0.1 10 100 1000 10000 1 10 100 c iss c oss c rss r ds (on) ? tc v th ? tc i dr ? v ds p d ? tc capacitance c (pf) drain power dissipation p d (w) drain-source on-resistance r ds (on) ( ) drain reverse current i dr (a) gate threshold voltage v th (v) drain-source voltage v ds (v) drain-source voltage v ds (v) case temperature tc (c) drain-source voltage v ds (v) case temperature tc (c) case temperature tc (c) total gate charge q g (nc) gate-source voltage v gs (v) common source v gs = 0 v f = 1 mhz tc = 25c common source v ds = 10 v i d = 1 ma pulse test common source i d = 3.5 a tc = 25c pulse test capacitance ? v ds dynamic input / output characteristics 0 0.1 ? 0.3 1 100 ? 0.6 ? 0.9 v gs = 0 v 10 3 1 5 ? 1.2 ? 1.5 10 common source tc = 25c pulse test 160 ? 40 0 40 80 120 ? 80 8 4.8 3.2 1.6 0 i d = 0.9 a 3.5 6.4 1.8 common source v gs = 10 v pulse test 100 0 0 40 80 120 160 40 60 80 20 www.freescale.net.cn www.freescale.net.cn 4/5
0.001 0.01 1 10 100 10 1000 100 100 s * 1 ms * 0.1 1 10 0.1 1 10 100 1m 10m 100m 1 10 t p dm t duty = t/t r th (ch-c) = 1.56 c/w duty=0.5 0.2 0.1 0.05 0.02 0.01 0.01 single pulse 0 v 15 v i ar b vdss v dd v ds r g = 25 v dd = 90 v, l = 17.1 mh ? ? ? ? ? ? ? ? ? ???= v dd b vdss b vdss 2 il 2 1 as r th ? t w e as ? t ch normalized transient thermal impedance r th (t) /r th (ch-c) pulse width t w (s) safe operating area drain current i d (a) drain-source voltage v ds (v) *: single nonrepetitive pulse tc = 25c curves must be derated linearly with increase in temperature. i d max (pulsed) * i d max (continuous) avalanche energy e as (mj) channel tempeature (initial) t ch (c) test circuit waveform dc operation tc = 25c 150 120 90 60 30 0 25 50 75 100 125 150 v dss max www.freescale.net.cn www.freescale.net.cn 5/5
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