? semiconductor components industries, llc, 2008 october, 2008 ? rev. 18 1 publication order number: cs8183/d cs8183 dual micropower 200 ma low dropout tracking regulator/line driver the cs8183 is a dual low dropout tracking regulator designed to provide adjustable buffered output voltages that closely track ( 10 mv) the reference inputs. the outputs deliver up to 200 ma while being able to be configured higher, lower or equal to the reference voltages. the outputs have been designed to operate over a wide range (2.8 v to 45 v) while still maintaining excellent dc characteristics. the cs8183 is protected from reverse battery, short circuit and thermal runaway conditions. the device also can withstand 45 v load dump transients and ? 50 v reverse polarity input voltage transients. this makes it suitable for use in automotive environments. the v ref /enable leads serve two purposes. they are used to provide the input voltage as a reference for the output and they also can be pulled low to place the device in sleep mode where it nominally draws less than 30 a from the supply. the two trackers can be combined in parallel doubling the capability to 400 ma for a single application. features ? two regulated outputs 200 ma, 10 mv track worst case ? low dropout (0.35 v typ @ 200 ma) ? low quiescent current ? independent thermal shutdown ? short circuit protection ? wide operating range ? internally fused leads in the so ? 20w package ? these are pb ? free devices *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. pin connections and marking diagram device package shipping ? ordering information so ? 20wb dwf suffix case 751d 1 20 nc nc nc gnd gnd gnd nc nc nc nc v in2 v out1 v out2 v in1 v ref /enable2 v adj1 v adj2 v ref /enable1 1 20 http://onsemi.com 8183 = specific device code a = assembly location wl = wafer lot yy = year ww = work week g = pb ? free package 8183 awlyywwg gnd nc so ? 20wb (pb ? free) CS8183YDWFR20G so ? 20wb (pb ? free) 38 units/rail cs8183ydwf20g ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. 1000/tape & reel
cs8183 http://onsemi.com 2 current limit & vsat sense + ? enable + ? independent thermal shutdown 2.0 v current limit & vsat sense + ? enable + ? independent thermal shutdown 2.0 v v out1 adj1 v ref /enable1 v out2 gnd adj2 v ref /enable2 v in1 v in2 figure 1. block diagram package pin description package lead # so ? 20w lead symbol function 1 v in1 input voltage for v out1 . 2 v out1 regulated output voltage 1. 3, 4, 7, 8, 13, 14, 17, 18 nc no connection. 5, 6, 15, 16 gnd ground (4 leads fused). 9 v adj1 adjust lead for v out1 . 10 v ref /enable1 reference voltage and enable input for v out1 . 11 v adj2 adjust lead for v out2 . 12 v ref /enable2 reference voltage and enable input for v out2 . 19 v in2 input voltage for v out2 . 20 v out2 regulated output voltage 2.
cs8183 http://onsemi.com 3 maximum ratings rating value unit storage temperature ? 65 to 150 c supply voltage range (continuous) 15 to 45 v supply voltage range (normal, continuous) 3.4 to 45 v peak transient voltage (v in = 14 v, load dump transient = 31 v) 45 v voltage range (adj, v ref /enable, v out ) ? 10 to 45 v maximum junction temperature 150 c package thermal resistance junction ? to ? case, r jc junction ? to ? ambient, r ja 18 73 c/w c/w esd capability (human body model) (machine model) 2.0 200 kv v lead temperature soldering reflow: (smd styles only) (note 1) 240 peak (note 2) c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. 60 second maximum above 183 c. 2. ? 5 c/+0 c allowable conditions. electrical characteristics (v in = 14 v; v ref /enable > 2.75 v; ? 40 c t j +125 c; c out 10 f; 0.1 < c out ? esr < 1.0 @ 10 khz; unless otherwise stated.) parameter test conditions min typ max unit regular output 1, 2 v ref ? v out v out tracking error 4.5 v v in 26 v, 100 a i out 200 ma, (note 3) ? 10 ? 10 mv dropout voltage (v in ? v out ) i out = 100 a i out = 200 ma ? ? 100 350 150 600 mv mv line regulation 4.5 v v in 26 v, (note 3) ? ? 10 mv load regulation 100 a i out 200 ma, (note 3) ? ? 10 mv adj lead current loop in regulation ? 0.2 1.0 a current limit v in = 14 v, v ref = 5.0 v, v out = 90% of v ref , (note 3) 225 ? 700 ma quiescent current (i in ? i out ) v in = 12 v, i out = 200 ma v in = 12 v, i out = 100 a v in = 12 v, v ref /enable = 0 v ? ? ? 15 75 30 25 150 55 ma a a reverse current v out = 5.0 v, v in = 0 v ? 0.2 1.5 ma ripple rejection f = 120 hz, iout = 200 ma, 4.5 v v in 26 v 60 ? ? db thermal shutdown ? 150 180 210 c v ref /enable 1, 2 enable voltage ? 0.80 2.00 2.75 v input bias current v ref /enable 1, 2 > 2.0 v ? 0.2 1.0 a 3. v out connected to adj lead.
cs8183 http://onsemi.com 4 typical characteristics 18 16 14 12 10 8 6 4 2 0 figure 2. quiescent current vs. output current 0 20 40 60 80 100 120 140 160 180 200 output current (ma) quiescent current (ma) figure 3. quiescent current vs. input voltage (operating mode) 1 0.9 0.8 0.7 0.6 0.5 0.3 0.2 0.1 0 0 5 10 15 20 25 30 35 40 45 v in , input voltage (v) quiescent current (ma) 0.4 figure 4. quiescent current vs. input voltage (sleep mode) figure 5. v out reverse current figure 6. v out reverse current 100 90 80 70 60 50 30 20 10 0 0 5 10 15 20 25 30 35 40 45 v in , input voltage (v) quiescent current ( a) 40 20 18 16 14 12 10 6 4 2 0 0 5 10 15 20 25 forced v out voltage (v) current into v out (ma) 8 140 120 100 80 60 40 20 0 0 5 10 15 20 25 forced v out voltage (v) current into v out (ma) 30 35 40 i (v out ) = 20 ma i (v out ) = 1 ma v ref / enable = 0 v v in = 6 v* v ref = 5 v** v in = 0 v * graph is duplicate for v in > 1.6v. **dip (@5v) shifts with v ref voltage. v in = 6 v* v ref = 5 v** v in = 0 v * graph is duplicate for v in > 1.6v. **dip (@5v) shifts with v ref voltage.
cs8183 http://onsemi.com 5 circuit description enable function by pulling the v ref /enable 1, 2 lead below 2.0 v typically, (see figure 10 or figure 11 ), the ic is disabled and enters a sleep state where the device draws less than 30 a from supply. when the v ref /enable lead is greater than 2.75 v, v out tracks the v ref /enable lead normally. output voltage figures 7 through 12 only display one channel of the device for simplicity. the configurations shown apply for both channels. the outputs are capable of supplying 200 ma to the load while configured as a similiar (figure 7), lower (figure 9), or higher (figure 8) voltage as the reference lead. the adj lead acts as the inverting terminal of the op amp and the v ref lead as the non ? inverting. the device can also be configured as a high ? side driver as displayed in figure 12. figure 7. tracking regulator at the same voltage figure 8. tracking regulator at higher voltages v in v out gnd gnd v ref / gnd gnd adj enable loads 5.0 v b+ c1* 1.0 f c2** 10 f v out , 200 ma v out v ref v in v out gnd gnd v ref / gnd gnd adj enable loads v ref b+ c1* 1.0 f c2** 10 f v out , 200 ma r a r f v out v ref (1 r e r a ) cs8183 cs8183 c3*** 10 nf c3*** 10 nf figure 9. tracking regulator at lower voltages figure 10. tracking regulator with enable circuit v in v out gnd gnd v ref / gnd gnd adj enable loads v ref b+ c1* 1.0 f c2** 10 f v out , 200 ma v out v ref ( r2 r1 r2 ) r2 r1 v in v out gnd gnd v ref / gnd gnd adj enable from mcu v re f b+ c1* 1.0 f c2** 10 f v out , 200 ma r cs8183 cs8183 c3*** 10 nf c3*** 10 nf figure 11. alternative enable circuit figure 12. high ? side driver v in v out gnd gnd v ref / gnd gnd adj enable 10 f v in v out gnd gnd v ref / gnd gnd adj enable mcu b+ 200 ma v out b v sat ** c2 is required for stability * c1 is required if the regulator is far from the power source filter cs8183 cs8183 5.0 v i/o ncv8501 6.0 v ? 40 v v in 100 nf v ref (5.0 v) c to load (e.g. sensor) c1* 1.0 f c3*** 10 nf c3*** 10 nf *** c3 is recommended for emc susceptibility
cs8183 http://onsemi.com 6 v in1 v out1 nc nc gnd gnd nc nc v out2 v in2 nc nc gnd gnd nc nc v adj1 v ref / enable1 v ref / enable2 v adj2 c2 20 f v out 400 ma b+ v ref c1 2.0 f figure 13. 400 ma loading 400 ma output capability normally regulator outputs cannot be combined to increase capability. this can cause damage to an ic because of mismatches in the output drivers. the tight tolerances in tracking of the cs8183 allow their outputs to be combined for increased performance. figure 13 shows the circuit connections needed to perform this function. application notes switched application the cs8183 has been designed for use in systems where the reference voltage on the v ref /enable pin is continuously on. typically, the current into the v ref /enable pin will be less than 1.0 a when the voltage on the v in pin (usually the ignition line) has been switched out (v in can be at high impedance or at ground.) reference figure 14. v out gnd gnd adj v in gnd gnd v ref / enable v out v ref 5.0 v v bat c1 1.0 f ignition switch < 1.0 a cs8183 figure 14. c2 10 f external capacitors output capacitors for the cs8183 are required for stability. without them, the regulator outputs will oscillate. actual size and type may vary depending upon the application load and temperature range. capacitor ef fective series resistance (esr) is also a factor in the ic stability. worst ? case is determined at the minimum ambient temperature and maximum load expected. the output capacitors can be increased in size to any desired va lue above the minimum. one possible purpose of this would be to maintain the output voltage during brief conditions of negative input transients that might be characteristic of a particular system. the capacitors must also be rated at all ambient temperatures expected in the system. to maintain regulator stability down to ? 40 c, a capacitor rated at that temperature must be used. more information on capacitor selection for smart regulator ? s is available in the smart regulator application note, ?compensation for linear regulators.? calculating power dissipation in a dual output linear regulator the maximum power dissipation for a dual output regulator (figure 15) is: pd(max) { v in (max) v out1 (min) } i out1 (max) { v in (max) v out2 (min) } i out2 (max2) (1) v in (max)i q where: v in(max) is the maximum input voltage, v out1(min) is the minimum output voltage from v out1 , v out2(min) is the minimum output voltage from v out2 ,
cs8183 http://onsemi.com 7 i out1(max) is the maximum output current, for the application, i out2(max) is the maximum output current, for the application, i q is the quiescent current the regulator consumes at i out(max) . once the value of pd(max) is known, the maximum permissible value of r ja can be calculated: r ja 150 c t a p d (2) the value of r ja can then be compared with those in the package section of the data sheet. those packages with r ja ?s less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heat sink will be required. figure 15. dual output regulator with key performance parameters labeled i in i out i q smart v out v in regulator control features heatsinks a heatsink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r ja: r ja r jc r cs r sa (3) where: r jc = the junction ? to ? case thermal resistance, r cs = the case ? to ? heatsink thermal resistance, and r sa = the heatsink ? to ? ambient thermal resistance. r jc appears in the package section of the data sheet. like r ja , it is a function of package type. r cs and r sa are functions of the package type, heatsink and the interface between them. these values appear in heat sink data sheets of heat sink manufacturers.
cs8183 http://onsemi.com 8 package dimensions 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition. so ? 20 wb case 751d ? 05 issue g on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 cs8183/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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