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delphi series ip m, non-isolated, integrated point-of- load power modules: 3v~5.5v input, 0.8~3.3v and 6a output current the delp hi series ipm04c no n-i s olate d , fully integrated point-of-l oad (pol) po we r module s , are the latest o f ferings from a worl d lea d e r i n po we r supp ly technol ogy and m anufa c t u ring D delt a electro n ics, inc. thi s p r o duct family p r ovide s up to 6a of o u tp ut curre n t or 19.8w of output power in an indu stry st and ard, com p a c t, ic-like, molde d p a ckag e. it is highly integrated and do es not requi re external com pone nt s to provide the poi nt-of-lo ad fun c tion. a cop p e r p ad on the ba ck of the mo d u le, in cl ose cont a c t with th e intern al he a t dissip ation compon ent s, provide s excellent the r ma l perfo rma n ce. the assem b l y proce s s of the modul es is fully auto m ated with n o manual a s se mbly involved. these co n v erters posse ss out st a ndin g electri c al an d therm a l p e rform a n c e, as well a s extremely hi gh reliability under highly stress ful operating conditions. ipm04c operate from a 3v~5.5v so urce an d prov ide a progra mmable o u tp ut volt age of 0.8 v ~3.3v . the ipm produ ct family is available in both a smd o r sip p a ckage. ipm family is al so available fo r input 8v ~14v , plea se refe r to ipm12c dat ash eet for det ails. option smd or sip p a ckage applica t ions t e lecom/dat a co m wir e less netw orks optical net w ork equipment server and dat a s t orage industrial/t e st eq uipment feat ure s high ef ficiency : 9 3 % @ 5.0v in, 3. 3v/6a out small size and low p r ofile: 17.8 x 1 5 .0 x 7.8 mm (0.70? x 0. 59 ? x 0.3 1 ?) output volt age a d justment: 0.9v~3.3v monotonic st artu p into normal an d pre-biased loads input uvl o , out put ocp r e m o t e o n /o ff output sho r t circuit protection fixed f r equenc y operation copper p ad to p r ovide excellent thermal perform ance iso 9001, t l 90 00, iso 14 001, qs9000, ohsas1800 1 certified manufactu ring ul/cul 60950 ( u s & canada ) r e cognized, and tuv (en 609 50) ce rtified ce mark meet s 73/23/eec and 9 3 /68/eec directives d a t a s h eet ipm04c0 a 0 r / s 06_ 08 242 00 6 delt a elec tronics , inc .
ds_ipm04 c0 a0r06 _08 24 2006 2 technical specifica t i o ns t a = 25c , airfl o w rate = 300 lf m, v in = 5.0vdc, nomi n al v out u n less o t her w ise note d . p a ramete r notes an d co nditio n s ipm04c0a0 r /s06f a m i n . t y p . max . unit s absolute ma ximum ra tings inpu t v o lt ag e (con ti nuous) 0 6 vdc operati ng t e mpera t ure refer to fig u re 3 3 for mea s uring poin t -40 1 16 c s t orage t e mperatu r e -55 125 c i n put characteri s ti cs operati ng inpu t v o l t age 3.0 3.3/5.0 5.5 v inpu t under -v ol t a g e lo cko ut t u rn-on v o l t age th reshold 2.4 2.7 v t u rn-o f f v o lt age th reshold 2.1 2.4 v max i mu m i npu t current vi n = vi n , m i n t o vi n , m a x, i o = i o , m a x 7.0 a no-load inpu t curr ent 100 ma of f conv erter inpu t current 3 10 m a inpu t re flected-rip p le curren t p - p 1 h i n d u c t or , 5hz t o 20 m h z 100 150 map-p inpu t v o lt ag e rippl e rejection 120 hz tbd db output charac t eri s ti cs outpu t v o lt age set point v i n=5.0v , io=io,ma x , 0.889 0.900 0.91 1 % v o ,se t outpu t v o lt age adj u st able range 0.8 3.3 v outpu t v o lt age reg u lation ov er line v i n=v i n,min to v i n , max 10 mv ov er load io= i o , m i n to io ,m a x 10 mv ov er t e mperature t a =-40 c to 85 c 1 5 mv t o t a l ou tpu t v o lt ag e range ov er sample lo ad, l i ne and temperatur e -3.0 +3. 0 % v o ,se t outpu t v o lt age rip p le and noise 5hz to 20mhz ban dw id th peak- t o-pe ak full load , 1f cer a mic, 10f t a nt alum 50 100 mvp-p rms full load , 1f cer a mic, 10f t a nt alum 10 15 mv outpu t cur r ent ran ge 0 6 a outpu t v o lt age ov e r-shoo t at s t ar t-up v i n=3.0v to 5 . 5v , io=0a to 6a , 0 3 % v o ,se t outpu t dc cur r ent- l imit in ception 200 % io dynami c chara cteri s ti cs dy namic load response 10f t an & 1f ce ramic load cap , 0.5 a /s posi tiv e s t ep chan ge in ou tput curre nt 50% io, max to 100 % io, max 150 190 mvpk negativ e s t ep cha nge in ou tpu t curr ent 100% io , max to 50 % io, max 150 190 mvpk setting t i me to 10 % o f pe ak dev i t a tio n 25 50 s t u rn-on t r an sien t io= i o . m a x s t art-up t i me, fro m on/of f con t rol 5 12 20 ms s t art-u p t i m e , f r o m inpu t 5 12 20 ms outpu t v o lt age ri se t i me t i me fo r v o to ri se from 10% to 90 % o f v o ,set, 5 10 ms max i mu m outpu t s t artup cap a ci tiv e l oad full load ; e s r R 1m ? 1000 f full load ; e s r R 10 m ? 5 0 0 0 f effi ci ency vo = 0 . 9 v v i n=5.0v , io=io,ma x , 80.0 % v o =1.2 v v i n=5.0v , io=io,ma x , 8 3 . 0 % vo = 1 . 5 v v i n=5.0v , io=io,ma x , 86.0 % v o =1.8 v v i n=5.0v , io=io,ma x , 8 8 . 0 % vo = 2 . 5 v v i n=5.0v , io=io,ma x , 91.0 % vo = 3 . 3 v v i n=5.0v , io=io,ma x , 93.0 % fea t ure chara cteri s ti cs sw itching freq uen cy 300 kh z on/off control, (l ogic high-module on) logic high module on 2.2 vi n , m a x v logic low module o f f -0.2 0.8 v on/ o ff curren t ion/of f at v o n/o f f=0 0.25 1 ma leakage curren t logic high, v on/of f=5v 50 a general specif ica t ions mtbf io= 80% io ,m ax , 30.3 m hour s w e igh t 6 g r a m s
ds_ipm04 c0 a0r06 _08 24 2006 3 electrical characteri stics cur v es figure 1 : converter ef ficie n c y vs. output current (0.90v out put volt ag e) figure 2 : converter ef ficie n c y vs. output current (1.2v outp u t volt age) figure 3 : converter ef ficie n c y vs. output current (1.5v outp u t volt age) figure 4 : converter ef ficie n c y vs. output current (1.8v outp u t volt age) figure 5 : converter ef ficie n c y vs. output current (2.5v 0utp u t volt age) figure 6 : converter ef ficie n c y vs. output current (3.3v outp u t volt age) 75 85 95 12 34 56 lo ad ( a ) ef f i c i e n c y ( % ) v i n = 5.0v v i n = 4.0v v i n = 3.3v 75 85 12 3 4 56 ef f i c i e n c y ( % ) v i n = 5.0v v i n = 4.0v v i n = 3.3v lo ad ( a ) 75 85 95 12 3 4 56 ef f i c i e n c y ( % ) v i n = 5.0v v i n = 4.0v v i n = 3.3v 75 85 95 12 3 4 56 ef f i c i e n c y ( % ) v i n = 5.0v v i n = 4.0v v i n = 3.3v lo ad ( a ) lo ad ( a ) 75 85 95 12 34 5 ef f i c i e n c y ( % ) v i n = 5.5v v i n = 5.0v v i n = 4.0v 6 load ( a ) 75 85 95 12 34 5 ef f i c i e n c y ( % ) v i n = 5.0v v i n = 4.0v v i n = 3.3v 6 load ( a )
ds_ipm04 c0 a0r06 _08 24 2006 4 electri cal characteristi cs cur ves figure 7 : outp ut rippl e & nois e at 5.0v in, 0.9 v / 6a out figure 8 : outp ut rippl e & nois e at 5.0v in, 1.2 v / 6a out figure 9 : outp ut rippl e & nois e at 5.0v in, 1.5 v / 6a out figure 1 0 : output ripp le & no i s e at 5.0v in, 1. 8v/ 6a out figure 1 1 : output ripp le & no i s e at 5.0v in, 2. 5v/ 6a out figure 1 2 : output ripp le & no i s e at 5.0v in, 3. 3v /6a out
ds_ipm04 c0 a0r06 _08 24 2006 5 electri cal characteristi cs cur ves figure 1 3 : pow e r on w a veform at 5.0vi n , 0.9v/ 6a out w i th applic atio n of v i n figure 1 4 : pow e r on w a veform at 5.0vi n , 3.3v/ 6a out w i th applic atio n of v i n figure 1 5 : pow e r of f w a veform at 5.0vi n , 0.9v/ 6a out w i th applic atio n of v i n figure 1 6 : pow e r of f w a veform 5.0vi n , 3.3v/ 6a out w i th applic atio n of v i n figure 1 7 : remote tu rn on d e lay ti me at 5.0 v in, 0.9v/ 6a out figure 1 8 : rem o te turn on dela y tim e at 5.0vin, 3.3v/ 6a out
ds_ipm04 c0 a0r06 _08 24 2006 6 electri cal characteristi cs cur ves figure 1 9 : t u rn on de lay at 5 . 0vin, 0.9v/ 6a out w i th applic atio n of v i n figure 2 0 : t u rn on de lay at 5 . 0vin, 3.3v/ 6a out w i th applic atio n of v i n figure 2 1 : t y pical trans ient re spons e to step loa d cha nge at 0.5a/s from 0 % to 50% of io, max at 5.0v in, 2.5v out ( m e a sure ment w i th a 1uf cera mic and a 1 0 f t a n t alu m figure 2 2 : t y p i cal trans ient re spons e to step loa d cha nge at 0.5a/s from 5 0 % to 0% of io, max at 5.0v in, 2.5v out ( m e a sure ment w i th a 1uf cera mic and a 1 0 f t a n t alu)
ds_ipm04 c0 a0r06 _08 24 2006 7 test configura t ions v i (+) v i (-) batter y 2 100uf ta nta l um l t o o s c i llo s c o p e note: input reflected -ri ppl e current is measured with a simulat e d sou r c e ind u ct a n c e . c u rr ent is measured at the input of the module. figure 2 3 : input reflected-ri p p le curr ent test setup vo gnd co p p e r st ri p 10 uf t a nt al um 1u f cera m i c sc o p e re sis tiv e load note: use a 10 f t ant alu m and 1 f cap a cito r . sco pe measurement sho u ld be made u s in g a bnc c o nn ec to r . figure 2 4 : peak-p eak o u tp ut nois e an d st artup transi ent me asur e m ent test setup supply i i v i vo gnd io load contact and distribution losses contact resistance figure 2 5 : output volt ag e a nd ef fic i ency me asur e m ent test setup note: all m easure m ent s are t a ken at the mo dule terminal s. when the mo d u le is not sol dere d (via so cket), pla c e kelvin co nne ction s at module terminal s to avoid measu r eme n t erro rs due to cont act resi st ance. % 100 ) ( = i i vi io vo design considera t ions input source impedance t o maint a in lo w-n o ise and ripple at the input volt age, it is critical to use low esr cap a citors at the input to the module. fig u re 26 sh o w s the in pu t ripple volt age (mvp-p) fo r variou s o u tput model s u s in g 2x100 u f l o w esr t ant alum c a p a c i tors (kemet p / n:t491d107m, 100uf/1 6v o r equival ent) or 2x22 u f very low e s r cerami c ca p a citors (tdk p/n:c322 5x7s1c226 mt, 22uf/16v o r equivalent ). the inp u t ca pacita n ce sh ould be able to handle an ac ripple cu rre nt of at least: arms vin vout vin vout iout irms ? ? ? ? ? ? ? = 1 0 50 100 150 200 250 300 01234 o u t put v o l t ag e ( v dc ) i n pu t r i pp l e v o l t ag e ( m v p - p tan t a l u m ce r a m i c figure 2 6 : input rippl e volt ag e for various o u tput mode ls, io = 6a (cin = 2x100 uf t ant a l u m cap a c i tors or 2x22 uf cera mi c cap a citors at the inp u t) the po we r module sh ou ld be conn e c ted to a lo w ac-i mpe dan ce input sou r ce. hi ghly i ndu ctive so u r ce impeda nces can af fe ct the st ability of the module. an input cap a cit ance must be placed clo s e to the modules input pin s to filter ripple curre n t and ensure m odu le st ability in the presen ce o f inductive trace s that su pply the input volt age to the mo dule.
ds_ipm04 c0 a0r06 _08 24 2006 8 design considera t ions safet y considerations for safety-ag ency app rova l the power module mu st be inst all ed in complian c e wit h the sp a c ing and sep a rati on requi rem ent s of the end-u s e safety agen cy st an da rds. for the co nverter outp u t to be con s id e r ed meetin g the requi rem ent s of safety extra-lo w volt age (sel v), the input must m eet sel v req u irem ent s. the power mod u le has extra-lo w volt age (e l v ) output s whe n all input s are el v . the input to these unit s is to be provided with a maximum 10 a time-delay fuse in the u n g rou nde d lea d . remote on/of f the ipm se ri es po we r mo dule s have a n on/of f co ntrol pin for outp u t volt age re mote on/of f ope ration. the on/of f pin is an open coll ector/d r ai n logic input si gn al that is refe re nce d to gro u nd. whe n on /of f control pi n is not use d , lea v e the pin un con n e c ted. the remote on/of f pin i s internally con necte d to +v in throug h an in ternal p u ll-u p resi sto r . figu re 27 sho w s t he circuit config uration fo r a pplying the remote on/of f pin. the module will execute a sof t st art on when t he transi s to r q1 is in the of f st ate. the typical ri se for this re mote on/of f pin at the output volt age of 0.9v and 3.3v are sho w n in fi gure 1 7 and 1 8 . vo on/ o ff vin gn d ipm q1 rl figure 2 7 : remote on/of f i m ple m ent atio n fea t ures descriptions over-current protection t o provide prote c tion in an output over load fa ult con d ition, the unit is equip ped with internal over-cu r rent prote c tion. whe n the over-cu r re nt prote c tio n is trigge red, the unit enters hiccup m ode. the u n it s operate no rm ally once the fault conditio n is rem o ved. pre-bias s t artup cap a bility the ipm would perform the monotoni c st a r tup into the pre - bia s lo ad s; so as to avoid a syst em volt ag e d r op occur upo n a pplication. in compl e x dig i t a l system s an external volt age can so metimes be pre s ente d at the output of the module duri n g po wer on. this volt a ge may be feedba ck through a multi-supply logic comp on ent, su ch a s fp ga or asic. another wa y might be via a clamp di ode as p a rt of a powe r up se quen ci ng impleme n t a ti on. o u t p u t v o l t a g e p r o g r a m m i n g the output v o lt age of ipm can be p r ogra mmed to any volt age b e tween 0.9v dc and 3.3v dc by con n e c tin g on e resi sto r (sh o w n a s rtrim in figu re 2 8 , 29) between the trim an d g nd pin s of the mod u le t o trim up (0. 9 v ~ 3.3v) and be tween the t r i m and +out put to trim d o wn (0.8v ~ 0.9v ). without this ex ternal re sisto r , the ou tput volt age of th e modul e is 0.9 vdc. t o cal c ulate th e val ue of the resi stor rtrim for a p a rti c ula r out put volt age v o , plea se u s e th e followin g eq uation: t r im up 7.0 rtrim = v adj. ?0.9 - 0.187 (k ) t r im down 2.0 rtrim = 0.9 ? v adj. - 10.187 (k ) rtrim is the e x ternal re si stor in k ? v out is the de sire d output volt age
ds_ipm04 c0 a0r06 _08 24 2006 9 fea t ures descriptions (con.) for exampl e: to prog ram th e output volt a ge of the ipm module to 3.3 v dc, rtrim i s cal c ulate d as follows: 7.0 rtrim = 3.3 ?0.9 - 0.187 (k ) r t r i m = 2 . 72 9 k ? ipm can also be progra mmed by applying a volt age betwe en the trim and gnd pin s (figure 30 ). the followin g equ ation ca n be use d to determine the valu e of vtrim neede d for a desi r ed output volt ag e v o : vtrim = 0.716 8 ? 0.0187v o vtrim is the e x ternal volt ag e in v v o is the de si red outp u t volt age for exampl e, to prog ram th e output volt a ge of a ipm module to 3.3 vdc, vtrim is calculated a s follows vtrim = 0.716 8 ? 0.0187 x 3.3 vtrim = 0.655 1v figure 3 0 : circuit config urati on for progr a m mi ng o u tput vol t age usin g extern al volt ag e source rt r i m lo a d vo ut tri m gn d figure 2 9 : t r im dow n circ uit configuratio n for progra m mi ng output volt a ge usin g an exter nal res i stor figure 2 8 : t r im up circ uit config uratio n for progr a m min g output volt a ge usin g an exter nal res i stor
ds_ipm04 c0 a0r06 _08 24 2006 10 the amo unt of powe r del ivered by th e modul e is the volt age at th e output terminals multip lied b y the o u tput curre n t. whe n using the trim feature, the output volt age of the modul e can be in cre a sed, whi c h at the sa me output curre n t would incre a se the po wer output of the module. care sho u ld b e t a ke n to ensure that the maximum output powe r of the module must not excee d the maximum rated po we r ( v o .set x io.max p m a x ). v o lt age margining output volt ag e margi n ing can be impl em ented in the i p m module s by conne cting a resi stor , r m a rgin -u p , from the t r im pin to the gro und pin fo r m a rgini n g - up t he output volt age and by co nne cting a re si stor , r m a rgin -d o w n , from the t r im pin to the output pin for marg ining-do wn. figure 31 sh ows the circuit co nfiguratio n fo r output volt a ge marginin g . if unu sed, leav e the trim pin unconn ecte d. vo on/ o ff vi n gnd tri m ipm q2 q1 rm a r gi n- up rm a r gi n- dow n rt r i m figure 3 1 : circuit config urati on for outp u t voltag e margi n i n g fea t ure descriptions (con. ) t able 1 provi des rtrim val ues requi red for som e com m on output volt ag es, while t a b l e 2 provid es value of externa l volt age so urce, vtrim, for the same common o u tput volt age s. by using a 0.5% tolerance resi sto r , set point toleran c e of 2% can be achieve d a s spe c ified in the electri c al spe c ificatio n. t a ble 1 vo (v) rtri m ( ? ) 0 . 9 o p e n 1 . 2 2 3 . 1 4 6 k 1 . 5 1 1 . 4 7 9 k 1 . 8 7 . 5 9 0 k 2 . 5 4 . 1 8 8 k 3 . 3 2 . 7 2 9 k t a ble 2 vo (v) vtrim (v) 0 . 9 0 . 7 0 0 0 1 . 2 0 . 6 9 4 3 1 . 5 0 . 6 8 8 7 1 . 8 0 . 6 8 3 1 2 . 5 0 . 6 7 0 0 3 . 3 0 . 6 5 5 1
ds_ipm04 c0 a0r06 _08 24 2006 11 thermal consi d era t i o ns therm a l man ageme n t is a n importa nt part of the syst em desi gn. to e n su re p r op er, reliabl e ope ration, suffici e n t cooli ng of th e po we r mod u le is nee de d over th e e n tire temperature range of the modul e. co n v ection co olin g is usu a lly the dominant mo d e of heat tran sfer. hen c e, the choi ce of eq uipment to chara c te rize the thermal p e rf orma nce of the po wer m odule i s a wind tunnel. thermal t esting setup delta? s dc/ dc po we r module s are chara c te rize d in heated verti c al wind tunn els t hat simu late the thermal environ ment s encou ntered in most electroni cs equipm ent. this type of equipm ent comm only u s e s vertically mou n ted circuit card s in cabi n e t rac ks in w h ich the power mo dule s are m o unted. the followi ng figure sho w s t he wind t unnel cha r a c teri zati on setup. the power mod u l e is mounted on a test pwb and is verti c ally positione d within the wind tunnel. the h e ight of this f an du ct is co nst a ntly kept at 25.4mm (1? ? ). thermal derating heat can b e remove d by increa sing airflow over the module. t o enha nce system reli abi lity, the powe r module sho u l d alway s be operated bel o w the maxim u m operating te mperature. if the tempera t ure exce ed s the maximum module temperat ure, reli ability of the unit may be affected. modu l e a ir f l o w 12 .7 (0 .5?) 50 .8 (2 .0?) f a ci ng p w b pw b air ve l o ci t y an d am bie n t t e mper at u r e me asu re d b e l o w t h e m o dul e 2 5 . 4 (1 .0 ?) figure 3 2 : win d tunne l test setup figure 3 3 : t e mp eratur e mea s ure m e n t locati on * t he al low ed max i mu m h o t spot temperat ure is defin ed at 1 1 6 .
ds_ipm04 c0 a0r06 _08 24 2006 12 thermal cur ves (con.) ipm04c(standard) o u tput c u r r ent v s . am bi ent tem per ature and ai r vel o c i t y @ vi n=5v, v out = 3. 3v (ei t her o r i entat i on) 0 1 2 3 4 5 6 7 25 35 45 55 65 7 5 85 a m bi en t temper atur e ( ) o u t pu t c u rr en t ( a ) natural conv ec ti on figure 3 4 : output current vs. ambi ent tempe r ature an d air v e locity @ v i n= 5v , v o u t = 3 .3v(eithere orient atio n) ipm04c(standard) o u tput c u r r ent v s . am bi ent tem per ature and ai r vel o c i t y @ vi n=5v, v out = 1. 8v (ei t her o r i entat i on) 0 1 2 3 4 5 6 7 25 35 45 55 65 7 5 85 a m bi ent temper atur e ( ) ou tput cur r ent( a ) natur a l conv ec t i on figure 3 5 : output current vs. ambi ent tempe r ature an d air v e locity @ v i n= 5v , v o u t = 1 .8v(either orient atio n) ipm04c(standard) o u tput c u r r ent v s . am bi ent tem per ature and ai r vel o c i t y @ vi n=3.3v, vout = 2.5v (ei t her o r i ent ati o n) 0 1 2 3 4 5 6 7 25 35 45 55 65 7 5 85 a m bi e n t temper atur e ( ) o u t pu t c u rr en t ( a ) natur a l conv ec t i on figure 3 6 : output current vs. ambi ent tempe r ature an d air v e locity @ v i n= 3.3v , v out= 2 .5v(eithe r e orient atio n) ipm04c(standard) o u tput c u r r ent v s . am bi ent tem per ature and ai r vel o c i t y @ vi n=3.3v, vout =0.9v ( e i t her o r i ent ati on) 0 1 2 3 4 5 6 7 25 35 45 55 65 7 5 85 a m bi ent temper atur e ( ) o u tput cur r ent( a ) natur a l conv ec t i on figure 3 9 : output current vs. ambi ent tempe r ature an d air v e locity @ v i n= 3.3v , v out= 0 .9v(eithe r orient ation) ipm04c(standard) o u tput c u r r ent v s . am bi ent tem per ature and ai r vel o c i t y @ vi n=3.3v, vout =1.5v ( e i t her o r i ent ati on) 0 1 2 3 4 5 6 7 25 35 45 55 65 7 5 85 a m bi ent temper atur e ( ) out put cur r ent( a ) natural conv ec ti on figure 3 8 : output current vs. ambi ent tempe r ature an d air v e locity @ v i n= 3.3v , v out= 1 .5v(eithe r orient ation) ipm04c(standard) o u tput c u r r ent v s . am bi ent tem per ature and ai r vel o c i t y @ vi n=3.3v, vout = 2.5v (ei t her o r i ent ati o n) 0 1 2 3 4 5 6 7 25 35 45 55 65 7 5 85 a m bi e n t temper atur e ( ) o u t pu t c u rr en t ( a ) natur a l conv ec t i on figure 3 7 : output current vs. ambi ent tempe r ature an d air v e locity @ v i n= 3.3v , v o = 2 .5v(either orient atio n
ds_ipm04 c0 a0r06 _08 24 2006 13 p i c k a n d p l a c e l o c a t i o n s u r f a c e - m o u n t t a p e & r e e l all dime nsi ons are in mil limet e r s (inches) all dime nsio ns are in millim eters (inch e s) lead free pro c ess reco mmend temp . profile tem p . ti m e 150 200 90~ 150 s e c ti m e li m i t e d 6 0 s e c a b o v e 210 210 p r eh ea t t i m e ra m p u p ma x . 3 /s e c ra m p d o w n ma x . 4 /s e c p e a k t e m p . ~ 220 25 note : all temperature refers to topside of t h e package, meas ured on the package body surface. leaded (sn/pb) process recommend temp . profile temp . ti me 100 150 60~ 150 s e c 60 ~ 120 s e c 183 p r eh ea t t i m e ra m p u p ma x . 3 /s e c ra m p d o w n ma x . 4 /s e c p e a k t e m p . ~ 225 25 no te: all temp eratu r e refe rs to assemb l y a p p lication bo ard , measu red o n th e lan d o f asse mb ly ap p licatio n b o a r d .
ds_ipm04 c0 a0r06 _08 24 2006 14 t to t h e ground note: millimeters (inches) standa rd dimension tol e rance is 0.10(0.00 4?) mechanical dra w ing smd p a ckage sip p a ckage note : the c o p p e r pa d is re c o mme nde d to c onne c re c o m m e n d pw b hol e l ayo ut 1 234 5 r e c o m m en d p w b p a d l a yo ut 1 234 5 12 3 4 5 76 all dimension are in
ds_ipm04c0a0r06_08242006 15 part numbering system ipm 04 c 0a0 r 06 f a product family input voltage number of outputs output voltage package output current option code integrated pol module 04 - 3v ~ 5.5v 12 - 8v ~ 14v c - low current 0a0 ? programmable output r - sip s - smd 06 - 6a f- rohs 6/6 (lead free) a - standard functions model list model name packaging input voltage output voltage output current efficiency (typical @ full ipm12c0a0r04fa sip 8v ~14v 0.8v ~ 5v 4a 91% ipm12c0a0s04fa smd 8v ~14v 0.8v ~ 5v 4a 91% ipm04c0a0r06fa sip 3v ~ 5.5v 0.8v ~ 3.3v 6a 93% IPM04C0A0S06FA smd 3v ~ 5.5v 0.8v ~ 3.3v 6a 93% contact: www.delta.com.tw/dcdc usa: telephone: east coast: (888) 335 8201 west coast: (888) 335 8208 fax: (978) 656 3964 email: dcdc@delta-corp.com europe: phone: +41 31 998 53 11 fax: +41 31 998 53 53 email: dcdc@delta-es.com asia & the rest of world: telephone: +886 3 4526107 ext 6220 fax: +886 3 4513485 email: dcdc@delta.com.tw warranty delta offers a two (2) year limited warranty. complete warranty information is listed on our web site or is available upon request from delta. information furnished by delta is believed to be accurate and reliable. however, no responsibility is assumed by delta for its use, nor for any infringements of patents or other rights of third parties, which may result from its use. no license is granted by implication or otherwise under any patent or pat ent rights of delta. delta reserves the right to revise these specifications at any time, without notice .

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