1/4 rev. a s t r u c t u r e silicon monoli thic integrated circuit product name strobe capacitor cha rging control ic model no. ? features 1. built-in power transistor(45v dmos) 2. adjustable transformer primary-side peak cu rrent to linear curr ent with the adj pin 3. charging control switching with the start pin 4. includes high precision full cha rge voltage detection circuit a nd output pin 5. various built-in protective circuits (tsd, uvlo) 6. built-in protective circuits (sdp) 7. built-in igbt driver(vdd supply for igbt driver) 8. employs small package: vqfn016v3030 (3.0 mm 3.0 mm 1.0 mm) absolute maximum ratingsta25 parameter symbol rating unit vcc supply voltage vcc -0.37 v vdd supply voltage vdd -0.37 v sw pin vsw 45 v vc pin (dc characteristic ) vcdc -1550 v input pin voltage (start, adj, igbt_in, igbt_en) vi -0.37 v operating temperature range topr -35+85 c storage temperature range tstg -55+150 c junction temperature tjmax 150 c power dissipation pd 1770 *1 mw operating conditionsta=25 parameter symbol rating unit vcc supply voltage range vcc 2.55.5 v vdd supply voltage range vdd 2.55.5 v input pin voltage (start, adj, igbt_in, igbt_en) vi 0vcc v full pin input current range vfull 05.5 v *1: reduced by 14.16 mw/ c at ta=25 c or more (when mounted on a 74.2 mm 74.2 mm 1.6 mm glass epoxy, 4-layer board: surface radiating copper foil of 6.28mm 2 , copper foil laminated in each layer) outside marking and dimension (unit:mm) b 2 d 4 2 2 lot no. fig.1 outside marking and dimension
2/4 rev. a electrical characteristics (ta =25,vcc=start=vdd=3.3v, vbat=3.6 v,adj=1.0v,unless otherwise specified.) parameter symbol target value unit condition min. standard max. overall device vcc current consumption ivcc 1 2.5 ma at output off vcc circuit current standby operation istb 1 a start=0v vdd current consumption ivdd 20 40 80 a igbt_en=3.3v,igbt_in=0v vdd circuit current standby operation ivddstb 1 a igbt_en=0.0v,igbt_in=0v standby control start pin start pin high voltage vsth 2.0 v start pin low voltage vstl 0.6 v start pin sink current istart 12 24 36 a start=3.3v unresponsive time when start shorted tstart 6 12.5 25 s transformer primary-side driver block sw pin leak current iswl 1 a sw=45v sw pin peak current 1 ipeak1 0.9 1.0 1.1 a adj=0v sw pin peak current 2 ipeak2 1.5 1.6 1.7 a adj=1v sw pin peak current 3 ipeak3 3.05 3.20 3.35 a adj=3v sw saturation voltage vsat 0.10 0.20 v isw=0.5a charging characteristics adjustment block adj sink current iadj 5 10 a maximum on time tonmax 25 50 100 s maximum off time toffmax 12 25 50 s transformer secondary -side detection block vc pin sink current ivc 1 2 4 ma vc=30v full charge detection voltage vfullth 29.7 30 30.3 v off detection voltage voffl -1.3 -0.5 -0.2 v full pin on resistance rfulll 50 110 300 full=0.5v full pin leak current ifullh 1 a full=3.3v anti-ringing filter time tvcf 100 200 320 ns protective circuit block uvlo detection voltage vuvloth 1.9 2.05 2.2 v vcc detection uvlo hysteresis width vuvlohys 180 230 280 mv uvlo vdd detection voltage vuvlodth 1.9 2.05 2.2 v vdd detection igbt_in=3.3v, igbt_en=3.3v uvlo vdd hysteresis width vuvlodhys 180 230 280 mv igbt_in=3.3v, igbt_en=3.3v igbt driver block high-level output short circuit current ioso 90 140 200 ma igbt_in=3.3v, igbt_en=3.3v start=0v,igbt_out_p=0v low-level output short circuit current iosi 30 60 90 ma igbt_in=0v, igbt_en=3.3v start=0v,igbt_out_n=3.3v igbt_in high-level input voltage range1 vigbth1 2.0 v igbt_en=3.3v, start=0v igbt_in high-level input voltage range2 vigbth2 1.4 v vdd=3.03.6v, ta=-2585, igbt_en=3.3v igbt_in low-level input voltage range vigbtl 0.6 v igbt_en=3.3v, start=0v igbt_in sink current iigbt_in 12 24 36 a igbt_in=3.3v, start=0v igbt_en high-level input voltage range vigbtenh 2.0 v igbt_in=3.3v, start=0v igbt_en low-level input voltage range vigbtenl 0.6 v igbt_en sink current iigbt_en 4.5 6.5 10 a igbt_en=3.3v, igbt_in=3.3v pin no. fig.3 top view pin no. pin name function 1 vdd vdd supply pin 2 vcc vcc supply pin 3 gnd ground pin 4 adj primary-side current control pin 5 full full charge detection flag pin 6 start standby pin 7 vc secondary C side voltage detection pin 810 sw switching pin 11,12 pgnd power gnd pin 13 igbt_in input terminal of trigger signal for starting output of igbt dr iver 14 igbt_en input terminal of control enable signal of igbt driver 15 igbt_out_n igbt driver output n pin 16 igbt_out_p igbt driver output p pin 1 2 3 4 5 7 8 9 10 16 15 14 13 12 11 6
3/4 rev. a blosk diagrum uvlotsdsdp fig.3 block diagram fig.4 timing chart: under protective circuit operation uvlo if the vcc voltage is reduced to the uvlo detection voltage spe cified in the electrical chara cteristics or less, the uvlo protective circuit is activated and the charging operation temp orarily stops. (see time c and e in fig.4.) after that, when the vdd voltage becomes the uvlo release voltage or more, the c harging operation automatically restarts. (see time d and f in fig.4.) vdd uvlo if the vdd voltage becomes the v dd uvlo detection voltage or le ss, the igbt_out voltage is forced to be set to "l". termal shut down (tsd) it protects the ic against thermal runaway due to excessive tem perature rise (tj>190 c [typ]). after detection, the charging operation temporarily stops (see time g in fig.4.), and when the chip temperature decreases, (tj<165 c [typ]), it automatically restarts. (see time h in fig.4.) vc pin short detection (sdp) if the vc pin becomes the gnd level due to any failure and the powermos repeats switching 2 16 (=65536) times which is the sdp count number (tsdp) at the maximum off time, it is judged a s an error and the charging operation is forced to be stopped. (see time b in fig.4.) if the start pin is c hanged from "l" to "h" and the uvlo detection is released, it restarts. stb s r q logic stb uvlo tsd s r os vcc full uvlo q vcc tsd pgnd stb s r full os q vc vcc start adj full igbt_in gnd vref uvlo tsd start off time detection max off time drv + - 1/a + - gnd vdd igbt_en sdp sdp sdp vc anti- ringing filter uvlo_vdd maxon max_on sw sw igbt_out_p vc pgnd pgnd igbt_out_n max_on *stb : standby signal *os : one shot pulse sw 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 operation stop due to increase of chip temperature a b c d e f g h i t t t t t i vcap vvc vstart voltage at completion of charge uvlo detection voltage operation restart due to decrease of chip temperature tsdp hysterisis operation stop due to uvlo detection operation restart due to uvlo release
4/4 rev. a pin a gnd parasitic element parasitic element gnd pin b b c e gnd p substrate n p n n p + p + pin b parasitic transistor b n e c gnd gnd p substrate n p n n p + p + pin a resist parasitic precautions for use 1. absolute maximum rating although we pay due attention to the quality control of these p roducts, the possibility of deterioration or destruction may ex ist when impressed voltage, operating temperature range, etc., exce ed the absolute maximum rating. in addition, it is impossible t o assume a destructive situation, such as short circuit mode, ope n circuit mode, etc. if a specia l mode exceeding the absolute maximum rating is assumed, please review to provide physical sa fety means such as fuse, etc. 2. gnd potential maintain the pgnd pin potential at the minimum level under the operating conditions. furthermor e, maintain the pin except the vc pin at a voltage higher than the pgnd pin voltage including an actual transient phenomenon. the sw pin sometimes is charge d by a negative voltage depending on the characteristics of t he external transformer. if any change in or damage of electrical characteristics is suspected due to the sw pin being charged by a negative voltage, i t is recommended that a schottky di ode should be connected betwee n the sw pin and the pgnd pin. 3. thermal design work out the thermal design with sufficient margin taking power dissipation (pd) at the actual operation condition into accoun t. 4. protective circuits this ic don ? t have over current protect circuit. the threat of destruction may exist , if pd is over caused by over current or short circuit pin . be careful t o design around circuit. 5. short circuit between p ins and incorrect mounting sufficient caution is required fo r ic direction or displacement when installing ic on pcb. if ic is installed incorrectly, it may be broken. also, the threat of destruction may exist in short circ uits caused by foreign object invasion between outputs or outpu t and gnd of the power supply. 6. common impedance when providing a power supply an d gnd wirings, give sufficient consideration to lowering common impedance, reducing ripple (i. e. making thick and short wiring, reduction ripple by lc, etc.) as much as possible. fig.5 other adjacent elements
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