this is advanced information on a new product now in development or undergoing evaluation. details are subject to change withou t notice. L4937NPD june 2000 dual 5v multifunction voltage regulator ? . standby output voltage precision 5v 2% . output 2 tracked to the standby out- put . output 2 disable function for standby mode . very low quiescent current, less than 260 m a, in standby mode . output currents : i 01 = 50ma, i 02 = 500ma . very low dropout (max 0.4v/0.6v) . operating transient supply voltage up to 40v . power-on reset circuit sensing the standby output voltage . power-on reset delay pulse defined by the external capacitor . thermal shutdown and short circuit protections powerso20 ordering number: L4937NPD description the L4937NPD is a monolithic integrated dual volt- age regulators with two very low dropout outputs and additional functions such as power-on reset and input voltage sense. they are designed for supply- ing microcomputer controlled systems specially in automotive applications. pin connection (top view) gnd n.c. n.c. v s v s n.c. gnd ct en n.c. gnd 10 8 9 7 6 5 4 3 2 13 14 15 16 17 19 18 20 12 1 11 gnd d95at162a n.c. reset v o1 gnd n.c. v o2 n.c. gnd 1/9
block diagram reg1 1.23v reference reg2 reset 2.0v 1.23v v s1 v s2 en res ct v o2 v o1 gnd d95at163 2 m thermal data symbol parameter value unit r thj-case thermal resistance junction-case max. 1.5 c/w L4937NPD 2/9
absolute maximum ratings symbol parameter value unit v s dc supply voltage 28 v transient supply voltage (t < 1s) 40 v t j , t stg junction and storage temperature range C55 to 150 c i en enable input current (v en 0.3v) 1 ma v en enable input voltage v s v res reset output voltage 20 v i res reset output current 5 ma p d power dissipation 875 mw reg1 1.23v reference reg2 reset 2.0v 1.23v v s1 v s2 en res ct v o2 v o1 gnd d95at164 c s ct c o1 2 m application circuit c s 3 1 m f ; c 01 3 6 m f ; c 02 3 10 m f, esr < 10 w at 10khz note : the circuit is esd protected according to milCstdC883c. L4937NPD 3/9
electrical characteristics (v s = 14v; C40 c t j 125 c unless otherwise specified) symbol parameter test conditions min. typ. max. unit v s operating supply voltage 25 v v o1 standby output voltage 6v v s 25v 1ma i o1 50ma 4.90 5.00 5.10 v v o2 - v o1 output voltage 2 tracking error 6v v s 25v 5ma i o2 500ma enable = low C25 +25 mv v dp1 dropout voltage 1 i o1 = 10ma i o1 = 50ma 0.1 0.2 0.25 0.4 v v v io1 input to output voltage difference in undervoltage condition vs = 4v, i o1 = 35ma 0.4 v v dp2 dropout voltage 2 io1 = 100ma i o1 = 500ma 0.2 0.3 0.3 0.6 v v v io2 input to output voltage difference in undervoltage condition vs = 4.6v, i o1 = 350ma 0.6 v v ol 1.2 line regulation 6v v s 25v i o1 = 1ma; i o2 = 5ma 20 mv v olo1 load regulation 1 1ma i o1 50ma 25 mv v olo2 load regulation 2 5ma i o2 500ma 50 mv i lim1 current limit 1 v o1 = 4.5v v o1 = 0v (note 1) 55 25 100 50 200 100 ma ma i lim2 current limit 2 v o2 = 0v 550 1000 1700 ma i qsb quiescent current standby mode (output 2 disabled) i o1 = 0.3ma; t j < 100 c v en 3 2.4v v s = 14v v s = 3.5v 210 340 290 850 m a m a i q quiescent current i o1 = 50ma i o1 = 500ma 30 ma enable v enl enable input low voltage (output 2 active) C0.3 1.5 v v enh enable input high voltage 2.4 7 v v enhyst enable hysteresis 30 75 200 mv i en enable input current 0v < v en < 1.2v 2.5v < v en < 7v C10 C1 C1.5 0 C0.5 +1 m a m a L4937NPD 4/9
functional description the l4937nd is based on the sgs-thomson mi- croelectronics modular voltage regulator approach. several out-standing features and auxiliary func- tions are provided to meet the requirements of sup- plying the microprocessor systems used in automo- tive applications. furthermore the device is suitable also in other ap- plications requiring two stabilized voltages. the modular approach allows other features and functions to be realized easily when required. standby regulator the standby regulator uses an isolated collector vertical pnp transistor as the regulating element. this structure allows a very low dropout voltage at currents up to 50ma. the dropout operation of the standby regulator is maintained down to 2v input supply voltage. the output voltage is regulated up to the transient input supply voltage of 40v. this fea- ture avoids functional interruptions which could be generated by overvoltage pulses. the typical curve of the standby output voltage as a function of the input supply voltage is shown in fig. 1. the current consumption of the device (quiescent current) is less than 260 m a when output 2 is dis- abled (standby mode). the dropout voltage is con- trolled to reduce the quiescent current peak in the undervoltage region and to improve the transient response in this region. the quiescent current is shown in fig. 2 as a function of the supply input voltage 2. output 2 voltage the output 2 regulator uses the same output struc- ture as the standby regulator, but rated for an output current of 500ma. the output 2 regulator works in tracking mode with the standby output voltage as a reference voltage when the output 2. the output 2 regulator can be switched off via the enable input. note : 1: foldback characteristic electrical characteristics (continued) reset symbol parameter test conditions min. typ. max. unit v rt reset low threshold voltage v o1 -0.4 4.7 v o1 -0.1 v v rth reset threshold hysteresis 50 100 200 mv t rd reset pulse delay c t = 100nf; t r > 100 m s 55 100 180 ms t rr reset reaction time c t = 100nf 1 10 50 m s v rl reset output low voltage r res = 10k w to v 01 v s = 1.5v 0.4 v i lres reset output high leakage v res = 5v 1 m a v cth delay comparator threshold 2.0 v v cth, hyst delay comparator threshold hysteresis 100 mv figure 1 : output voltage vs. input voltage. L4937NPD 5/9
figure 2 : quiescent current vs. supply voltage. figure 3 : programmable output 2 voltage with external resistors. 400 m 200 m reset circuit the block circuit diagram of the reset circuit is shown in fig. 4. the reset circuit supervises the standby out- put voltage. the reset threshold of 4.7v is defined by the internal reference voltage and the standby output divider. the reset pulse delay time t rd , is defined by the charge time of an external capacitor c t : c t x 2v t rd = 2 m a the reaction time of the reset circuit depends on the discharge time limitation of the reset capacitor c t and is proportional to the value of c t . the reaction time of the reset circuit increases the noise immunity. in fact, if the standby output voltage drops below the reset threshold for a time shorter than the reaction time t rr , no reset output variation occurs. the nominal reset delay is generated for standby output voltage drops longer than the time necessary for the complete discharging of the ca- pacitor c t . this time is typically equal to 50 m s if c t = 100nf. the typical reset output waveforms are shown in fig. 5. L4937NPD 6/9
figure 4 : block diagram of the reset circuit. vinput vout1 vout1 vrt +0.2v vrt 1.5v reset t r t rd t rd t rr d95at216 figure 5 : typical reset output waveforms. L4937NPD 7/9
jedec mo-166 powerso20 e a2 a e a1 pso20mec detail a t d 1 11 20 e1 e2 h x 45 detail a lead slug a3 s gage plane 0.35 l detail b r detail b (coplanarity) gc - c - seating plane e3 b c n n h bottom view e3 d1 dim. mm inch min. typ. max. min. typ. max. a 3.6 0.142 a1 0.1 0.3 0.004 0.012 a2 3.3 0.130 a3 0 0.1 0.000 0.004 b 0.4 0.53 0.016 0.021 c 0.23 0.32 0.009 0.013 d (1) 15.8 16 0.622 0.630 d1 9.4 9.8 0.370 0.386 e 13.9 14.5 0.547 0.570 e 1.27 0.050 e3 11.43 0.450 e1 (1) 10.9 11.1 0.429 0.437 e2 2.9 0.114 e3 5.8 6.2 0.228 0.244 g 0 0.1 0.000 0.004 h 15.5 15.9 0.610 0.626 h 1.1 0.043 l 0.8 1.1 0.031 0.043 n 10? (max.) s t10 0.394 (1) "d and f" do not include mold flash or protrusions. - mold flash or protrusions shall not exceed 0.15 mm (0.006"). - critical dimensions: "e", "g" and "a3" outline and mechanical data 8? (max.) 10 L4937NPD 8/9
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsib ility for the conse- quences of use of such information nor for any infringement of patents or other rights of third parties which may result from i ts use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmi- croelectronics products are not authorized for use as critical components in life support devices or systems without express wr itten approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics ? 2000 stmicroelectronics C printed in italy C all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com L4937NPD 9/9
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