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2 1 3 5? 2 . x j s f ! f f q s p n 19-4675; rev 9; 12/10 ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ?d e t 3 5 4 25r 2 1 3 5? 2 . x j s f ? f f q s p n`?? @ ?
? 3 6 7?k??v? 9 ?@ |3e? ? ??u f f q s p n@??? ? @$ ??a-2]???v? ? t f q s p n 6^ y+? f q s p n 6^ y+???|??- 2 $? 1 e t 3 5 4 20 -]?? 2 . x j s f#?r0g0gg *e| 2 . x j s fog ? h??|y ? ?| 7 5? s p n? i ?? i? ? 0v?`?? ?| 2 . x j s f? e 1| ?? i?h?r? ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` b |h 0 q d c$0 ? eek?@ tj j f f f ! q 2 5 6 2 / 5 ? ?| y ee l] ? ^2 t ?$0 rbi ? ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` v ? 2 1 3 5? f f q s p n@ j?? ? 3 6 7? ? ?a|@-2|v? ? t??? f q s p n 6^ y+ )v? 1 * ? 0 -$ ? ? if h|v?r ? ? ? j f d ! 2 1 1 1 . 5 . 3 ! 5 f t e? ? )?o 9 l w{? 9? y+ 2 6 l w? 9? y+ * ? -? . 5 1 d? , 9 6 dt *? 3 / 9 w? 6 / 3 6 w?1 * ??rvw+ ? ?m 2 . x j s fog? 2 6 / 5 l c q t t 2 3 6 l c q t h' ] k g s ?0g ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ? g? io r pup v cc c gnd ds2431 ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ?o ?+? 5 ?? r| u p . : 3 v?|[m.??? 2 1 1 n j m ! ) 3 / 6 5 n n *.g ??l v?d + -,? ) q c * 0 o ] s p i t*e| v? u ' s ! > ! rt? * f q ! > ! a fd 2 . x j s f5 n b y j n ! j o u f h s b u f e ! q s p e v d u t - ! j o d /|?* [m|??k?t?|" ? part temp range pin-package ds2431+ -40c to +85c 3 to-92 ds2431+t&r -40c to +85c 3 to-92 ds2431p+ -40c to +85c 6 tsoc ds2431p+t&r -40c to +85c 6 tsoc ds2431g+ -40c to +85c 2 sfn ds2431g+t&r -40c to +85c 2 sfn ds2431q+t&r -40c to +85c 6 tdfn-ep* (2.5k pcs) ds2431x-s+ -40c to +85c 3x3 ucspr (2.5k pcs) ds2431x+ -40c to +85c 3x3 ucspr (10k pcs) available evaluation kit available ?????????????? ? ????? maxi m? 1080 0 85 2 124 9 () 1080 0 15 2 124 9 ( ) maxi m?china.maximintegrated.com ds2431 2 1 3 5? 2 . x j s f ! f f q s p n absolute maximum ratings electrical characteristics (t a = -40c to +85c.) (note 1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. io voltage range to gnd .......................................-0.5v to +6v io sink current ...................................................................20ma operating temperature range ...........................-40c to +85c junction temperature ......................................................+150c storage temperature range .............................-55c to +125c lead temperature (excluding ucsp, soldering, 10s).....+300c soldering temperature (reflow) to-92 ............................................................................+250c ail other packages, excluding sfn ..............................+260c parameter symbol conditions min typ max units io pin: general data 1-wire pullup voltage v pup (note 2) 2.8 5.25 v 1-wire pullup resistance r pup (notes 2, 3) 0.3 2.2 k input capacitance c io (notes 4, 5) 1000 pf input load current i l io pin at v pup 0.05 6.7 a high-to-low switching threshold v tl (notes 5, 6, 7) 0.5 v pup - 1.8 v input low voltage v il (notes 2, 8) 0.5 v low-to-high switching threshold v th (notes 5, 6, 9) 1.0 v pup - 1.0 v switching hysteresis v hy (notes 5, 6, 10) 0.21 1.70 v output low voltage v ol at 4ma (note 11) 0.4 v standard speed, r pup = 2.2k 5 overdrive speed, r pup = 2.2k 2 recovery time (notes 2,12) t rec overdrive speed, directly prior to reset pulse; r pup = 2.2k 5 s standard speed 0.5 5.0 rising-edge hold-off time (notes 5, 13) t reh overdrive speed not applicable (0) s standard speed 65 time slot duration (notes 2, 14) t slot overdrive speed 8 s io pin: 1-wire reset, presence-detect cycle standard speed 480 640 reset low time (note 2) t rstl overdrive speed 48 80 s standard speed 15 60 presence-detect high time t pdh overdrive speed 2 6 s standard speed 60 240 presence-detect low time t pdl overdrive speed 8 24 s standard speed 60 75 presence-detect sample time (notes 2, 15) t msp overdrive speed 6 10 s ds2431 2 maxim integrated 2 1 3 5? 2 . x j s f ! f f q s p n electrical characteristics (continued) (t a = -40c to +85c.) (note 1) parameter symbol conditions min typ max units io pin: 1-wire write standard speed 60 120 overdrive speed, v pup > 4.5v 5 15.5 write-zero low time (notes 2, 16, 17) t w0l overdrive speed 6 15.5 s standard speed 1 15 write-one low time (notes 2, 17) t w1l overdrive speed 1 2 s io pin: 1-wire read standard speed 5 15 - read low time (notes 2, 18) t rl overdrive speed 1 2 - s standard speed t rl + 15 read sample time (notes 2, 18) t msr overdrive speed t rl + 2 s eeprom programming current i prog (notes 5, 19) 0.8 ma programming time t prog (notes 20, 21) 10 ms at +25c 200k write/erase cycles (endurance) (notes 22, 23) n cy at +85c (worst case) 50k data retention (notes 24, 25, 26) t dr at +85c (worst case) 40 years note 1: specifications at t a = -40c are guaranteed by design only and not production tested. note 2: system requirement. note 3: maximum allowable pullup resistance is a function of the number of 1-wire devices in the system and 1-wire recovery times. the specified value here applies to systems with only one device and with the minimum 1-wire recovery times. for more heavily loaded systems, an active pullup such as that found in the ds2482-x00, ds2480b, or ds2490 may be required. note 4: maximum value represents the internal parasite capacitance when v pup is first applied. if a 2.2k resistor is used to pull up the data line, 2.5s after v pup has been applied, the parasite capacitance does not affect normal communications. note 5: guaranteed by design, characterization, and/or simulation only. not production tested. note 6: v tl , v th , and v hy are a function of the internal supply voltage, which is a function of v pup , r pup , 1-wire timing, and capacitive loading on io. lower v pup , higher r pup , shorter t rec , and heavier capacitive loading all lead to lower values of v tl , v th , and v hy . note 7: voltage below which, during a falling edge on io, a logic 0 is detected. note 8: the voltage on io must be less than or equal to v ilmax at all times the master is driving io to a logic 0 level. note 9: voltage above which, during a rising edge on io, a logic 1 is detected. note 10: after v th is crossed during a rising edge on io, the voltage on io must drop by at least v hy to be detected as logic 0. note 11: the i-v characteristic is linear for voltages less than 1v. note 12: applies to a single device attached to a 1-wire line. note 13: the earliest recognition of a negative edge is possible at t reh after v th has been reached on the preceding rising edge. note 14: defines maximum possible bit rate. equal to t w0lmin + t recmin . note 15: interval after t rstl during which a bus master is guaranteed to sample a logic 0 on io if there is a ds2431 present. minimum limit is t pdhmax ; maximum limit is t pdhmin + t pdlmin . note 16: numbers in bold are not in compliance with legacy 1-wire product standards. see the comparison table. note 17: in figure 11 represents the time required for the pullup circuitry to pull the voltage on io up from v il to v th . the actual maximum duration for the master to pull the line low is t w1lmax + t f - and t w0lmax + t f - , respectively. note 18: in figure 11 represents the time required for the pullup circuitry to pull the voltage on io up from v il to the input-high threshold of the bus master. the actual maximum duration for the master to pull the line low is t rlmax + t f . ds2431 3 maxim integrated 3 note 19: current drawn from io during the eeprom programming interval. the pullup circuit on io during the programming interval should be such that the voltage at io is greater than or equal to v pupmin . if v pup in the system is close to v pupmin , a low- impedance bypass of r pup , which can be activated during programming, may need to be added. note 20: interval begins t rehmax after the trailing rising edge on io for the last time slot of the e/s byte for a valid copy scratchpad sequence. interval ends once the devices self-timed eeprom programming cycle is complete and the current drawn by the device has returned from i prog to i l . note 21: t prog for units branded version a1 is 12.5ms. t prog for units branded version a2 and later is 10ms. note 22: write-cycle endurance is degraded as t a increases. note 23: not 100% production tested; guaranteed by reliability monitor sampling. note 24: data retention is degraded as t a increases. note 25: guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to the data sheet limit at operating temperature range is established by reliability testing. note 26: eeprom writes can become nonfunctional after the data-retention time is exceeded. long-term storage at elevated tem- peratures is not recommended; the device can lose its write capability after 10 years at +125c or 40 years at +85c. m- legacy values ds2431 values standard speed (s) overdrive speed (s) standard speed (s) overdrive speed (s) parameter min max min max min max min max t slot (including t rec ) 61 (undefined) 7 (undefined) 65* (undefined) 8* (undefined) t rstl 480 (undefined) 48 80 480 640 48 80 t pdh 15 60 2 6 15 60 2 6 t pdl 60 240 8 24 60 240 8 24 t w0l 60 120 6 16 60 120 6 15.5 2 1 3 5? 2 . x j s f ! f f q s p n * ?@?r|? ??? ? ?? 2 . x j s f? ??| a ?. ??0k?y o ];| 2 . x j s f?- ? ds2431 4 maxim integrated t s oc to-92 t dfn-ep s fn uc s pr 3, 4, 5, 6 3 1, 4, 5, 6 a2, a3, c2, c3 n.c. 2 2 2 1 c1 io 1 1 3 2 a1 gnd ep ep 2 1 3 5? 2 . x j s f ! f f q s p n ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` .? e t 3 5 4 2]`t : 2 1 3 5?| f f q s p n 9 ?@ 0<? ) ?"?- 0v 8 ? *2 ] ? 2 . x j s f{> ? e t 3 5 4 2r? ? 0?| 7 5? s p n? i2 ?zt-?vk??m 2 . x j s fogrr?? k?# [ ) ??# e t 3 5 4 2? a?@| ?@l?6@ t@v?k?+ |@k?e?v?@@--z ?k ?3 -e? ? d p q z t d s b u d i q b e ? sk??u" ?@]? e t 3 5 4 2|?obtj|h 0 q d c$0 ? eek?@tj j f f f ! q 2 5 6 2 / 5? ?| y eel] ? ^2 t ?$0 [ rb i ? d d 2?,| 1vd? ? e t 3 5 4 2<]?@] j| e t 3 5 4 2tj? k?]h? 7 5? 0 s p n 7 5?@? 4 3 ? f f q s p n2 |