avalanche rugged technology rugged gate oxide technology lower input capacitance improved gate charge extended safe operating area 175 operating temperature lower leakage current : 10 a (max.) @ v ds = 100v lower r ds(on) : 0.018 (typ.) advanced power mosfet thermal resistance junction-to-case junction-to-ambient r jc r ja /w characteristic max. units symbol typ. features absolute maximum ratings drain-to-source voltage continuous drain current (t c =25 ) continuous drain current (t c =100 ) drain current-pulsed gate-to-source voltage single pulsed avalanche energy avalanche current repetitive avalanche energy peak diode recovery dv/dt total power dissipation (t c =25 ) linear derating factor operating junction and storage temperature range maximum lead temp. for soldering purposes, 1/8 ? from case for 5-seconds characteristic value units symbol i dm v gs e as i ar e ar dv/dt i d p d t j , t stg t l a v mj a mj v/ns w w/ a v dss v to-3pf 1.gate 2. drain 3. source 3 2 1 m w o 1 o 2 o 3 o c o c o 1 o 1 o c o c o c o c q q o c SSF70N10A bv dss = 100 v r ds(on) = 0.023 i d = 44 a 12 6.5 100 44 31.1 280 1291 44 12 6.5 120 0.8 - 55 to +175 300 -- 1.25 40 -- -- w 0 2 0 + _ ?1999 fairchild semiconductor corporation rev. b
n-channel power mosfet electrical characteristics (t c =25 unless otherwise specified) drain-source breakdown voltage breakdown voltage temp. coeff. gate threshold voltage gate-source leakage , forward gate-source leakage , reverse characteristic symbol max. units typ. min. test condition static drain-source on-state resistance forward transconductance input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time total gate charge gate-source charge gate-drain( ? miller ? ) charge g fs c iss c oss c rss t d(on) t r t d(off) t f q g q gs q gd bv dss bv/ t j v gs(th) r ds(on) i gss i dss v v/ v na a pf ns nc -- -- -- -- -- -- -- -- -- -- -- -- -- v gs =0v,i d =250 a i d =250 a see fig 7 v ds =5v,i d =250 a v gs =20v v gs =-20v v ds =100v v ds =80v,t c =150 v gs =10v,i d =22a v ds =40v,i d =22a v dd =50v,i d =70a, r g =5.3 see fig 13 v ds =80v,v gs =10v, i d =70a see fig 6 & fig 12 drain-to-source leakage current v gs =0v,v ds =25v,f =1mhz see fig 5 characteristic -- source-drain diode ratings and characteristics continuous source current pulsed-source current diode forward voltage reverse recovery time reverse recovery charge i s i sm v sd t rr q rr characteristic symbol max. units typ. min. test condition -- -- -- -- -- a v ns c integral reverse pn-diode in the mosfet t j =25 ,i s =44a,v gs =0v t j =25 ,i f =70a di f /dt=100a/ s d d o c w w m o 4 o 5 o c m m o c o 4 o 4 o 4 o 4 o 1 w o c m o c o 5 o 4 m m SSF70N10A 100 -- 2.0 -- -- -- -- -- 0.12 -- -- -- -- -- 850 375 22 24 112 84 151 31 66 -- -- 4.0 100 -100 10 100 0.023 -- 4870 980 430 60 60 240 180 195 -- -- 47.38 3750 -- -- -- 143 0.72 44 280 1.6 -- -- notes ; repetitive rating : pulse width limited by maximum junction temperature l=1mh, i as =44a, v dd =25v, r g =27 , starting t j =25 i sd 70a, di/dt 53 0a/ s, v dd bv dss , starting t j =25 pulse test : pulse width = 250 s, duty cycle 2% essentially independent of operating temperature < _ < _ < _ < _ o 1 o 2 o 3 o 4 o 5 w o c o c m m
n-channel power mosfet fig 1. output characteristics fig 2. transfer characteristics fig 6. gate charge vs. gate-source voltage fig 5. capacitance vs. drain-source voltage fig 4. source-drain diode forward voltage fig 3. on-resistance vs. drain current SSF70N10A 10 -1 10 0 10 1 10 0 10 1 10 2 @ notes : 1. 250 m s pulse test 2. t c = 25 o c v gs top : 1 5 v 1 0 v 8.0 v 7.0 v 6.0 v 5.5 v 5.0 v bottom : 4.5 v i d , drain current [a] v ds , drain-source voltage [v] 2 4 6 8 10 10 0 10 1 10 2 25 o c 175 o c - 55 o c @ notes : 1. v gs = 0 v 2. v ds = 40 v 3. 250 m s pulse test i d , drain current [a] v gs , gate-source voltage [v] 0 50 100 150 200 250 300 0.00 0.01 0.02 0.03 @ note : t j = 25 o c v gs = 20 v v gs = 10 v r ds(on) , [ w ] drain-source on-resistance i d , drain current [a] 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 10 0 10 1 10 2 175 o c 25 o c @ notes : 1. v gs = 0 v 2. 250 m s pulse test i dr , reverse drain current [a] v sd , source-drain voltage [v] 10 0 10 1 0 2000 4000 6000 8000 c iss = c gs + c gd ( c ds = shorted ) c oss = c ds + c gd c rss = c gd @ notes : 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitance [pf] v ds , drain-source voltage [v] 0 20 40 60 80 100 120 140 160 0 5 10 v ds = 80 v v ds = 50 v v ds = 20 v @ notes : i d =70.0 a v gs , gate-source voltage [v] q g , total gate charge [nc]
n-channel power mosfet fig 7. breakdown voltage vs. temperature fig 8. on-resistance vs. temperature fig 11. thermal response fig 10. max. drain current vs. case temperature fig 9. max. safe operating area p dm t 1 t 2 SSF70N10A -75 -50 -25 0 25 50 75 100 125 150 175 200 0.8 0.9 1.0 1.1 1.2 @ notes : 1. v gs = 0 v 2. i d = 250 m a bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] -75 -50 -25 0 25 50 75 100 125 150 175 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 @ notes : 1. v gs = 10 v 2. i d = 35.0 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 single pulse 0.2 0.1 0.01 0.02 0.05 d=0.5 @ notes : 1. z q jc (t)=1.25 o c/w max. 2. duty factor, d=t 1 /t 2 3. t jm -t c =p dm *z q jc (t) z q jc (t) , thermal response t 1 , square wave pulse duration [sec] 25 50 75 100 125 150 175 0 10 20 30 40 50 i d , drain current [a] t c , case temperature [ o c] 10 0 10 1 10 2 10 -1 10 0 10 1 10 2 10 3 10 m s dc 100 m s 1 ms 10 ms @ notes : 1. t c = 25 o c 2. t j = 175 o c 3. single pulse operation in this area is limited by r ds(on) i d , drain current [a] v ds , drain-source voltage [v]
n-channel power mosfet fig 12. gate charge test circuit & waveform fig 13. resistive switching test circuit & waveforms fig 14. unclamped inductive switching test circuit & waveforms e as = l l i as 2 ---- 2 1 -------------------- bv dss -- v dd bv dss v in v out 10% 90% t d(on) t r t on t off t d(off) t f charge v gs 10v q g q gs q gd vary t p to obtain required peak i d 10v v dd c l l v ds i d r g t p dut bv dss t p v dd i as v ds (t) i d (t) time v dd ( 0.5 rated v ds ) 10v v out v in r l dut r g 3ma v gs current sampling (i g ) resistor current sampling (i d ) resistor dut v ds 300nf 50k 200nf 12v same type as dut ? current regulator ? r 1 r 2 w SSF70N10A
n-channel power mosfet fig 15. peak diode recovery dv/dt test circuit & waveforms dut v ds + -- l i s driver v gs r g same type as dut v gs ? dv/dt controlled by ?r g ? ? i s controlled by duty factor ?d? v dd 10v v gs ( driver ) i s ( dut ) v ds ( dut ) v dd body diode forward voltage drop v f i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- SSF70N10A
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