1/7 preliminary data november 2004 this is preliminary information on a new product foreseen to be developed. details are subject to change without notice STL8NH3LL n-channel 30 v - 0.012 ? - 8 a powerflat? ultra low gate charge stripfet? mosfet table 1: general features typical r ds (on) = 0.012 ? @ 10v improved die-to-footprint ratio very low profile package (1mm max) very low thermal resistance very low gate charge low threshold device description this application specific mosfet is the lastest generation of stmicroelectronics unique ?stripfet?? technology. the resulting transistor is optimized for low on-resistance and minimal gate charge. the chip-scaled powerflat? pack- age allows a significant board space saving, still boosting the performance. applications control fet in buck converter table 2: order codes figure 1: package figure 2: internal schematic diagram type v dss r ds(on) i d (2) STL8NH3LL 30 v < 0.015 ? 8 a powerflat?(3.3x3.3) (chip scale package) top view part number marking package packaging STL8NH3LL l8nh3ll powerflat? (3.3x3.3) tape & reel rev 4
STL8NH3LL 2/7 table 3: absolute maximum ratings table 4: thermal data electrical characteristics (t case =25c unless otherwise specified) table 5: on /off table 6: dynamic symbol parameter value unit v ds drain-source voltage (v gs = 0) 30 v v dgr drain-gate voltage (r gs = 20 k ? ) 30 v v gs gate- source voltage 16 v i d (1) drain current (continuous) at t c = 25c (steady state) 8a i d (2) drain current (continuous) at t c = 100c (steady state) 5a i dm (3) drain current (pulsed) 32 a p tot (1) total dissipation at t c = 25c 50 w p tot (2) total dissipation at t c = 25c (steady state) 1.56 w derating factor (2) 0.4 w/c t stg storage temperature ? 55 to 150 c t j max. operating junction temperature rthj-case thermal resistance junction-case max 2.5 c/w rthj-a (4) thermal operating junction-ambient 80 c/w symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 30 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating, t c = 125c 1 10 a a i gss gate-body leakage current (v ds = 0) v gs = 16 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 1 2.5 v r ds(on static drain-source on resistance v gs = 10 v, i d = 4 a v gs = 4.5 v, i d = 4 a 0.012 0.0135 0.015 0.017 ? ? symbol parameter test conditions min. typ. max. unit g fs (5) forward transconductance v ds = 15v, i d = 4a tbd s c iss input capacitance v ds = 25v, f= 1 mhz, v gs = 0 965 pf c oss output capacitance 285 pf c rss reverse transfer capacitance 38 pf
3/7 STL8NH3LL electrical characteristics (continued) table 7: switching on table 8: switching table 9: source drain diode (1) the value is rated according r thj-c (2) the value is rated according r thj-a (3) pulse width limited by safe operating area. (4) when mounted on minimum footprint (5) pulsed: pulse duration = 300 s, duty cycle 1.5 % symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 15 v, i d = 4 a r g =4.7 ?, v gs = 4.5v (see figure 3) 15 ns t r rise time 32 ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 15v, i d = 8 a, v gs = 4.5 v (see figure 5) 9 3.7 3 12 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off-delay time fall time v dd = 15 v, i d = 4 a, r g =4.7 ?, v gs = 4.5 v (see figure 3) 18 8.5 ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm (3) source-drain current source-drain current (pulsed) 8 32 a a v sd (5) forward on voltage i sd = 8 a, v gs = 0 1.3 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 8 a, di/dt = 100 a/s v dd = 20v, t j = 150c (see figure 4) 24 17.4 1.45 ns nc a
STL8NH3LL 4/7 figure 3: switching times test circuit for re- sistive load figure 4: test circuit for diode recovery times figure 5: gate charge test circuit
5/7 STL8NH3LL dim. mm. inch min. typ max. min. typ. max. a 0.80 0.90 1.00 0.031 0.035 0.039 a1 0.02 0.05 0.0007 0.0019 a3 0.20 0.007 b 0.23 0.30 0.38 0.009 0.011 0.015 c 0.328 0.012 c1 0.12 0.004 d 3.30 0.13 d2 2.50 2.65 2.75 0.098 0.104 0.108 e 3.30 0.13 e2 1.25 1.40 1.50 0.049 0.055 0.059 f 1.325 0.052 f1 0.975 0.038 e 0.65 0.025 l 0.30 0.50 0.011 0.019 powerflat ? (3.3x3.3) mechanical data
STL8NH3LL 6/7 table 10: revision history date revision description of changes 21-july-2004 1 first release. 05-oct-2004 2 values changed 19-oct-2004 3 new value inserted 22-nov-2004 4 document updated
7/7 STL8NH3LL information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america
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