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ltc1799 1 1799fc typical a pplica t ion fea t ures descrip t ion 1khz to 33mhz resistor set sot-23 oscillator the ltc ? 1799 is a precision oscillator that is easy to use and occupies very little pc board space. the oscillator frequency is programmed by a single external resistor (r set ). the ltc1799 has been designed for high accuracy operation (1.5% frequency error) without the need for external trim components. the ltc1799 operates with a single 2.7v to 5.5v power supply and provides a rail-to-rail, 50% duty cycle square wave output. the cmos output driver ensures fast rise/ fall times and rail-to-rail switching. the frequency-setting resistor can vary from 3k to 1m to select a master oscil - lator frequency between 100khz and 33mhz (5v supply). the three-state div input determines whether the master clock is divided by 1, 10 or 100 before driving the out- put, providing three frequency ranges spanning 1khz to 33mhz (5v supply). the ltc1799 features a proprietary feedback loop that linearizes the relationship between r set and frequency, eliminating the need for tables to calculate frequency. the oscillator can be easily programmed using the simple formula outlined below: f osc = 10mhz ? 10k n ? r set ? ? ? ? ? ? , n = 100, 10, 1, ? ? ? ? ? div pin = v + div pin = open div pin = gnd a pplica t ions n one external resistor sets the frequency n fast start-up time: <1ms n 1khz to 33mhz frequency range n frequency error 1.5% 5khz to 20mhz (t a = 25c) n frequency error 2% 5khz to 20mhz (t a = 0c to 70c) n 40ppm/c temperature stability n 0.05%/v supply stability n 50% 1% duty cycle 1khz to 2mhz n 50% 5% duty cycle 2mhz to 20mhz n 1ma typical supply current n 100 cmos output driver n operates from a single 2.7v to 5.5v supply n low profile (1mm) sot-23 (thinsot? package) n low cost precision oscillator n charge pump driver n switching power supply clock reference n clocking switched capacitor filters n fixed crystal oscillator replacement n ceramic oscillator replacement n small footprint replacement for econ oscillators l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents including 6342817 and 6614313. basic connection typical distribution of frequency error, t a = 25c (5khz f osc 20mhz, v + = 5v) tsot-23 actual size v + 1 2 3 5 1khz f osc 33mhz 5v 5v 3k r set 1m 0.1f 1799 ta01 4 gnd ltc1799 set out div open 10 100 1 units (%) 25 20 15 10 5 0 ?1.25 ?0.75 ?0.25 0 0.25 0.75 1.25 frequency error (%) 1799 ta02
ltc1799 2 1799fc p in c on f igura t ion a bsolu t e maxi m u m r a t ings supply voltage (v + ) to gnd ......................... C0 .3v to 6v div to gnd ..................................... C 0.3v to (v + + 0.3v) set to gnd ..................................... C 0.3v to (v + + 0.3v) operating temperature range ltc1799c ................................................ 0 c to 70c ltc1799i ............................................. C 40c to 85c ltc1799h .......................................... C 40c to 125c storage temperature range .................. C 65c to 150c lead temperature (soldering, 10 sec) ................... 3 00c (note 1) top view s5 package 5-lead plastic tsot-23 1 2 3 v + gnd set 5 4 out div t jmax = 125c, ja = 256c/w o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range ltc1799cs5#pbf ltc1799cs5#trpbf ltnd 5-lead plastic tsot-23 0c to 70c ltc1799is5#pbf ltc1799is5#trpbf ltne 5-lead plastic tsot-23 C40c to 85c ltc1799hs5#pbf ltc1799hs5#trpbf ltnd 5-lead plastic tsot-23 C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ e lec t rical c harac t eris t ics symbol parameter conditions min typ max units ?f frequency accuracy (notes 2, 3) v + = 5v 5khz f 20mhz 5khz f 20mhz, ltc1799c 5khz f 20mhz, ltc1799i/h 1khz f 5khz 20mhz f 33mhz l l 0.5 2.5 2.5 1.5 2 2.5 % % % % % v + = 3v 5khz f 10mhz 5khz f 10mhz, ltc1799c 5khz f 10mhz, ltc1799i/h 1khz f 5khz 10mhz f 20mhz l l 0.5 2.5 2.5 1.5 2 2.5 % % % % % r set frequency-setting resistor range |?f| < 1.5% v + = 5v v + = 3v 5 10 200 200 k k f max maximum frequency |?f| < 2.5%, pin 4 = 0v v + = 5v v + = 3v 33 20 mhz mhz f min minimum frequency |?f| < 2.5%, pin 4 = v + 1 khz ?f/?t freq drift over temp (note 3) r set = 31.6k l 0.004 %/c ?f/?v freq drift over supply (note 3) v + = 3v to 5v, r set = 31.6k l 0.05 0.1 %/v timing jitter (note 4) pin 4 = v + pin 4 = open pin 4 = 0v 0.06 0.13 0.4 % % % long-term stability of output frequency 300 ppm/khr the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v + = 2.7v to 5.5v, r l = 5k, c l = 5pf, unless otherwise noted. all voltages are with respect to gnd.
ltc1799 3 1799fc e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: frequencies near 100khz and 1mhz may be generated using two different values of r set (see the table 1 in the applications information section). for these frequencies, the error is specified under the following assumption: 10k < r set 100k. the frequency accuracy for f osc = 20mhz is guaranteed by design and test correlation. note 3: frequency accuracy is defined as the deviation from the f osc equation. symbol parameter conditions min typ max units duty cycle (note 7) pin 4 = v + or open (div either by 100 or 10) pin 4 = 0v (div by 1), r set = 5k to 200k l l 49 45 50 50 51 55 % % v + operating supply range l 2.7 5.5 v i s power supply current r set = 200k, pin 4 = v + , r l = v + = 5v l 0.7 1.1 ma r set = 10k, pin 4 = 0v, r l = v + = 5v v + = 3v l l 2.4 2 ma ma v ih high level div input voltage l v + C 0.4 v v il low level div input voltage l 0.5 v i div div input current (note 5) pin 4 = v + pin 4 = 0v v + = 5v v + = 5v l l C8 5 C5 8 a a v oh high level output voltage (note 5) v + = 5v, ltc1799c/i i oh = C1ma i oh = C4ma l l 4.8 4.5 4.95 4.8 v v v + = 5v, ltc1799h i oh = C1ma i oh = C4ma l l 4.75 4.40 4.95 4.75 v v v + = 3v, ltc1799c/i i oh = C1ma i oh = C4ma l l 2.7 2.2 2.9 2.6 v v v + = 3v, ltc1799h i oh = C1ma i oh = C4ma l l 2.65 2.10 2.90 2.55 v v v ol low level output voltage (note 5) v + = 5v, ltc1799c/i i ol = 1ma i ol = 4ma l l 0.05 0.2 0.15 0.4 v v v + = 5v, ltc1799h i ol = 1ma i ol = 4ma l l 0.05 0.25 0.20 0.50 v v v + = 3v, ltc1799c/i i ol = 1ma i ol = 4ma l l 0.1 0.4 0.3 0.7 v v v + = 3v, ltc1799h i ol = 1ma i ol = 4ma l l 0.10 0.45 0.35 0.80 v v t r out rise time (note 6) v + = 5v pin 4 = v + or floating, rl = pin 4 = 0v, rl = 14 7 ns ns v + = 3v pin 4 = v + or floating, rl = pin 4 = 0v, rl = 19 11 ns ns t f out fall time (note 6) v + = 5v pin 4 = v + or floating, rl = pin 4 = 0v, rl = 13 6 ns ns v + = 3v pin 4 = v + or floating, rl = pin 4 = 0v, rl = 19 10 ns ns the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v + = 2.7v to 5.5v, r l = 5k, c l = 5pf, unless otherwise noted. all voltages are with respect to gnd. note 4: jitter is the ratio of the peak-to-peak distribution of the period to the mean of the period. this specification is based on characterization and is not 100% tested. note 5: to conform with the logic ic standard convention, current out of a pin is arbitrarily given as a negative value. note 6: output rise and fall times are measured between the 10% and 90% power supply levels. these specifications are based on characterization. note 7: guaranteed by 5v test.
ltc1799 4 1799fc typical p er f or m ance c harac t eris t ics peak-to-peak jitter vs frequency supply current vs output frequency output resistance vs supply voltage ltc1799 output operating at 20mhz, v s = 5v ltc1799 output operating at 10mhz, v s = 3v frequency variation vs r set frequency variation over temperature 4 3 2 1 0 ?1 ?2 ?3 ?4 1 10 100 1000 1799 g01 r set (k) variation (%) t a = 25c guaranteed limits apply over 5k to 200k range typical high typical low temperature (c) ?40 variation (%) 0.50 0.25 0.75 1.00 20 60 1799 g02 0 ?0.50 ?0.25 ?20 0 40 80 ?0.75 ?1.00 r set = 31.6k 1 or 10 or 100 typical high typical low output frequency, f out (hz) 0.2 jitter (%) 0.4 0.7 0.1 0.3 0.5 0.6 1k 100k 1m 10m 100m 1799 g03 0 10k 100 10 1 output frequency, f out (hz) 1.0 supply current (ma) 1.5 2.5 3.0 4.0 4.5 1k 100k 1m 100m 1799 g04 0.5 10k 10m 3.5 2.0 0 100 (5v) 10 (5v) 1 (5v) 1 (3v) 10 (3v) 100 (3v) t a = 25c c l = 5pf r l = 1m supply voltage (v) 2.5 3.0 40 output resistance () 80 140 3.5 4.5 5.0 1799 g05 60 120 100 4.0 5.5 6.0 output sinking current output sourcing current t a = 25c 12.5ns/div 1v/div 1799 g06 v + = 5v, r set = 5k, c l = 10pf 25ns/div 1v/div 1799 g07 v + = 3v, r set = 10k, c l = 10pf
ltc1799 5 1799fc p in func t ions v + (pin 1): voltage supply (2.7v v + 5.5v). this sup- ply must be kept free from noise and ripple. it should be bypassed directly to a ground plane with a 0.1f capacitor. gnd (pin 2): ground. should be tied to a ground plane for best performance. set (pin 3): frequency-setting resistor input. the value of the resistor connected between this pin and v + deter - mines the oscillator frequency. the voltage on this pin is held by the ltc1799 to approximately 1.13v below the v + voltage. for best performance, use a precision metal film resistor with a value between 10k and 200k and limit the capacitance on this pin to less than 10pf. div (pin 4): divider-setting input. this three-state input selects among three divider settings, determining the value of n in the frequency equation. pin 4 should be tied to gnd for the 1 setting, the highest frequency range. floating pin 4 divides the master oscillator by 10. pin 4 should be tied to v + for the 100 setting, the lowest fre- quency range. to detect a floating div pin, the ltc1799 attempts to pull the pin toward midsupply. this is realized with two internal current sources, one tied to v + and pin 4 and the other one tied to ground and pin 4. therefore, driving the div pin high requires sourcing approximately 5a. likewise, driving div low requires sinking 5a. when pin 4 is floated, preferably it should be bypassed by a 1nf capacitor to ground or it should be surrounded by a ground shield to prevent excessive coupling from other pcb traces. out (pin 5): oscillator output. this pin can drive 5k and/or 10pf loads. larger loads may cause inaccuracies due to supply bounce at high frequencies. transients will not cause latchup if the current into/out of the out pin is limited to 50ma. b lock diagra m ? + + ? 1 3 gain = 1 v + v bias i res i res r set set gnd master oscillator programmable divider (1, 10 or 100) v res = 1.13v 25% (v + ? v set ) i res (v + ? v set ) ? mo = 100mhz ? k ? three-state input detect gnd v + 5a 1799 bd 5a out divider select 5 div 4 2
ltc1799 6 1799fc theory o f o pera t ion as shown in the block diagram, the ltc1799s master oscillator is controlled by the ratio of the voltage between the v + and set pins and the current entering the set pin (i res ). the voltage on the set pin is forced to approximately 1.13v below v + by the pmos transistor and its gate bias voltage. this voltage is accurate to 7% at a particular input current and supply voltage (see figure 1). the ef- fective input resistance is approximately 2k. a resistor r set , connected between the v + and set pins, locks together the voltage (v + C v set ) and current, i res , variation. this provides the ltc1799s high precision. the master oscillation frequency reduces to: ? mo = 10mhz ? 10k r set ? ? ? ? ? ? the ltc1799 is optimized for use with resistors between 10k and 200k, corresponding to master oscillator frequen- cies between 0.5mhz and 10mhz. accurate frequencies up to 20mhz (r set = 5k) are attainable if the supply voltage is greater than 4v. to extend the output frequency range, the master oscillator signal may be divided by 1, 10 or 100 before driving out figure 2. r set vs desired output frequency (pin 5). the divide-by value is determined by the state of the div input (pin 4). tie div to gnd or drive it below 0.5v to select 1. this is the highest frequency range, with the master output frequency passed directly to out. the div pin may be floated or driven to midsupply to select 10, the intermediate frequency range. the lowest frequency range, 100, is selected by tying div to v + or driving it to within 0.4v of v + . figure 2 shows the relationship between r set , divider setting and output frequency, including the overlapping frequency ranges near 100khz and 1mhz. the cmos output driver has an on resistance that is typi- cally less than 100. in the 1 (high frequency) mode, the rise and fall times are typically 7ns with a 5v supply and 11ns with a 3v supply. these times maintain a clean square wave at 10mhz (20mhz at 5v supply). in the 10 and 100 modes, where the output frequency is much lower, slew rate control circuitry in the output driver increases the rise/fall times to typically 14ns for a 5v supply and 19ns for a 3v supply. the reduced slew rate lowers emi (electromagnetic interference) and supply bounce. figure 1. v + C v set variation with i res i res (a) 1 0.8 v res = v + ? v set 1.2 1.3 1.4 10 100 1000 1799 f01 1.1 1.0 0.9 v + = 5v v + = 3v t a = 25c desired output frequency (hz) 10 r set (k) 100 1k 100k 1m 10m 1799 f02 1 10k 1000 100m 100 10 1 most accurate operation
ltc1799 7 1799fc a pplica t ions i n f or m a t ion figure 3. current controlled oscillator figure 4. voltage controlled oscillator a lternative m ethods of s etting the o utput f re q uency of the l tc1799 the oscillator may be programmed by any method that sources a current into the set pin (pin 3). the circuit in figure 3 sets the oscillator frequency using a program- mable current source and in the expression for f osc , the resistor r set is replaced by the ratio of 1.13v/i control . as already explained in the theory of operation, the voltage difference between v + and set is approximately 1.13v, therefore, the figure 3 circuit is less accurate than if a resistor controls the oscillator frequency. figure 4 shows the ltc1799 configured as a vco. a voltage source is connected in series with an external 10k resis - tor. the output frequency, f osc , will vary with v control , that is the voltage source connected between v + and the set pin. again, this circuit decouples the relationship between the input current and the voltage between v + and set; the frequency accuracy will be degraded. the oscillator frequency, however, will monotonically increase with decreasing v control . s electing the d ivider s et ting and r esistor the ltc1799 s master oscillator has a frequency range spanning 0.1mhz to 33mhz. however, accuracy may suffer if the master oscillator is operated at greater than 10mhz with a supply voltage lower than 4v. a programmable divider extends the frequency range to greater than three decades. table 1 describes the recommended frequencies for each divider setting. note that the ranges overlap; at some frequencies there are two divider/resistor combina- tions that result in the desired frequency. in general, any given oscillator frequency (f osc ) should be obtained using the lowest master oscillator frequency. lower master oscillator frequencies use less power and are more accurate. for instance, f osc = 100khz can be obtained by either r set = 10k, n = 100, master oscilla- tor = 10mhz or r set = 100k, n = 10, master oscillator = 1mhz. the r set = 100k is preferred for lower power and better accuracy. table 1. frequency range vs divider setting divider setting fre q uency range 1 ? div (pin 4) = gnd >500khz* 10 ? div (pin 4) = floating 50khz to 1mhz 100 ? div (pin 4) = v + <100khz *at master oscillator frequencies greater than 10mhz (r set < 10k), the ltc1799 may suffer reduced accuracy with a supply voltage less than 4v. after choosing the proper divider setting, determine the correct frequency-setting resistor. because of the linear correspondence between oscillation period and resistance, a simple equation relates resistance with frequency. r set = 10k ? 10mhz n ? f osc ? ? ? ? ? ? , n = 100 10 1 ? ? ? ? ? (r setmin = 3k (5v supply), 5k (3v supply), r setmax = 1m) any resistor, r set , tolerance adds to the inaccuracy of the oscillator, f osc . v + 1 2 3 5 400khz to 21mhz (approximate, see text) v + 0.1f i control 5a to 200a 1799 f03 4 gnd n = 1 ltc1799 set out div 10mhz n ? osc ? ? ? i control i control expressed in (a) 10k 1.13v v + 1 2 3 5 v + 0.1f r set 10k v control 0v to 1.13v 1799 f04 4 gnd n = 1 ltc1799 set out div + ? 10mhz n ? osc ? ? ? 1 ? v control 1.13v 10k r set ( )
ltc1799 8 1799fc a pplica t ions i n f or m a t ion figure 5. supply sensitivity p o w er s upply r ejection low frequency supply rejection (voltage coefficient) figure 5 shows the output frequency sensitivity to power supply voltage at several different temperatures. the l tc1799 has a conservative guaranteed voltage coeffi - cient of 0.1%/v but, as figure 5 shows, the typical supply sensitivity is lower. s t art -u p t ime the start-up time and settling time to within 1% of the final value can be estimated by t start ? r set (2.8s/k) + 20s. note the start-up time depends on r set and it is independent from the setting of the divider pin. for instance with r set = 50k, the ltc1799 will settle with 1% of its 200khz final value (n = 10) in approximately 160s. figure 6 shows start-up times for various r set resistors. figure 7 shows an application where a second set resistor r set2 is connected in parallel with set resistor r set1 via switch s1. when switch s1 is open, the output frequency of the ltc1799 depends on the value of the resistor r set1 . when switch s1 is closed, the output frequency of the ltc1799 depends on the value of the parallel combination of r set1 and r set2 . the start-up time and settling time of the ltc1799 with switch s1 open (or closed) is described by t start shown above. once the ltc1799 starts and settles, and switch s1 closes (or opens), the ltc1799 will settle to its new output frequency within approximately 25s. figure 6. start-up time figure 7 high frequency power supply rejection the accuracy of the ltc1799 may be affected when its power supply generates significant noise with frequency contents in the vicinity of the programmed value of f osc . if a switching power supply is used to power up the ltc1799, and if the ripple of the power supply is more than a few tens of millivolts, make sure the switching frequency and its harmonics are not related to the output frequency of the ltc1799. otherwise, the oscillator may show an ad - ditional 0.1% to 0.2% of frequency error. if the ltc1799 is powered by a switching regulator and the switching frequency or its harmonics coincide with the output frequency of the ltc1799, the jitter of the oscillator output may be affected. this phenomenon will become noticeable if the switching regulator exhibits ripples beyond 30mv. supply voltage (v) 2.5 ?0.05 frequency deviation (%) 0 0.05 0.10 0.15 3.0 3.5 4.0 4.5 1799 f05 5.0 5.5 85c ?40c 25c r set = 31.6k pin 4 = floating (10) time after power applied (s) 0 60 50 40 30 20 10 0 ?10 300 500 1799 f06 100 200 400 600 frequency error (%) 10k 31.6k 200k t a = 25c v + = 5v v + 1 2 r set1 r set2 3 s1 5 v + 1799 f07 4 gnd ltc1799 3v or 5v set out div 10 100 1 f osc = 10mhz ? or ( ) 10k n ? r set1 f osc = 10mhz ? ( ) 10k n ? r set1 //r set2
ltc1799 9 1799fc a pplica t ions i n f or m a t ion jitter the typical jitter is listed in the electrical characteristics and shown in the typical performance characteristics. these specifications assume that the capacitance on set (pin 3) is limited to less than 10pf, as suggested in the pin functions description. if this requirement is not met, the jitter will increase. for more information, contact linear technology applications group. a ground referenced voltage controlled oscillator the ltc1799 output frequency can also be programmed by steering current in or out of the set pin, as conceptually shown in figure 8. this technique can degrade accuracy as the ratio of (v + C v set ) / i res is no longer uniquely dependent of the value of r set , as shown in the ltc1799 block diagram. this loss of accuracy will become notice- able when the magnitude of i prog is comparable to i res . the frequency variation of the ltc1799 is still monotonic. figure 9 shows how to implement the concept shown in figure 8 by connecting a second resistor, r in , between the set pin and a ground referenced voltage source, v in . for a given power supply voltage in figure 9, the output frequency of the ltc1799 is a function of v in , r in , r set and (v + C v set ) = v res : f osc = 10mhz n ? 10k r in r set ? 1+ v in ? v + ( ) v res ? 1 1+ r in r set ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (1) when v in = v + , the output frequency of the ltc1799 as - sumes the highest value and it is set by the parallel com- bination of r in and r set . also note, the output frequency, f osc , is independent of the value of v res = (v + C v set ) so the accuracy of f osc is within the data sheet limits. when v in is less than v + , and especially when v in ap- proaches the ground potential, the oscillator frequency, f osc , assumes its lowest value and its accuracy is affected by the change of v res = (v + C v set ). at 25c v res varies by 8%, assuming the variation of v + is 5%. the tem- perature coefficient of v res is 0.02%/c. by manipulating the algebraic relation for f osc above, a simple algorithm can be derived to set the values of external resistors r set and r in , as shown in figure 9. 1. choose the desired value of the maximum oscillator frequency, f osc(max) , occurring at maximum input voltage v in(max) v + . 2. set the desired value of the minimum oscillator fre- quency , f osc(min) , occurring at minimum input voltage v in(min) 0. 3. choose v res = 1.1 and calculate the ratio of r in /r set from the following: r in r set = v in(max) ? v + ( ) ? f osc(max) f osc(min) ? ? ? ? ? ? v in(min) ? v + ( ) v res f osc(max) ( ) f osc(min) ? 1 ? ? ? ? ? ? ? ? ? 1 (2) figure 9. implementation of concept shown in figure 8 figure 8. concept for programming via current steering v + 1 2 r set i pr 3 5 5v v + 1799 f08 4 gnd ltc1799 0.1f open set out div 10 100 1 i res v + 1 2 r set v res r in v in 3 5 5v v + 1799 f09 4 gnd ltc1799 0.1f f osc open set out div 10 100 1 + ? + ?
ltc1799 10 1799fc a pplica t ions i n f or m a t ion once r in /r set is known, calculate r set from: r set = 10mhz n ? 10k f osc(max) ? v in(max) ? v + ( ) + v res 1+ r in r set ? ? ? ? ? ? v res r in r set ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (3) maximum vco modulation bandwidth the maximum vco modulation bandwidth is 10khz; that is, the ltc1799 will respond to changes in v in at a rate up to 25khz. in lower frequency applications however, the modulation frequency may need to be limited to a lower rate to prevent an increase in output jitter. this lower limit is the master oscillator frequency divided by 20, (f osc /20). in general, for minimum output jitter the modulation fre- quency should be limited to f osc /20 or 10khz, whichever is less. for best performance at all frequencies, the value for f osc should be the master oscillator frequency (n?=?1) when v in is at the lowest level. table 2. variation of v res for various values of r in || r set r in || r set (v in = v + ) v res , v + = 3v v res , v + = 5v 10k 0.98v 1.06v 20k 1.03v 1.11v 40k 1.09v 1.17v 80k 1.13v 1.21v 160k 1.16v 1.24v v res = voltage across r set note: all of the calculations above assume v res = 1.1v, although v res 1.1v. for completeness, table 2 shows the variation of v res against various parallel combinations of r in and r set (v in = v + ). calulate first with v res 1.1v, then use table 2 to get a better approximation of v res , then recalculate the resistor values using the new value for v res .
ltc1799 11 1799fc typical a pplica t ion low power 80hz to 8khz sine w ave generator (i q < 4ma) 3v r set 1 2 16 10 7 8 9 15 3 4 5 6 11 12 13 14 clock a enable a v dd enable b reset a v ss clock b reset b q1a q2a q3a q4a q1b q2b q3b q4b 74hc4520 f osc 2 4 8 16 32 64 128 256 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 v + nc v + sa lpa bpa hpa/na inv a clk agnd v ? sb lpb bpb hpb/nb inv b ltc1067-50 3v c2 0.1f c1 0.1f c3 0.1f c4 1f r61 10k r51 5.11k r31 51.1k r21 20k r h1 249k r l1 51.1k clock-tunable lowpass filter with a stopband notch at the 3rd harmonic 3v r62 14k r52 5.11k r32 51.1k r22 20k sinewave out 1799 ta05 r11 100k v + gnd ltc1799 set out 1 2 3 5 3v 4 3v, n = 100 open, n = 10 800hz f sine 8khz, n = 10 80hz f sine 800hz, n = 100 div f osc 64 f osc 64 ( ) ? 3 f sine = ? 10mhz n 10k 64r set sw1
ltc1799 12 1799fc 1.50 ? 1.75 (note 4) 2.80 bsc 0.30 ? 0.45 typ 5 plcs (note 3) datum ?a? 0.09 ? 0.20 (note 3) s5 tsot-23 0302 rev b pin one 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 ? 0.90 1.00 max 0.01 ? 0.10 0.20 bsc 0.30 ? 0.50 ref note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref p ackage descrip t ion s5 package 5-lead plastic tsot-23 (reference ltc dwg # 05-08-1635)
ltc1799 13 1799fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number c 1/11 revised part number in maximum vco modulation bandwidth section. 10 (revision history begins at rev c)
ltc1799 14 1799fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2001 lt 0111 rev c ? printed in usa typical a pplica t ions v + 1 2 3 5 f osc = ? 10mhz 10 5v r t 100k thermistor c1 0.1f 1799 ta03 4 r t : ysi 44011 800 765-4974 gnd ltc1799 set out div 10k r t 1799 ta04 1400 1200 1000 800 600 400 200 0 ?20 ?10 0 10 20 30 40 50 60 70 80 90 temperature (c) frequency (khz) max typ min v + 1 2 3 5 r1 10k on/shdn 5v 74ac04 c1 0.1f 1799 ta08 4 out gnd ltc1799 set out div shutting down the ltc1799 temperature-to-frequency converter output frequency vs temperature

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