symbol v ds v gs i dm t j , t stg symbol ty p max 24 40 54 75 r jl 21 30 junction and storage temperature range a p d c 3.1 2 -55 to 150 t a =70c i d -6.5 -5 -20 pulsed drain current b power dissipation a t a =25c continuous drain current a maximum units parameter t a =25c t a =70c absolute maximum ratings t a =25c unless otherwise noted v v 20 gate-source voltage drain-source voltage -40 c/w maximum junction-to-ambient a steady-state c/w w maximum junction-to-lead c steady-state c/w thermal characteristics parameter units maximum junction-to-ambient a t 10s r ja aO4443 p-channel enhancement mode field effect transistor features v ds (v) = -40v i d = -6.5 a (v gs = -10v) r ds(on) < 42m ? (v gs = -10v) r ds(on) < 63m ? (v gs = -4.5v) general description the aO4443 uses advanced trench technology to provide excellent r ds(on) , and ultra-low low gate charge. this device is suitable for use as a load switch or in pwm applications. standard product a O4443 is pb-free (meets rohs & sony 259 specifications). aO4443l is a green product ordering option. aO4443 and aO4443l are electrically identical. soic-8 top view g d s g s s s d d d d alpha & omega semiconductor, ltd.
aO4443 symbol min typ max units bv dss -40 v -1 t j =55c -5 i gss 100 na v gs(th) -1 -1.9 -3 v i d(on) -20 a 33.3 42 t j =125c 54 68 48 63 m ? g fs 14 s v sd -0.75 -1 v i s -6 a c iss 657 pf c oss 143 pf c rss 63 pf r g 6.5 ? q g (10v) 14.2 nc q g (4.5v) 7.1 nc q gs 2.2 nc q gd 4.1 nc t d(on) 7.7 ns t r 8ns t d(off) 26.5 ns t f 11.5 ns t rr 21.9 ns q rr 14.9 nc this product has been designed and qualified for the consumer market. applications or uses as critical components in life support devices or systems are not authorized. aos does not assume any liability arising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery time i f =-6a, di/dt=100a/ s body diode reverse recovery charge i f =-6a, di/dt=100a/ s turn-on delaytime v gs =-10v, v ds =-20v, r l =3.7 ? , r gen =3 ? turn-on rise time turn-off delaytime turn-off fall time total gate charge (4.5v) gate source charge gate drain charge switching parameters total gate charge (10v) v gs =-10v, v ds =-20v, i d =-6a reverse transfer capacitance gate resistance dynamic parameters input capacitance v gs =0v, v ds =-20v, f=1mhz v gs =0v, v ds =0v, f=1mhz diode forward voltage i s =-1a,v gs =0v maximum body-diode continuous current output capacitance v ds =-5v, i d =-6a r ds(on) static drain-source on-resistance forward transconductance v gs =-10v, i d =-6a m ? v gs =-4.5v, i d =-5a gate threshold voltage v ds =v gs i d =-250 a on state drain current v gs =-10v, v ds =-5v a gate-body leakage current v ds =0v, v gs =20v drain-source breakdown voltage i d =-250 a, v gs =0v i dss zero gate voltage drain current v ds =-32v, v gs =0v p-channel electrical characteristics (t j =25c unless otherwise noted) parameter conditions static parameters a: the value of r ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. the value in any a given application depends on the user's specific board design. the current rating is based on the t 10s thermal resistance rating. b: repetitive rating, pulse width limited by junction temperature. c. the r ja is the sum of the thermal impedence from junction to lead r jl and lead to ambient. d. the static characteristics in figures 1 to 6,12,14 are obtained using 80 s pulses, duty cycle 0.5% max. e. these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. the soa curve provides a single pulse rating. a: the value of r ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. the value in any given application depends on the user's specific board design. the current rating is based on the t 10s thermal resistance rating. b: repetitive rating, pulse width limited by junction temperature. c. the r ja is the sum of the thermal impedence from junction to lead r jl and lead to ambient. d. the static characteristics in figures 1 to 6,12,14 are obtained using 80 s pulses, duty cycle 0.5% max. e. these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. the soa curve provides a single pulse rating. rev 1 : aug 2005 alpha & omega semiconductor, ltd.
aO4443 typical electrical and thermal characteristics: p-channel 0 5 10 15 20 25 30 012345 -v ds (volts) fig 1: on-region characteristics -i d (a) v gs =-3.0v -3.5v -4.5v -10v -4.0v -5.0v -6.0v 0 5 10 15 20 25 1 1.5 2 2.5 3 3.5 4 4.5 5 -v gs (volts) figure 2: transfer characteristics -i d (a) 20 25 30 35 40 45 50 55 60 0246810 -i d (a) figure 3: on-resistance vs. drain current and gate voltage r ds(on) (m ? ) 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 -v sd (volts) figure 6: body-diode characteristics -i s (a) 25c 125c 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature normalized on-resistance v gs =-10v i d =-6a v gs =-4.5v i d =-5a 20 40 60 80 100 120 140 246810 -v gs (volts) figure 5: on-resistance vs. gate-source voltage r ds(on) (m ? ) 25c 125 c v ds =-5v v gs =-4.5v v gs =-10v i d =-6a 25 c 125c alpha & omega semiconductor, ltd.
aO4443 typical electrical and thermal characteristics: p-channel 0 2 4 6 8 10 03691215 -q g (nc) figure 7: gate-charge characteristics -v gs (volts) 0 200 400 600 800 1000 0 10203040 -v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 0 10 20 30 40 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 10: single pulse power rating junction-to- ambient (note e) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 11: normalized maximum transient thermal impedance z ja normalized transient thermal resistance c oss c rss 0.1 1.0 10.0 100.0 0.1 1 10 100 -v ds (volts) -i d (amps) figure 9: maximum forward biased safe operating area (note e) 100 s 10ms 1ms 0.1s 1s 1 0s dc r ds(on) limited t j ( max ) =150c, t a =25c v ds =-40v i d =-6a single pulse d=t on /t t j,pk =t a +p dm .z ja .r ja r ja =40c/w t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150c t a =25c 10 s alpha & omega semiconductor, ltd.
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