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  em4102 copyright ? 2002, em microelectronic-marin sa 1 www.emmicroelectronic.com read only contactless identification device description the em4102 (previously named h4102) is a cmos integrated circuit for use in electronic read only rf transponders. the circuit is powered by an external coil placed in an electromagnetic field, and gets its master clock from the same field via one of the coil terminals. by turning on and off the modulation current, the chip will send back the 64 bits of information contained in a factor programmed memory array. the programming of the chip is performed by laser fusing of polysilicon links in order to store a unique code on each chip. the em4102 has several metal options which are used to define the code type and data rate. data rates of 64, 32 and 16 periods of carrier frequency per data bit are available. data can be coded as manchester, biphase or psk. due to low power consumption of the logic core, no supply buffer capacitor is required. only an external coil is needed to obtain the chip function. a parallel resonance capacitor of 78 pf is also integrated. features  64 bit memory array laser programmable  several options of data rate and coding available  on chip resonance capacitor  on chip supply buffer capacitor  on chip voltage limiter  full wave rectifier on chip  large modulation depth due to a low impedance modulation device  operating frequency 100 - 150 khz  very small chip size convenient for implantation  very low power consumption applications  animal implantable transponder  animal ear tag  industrial transponder typical operating configuration coil1 coil2 em4102 l: typical 20.8mh for fo = 125khz fig. 1 pin assignment em4102 coil1 coil2 vdd vss coil1 coil terminal / clock input coil2 coil terminal fig. 2 em microelectronic - marin sa
em4102 copyright ? 2002, em microelectronic-marin sa 2 www.emmicroelectronic.com absolute maximum ratings parameter symbol conditions maximum dc current forced on coil1 & coil2 power supply storage temp. die form storage temp. pcb form electrostatic discharge maximum to mil-std-883c method 3015 i coil v dd t store t store v esd 30ma -0.3 to 7.5v -55 to +200c -55 to +125c 2000v stresses above these listed maximum ratings may cause permanent damages to the device. exposure beyond specified operating conditions may affect device reliability or cause malfunction. handling procedures this device has built-in protection against high static voltages or electric fields; however, anti-static precautions must be taken as for any other cmos component. unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the voltage range. unused inputs must always be tied to a defined logic voltage level. operating conditions parameter symbol min typ max units operating temp. maximum coil current ac voltage on coil supply frequency t op i coil v coil f coil -40 -10 3 100 14* +85 10 150 c ma vpp khz *) the ac voltage on coil is limited by the on chip voltage limitation circuitry. this is according to the parameter i coil in the absolute maximum ratings. system principle antenna driver oscillator demodulator filter and gain data decoder data received from transponder tranceiver transponder coil1 coil2 em4102 signal on coils transponder coil transeiver coil rf carrier data fig. 3
em4102 copyright ? 2002, em microelectronic-marin sa 3 www.emmicroelectronic.com electrical characteristics v dd = 1.5v, v ss = 0v, f c1 = 134khz square wave, t a = 25c v c1 = 1.0v with positive peak at v dd and negative peak at v dd -1v unless otherwise specified parameter symbol test conditions min. typ. max. units supply voltage rectified supply voltage coil1 - coil2 capacitance power supply capacitor v dd v ddrec c res c sup v coil1 - v coil2 = 2.8 vdc modulator switch = ?on? v coil =100mvrms f=10khz 1.5 1.5 78 2) 125 1) v v pf pf manchester and biphase versions supply current c2 pad modulator on voltage drop psk version supply current c2 pad modulator on voltage drop i dd v onc2 i ddpsk v onc2psk v dd =5.0v i vddc2 =1ma with ref. to v dd v dd =5.0v i vddc2 =100a with ref. to v dd 150 500 0.6 220 0.9 650 1.5 280 2.0 800 a mv a mv note 1) the maximum voltage is defined by forcing 10ma on coil1 - coil2 note 2) the tolerance of the resonant capacitor is 15% over the whole production. on a wafer basis, the tolerance is 2% timing characteristics v dd = 1.5v, v ss = 0v, f coil = 134khz square wave, t a = 25c v c1 = 1.0v with positive peak at v dd and negative peak at v dd -1v unless otherwise specified timings are derived from the field frequency and are specified as a number of rf periods. parameter symbol test conditions value units read bit period t rdb depending on option 64, 32, 16 rf periods timing waveforms bit n bit n+1 bit n+2 64, 32 or 16 t oc , depending on option t oc coil1 serial data out fig. 4
em4102 copyright ? 2002, em microelectronic-marin sa 4 www.emmicroelectronic.com block diagram clock extractor full wave rectifier data modulator sequencer data encoder memory array logic clock serial data out modulation control cress coil1 coil2 ac1 ac2 + - csup vdd vss fig. 5 functional description general the em4102 is supplied by means of an electromagnetic field induced on the attached coil. the ac voltage is rectified in order to provide a dc internal supply voltage. when the last bit is sent, the chip will continue with the first bit until the power goes off. full wave rectifier the ac input induced in the external coil by an incident magnetic field is rectified by a graetz bridge. the bridge will limit the internal dc voltage to avoid malfunction in strong fields. clock extractor one of the coil terminals (coil1) is used to generate the master clock for the logic function. the output of the clock extractor drives a sequencer. sequencer the sequencer provides all necessary signals to address the memory array and to encode the serial data out. three mask programmed encoding versions of logic are available. these three encoding types are manchester, biphase and psk. the bit rate for the first and the second type can be 64 or 32 periods of the field frequency. for the psk version, the bit rate is 16. the sequencer receives its clock from the coil1 clock extractor and generates every internal signal controlling the memory and the data encoder logic. data modulator the data modulator is controlled by the signal modulation control in order to induce a high current in the coil. the coil 2 transistor drives this high current. this will affect the magnetic field according to the data stored in the memory array. memory array for manchester & bi-phase encoding ics the em4102 contains 64 bits divided in five groups of information. 9 bits are used for the header, 10 row parity bits (p0-p9), 4 column parity bits (pc0-pc3), 40 data bits (d00-d93), and 1 stop bit set to logic 0. 1111111119 header bits 8 version bits or d00 d01 d02 d03 p0 customer id d10 d11 d12 d13 p1 d20 d21 d22 d23 p2 32 data bits d30 d31 d32 d33 p3 d40 d41 d42 d43 p4 d50 d51 d52 d53 p5 d60 d61 d62 d63 p6 d70 d71 d72 d73 p7 d80 d81 d82 d83 p8 d90 d91 d92 d93 p9 10 line parity pc0 pc1 pc2 pc3 s0 bits 4 column parity bits the header is composed of the 9 first bits which are all programmed to "1". due to the data and parity organisation, this sequence cannot be reproduced in the data string. the header is followed by 10 groups of 4 data bits allowing 100 billion combinations and 1 even row parity bit. then, the last group consists of 4 event column parity bits without row parity bit. s0 is a stop bit which is written to "0" bits d00 to d03 and bits d10 to d13 are customer specific identification. these 64 bits are outputted serially in order to control the modulator. when the 64 bits data string is outputted, the output sequence is repeated continuously until power goes off.
em4102 copyright ? 2002, em microelectronic-marin sa 5 www.emmicroelectronic.com memory array for psk encoding ics the psk coded ic's are programmed with odd parity for p0 and p1 and always with a logic zero. the parity bits from p2 to p9 are even. the column parity pc0 to pc3 are calculated including the version bits and are even parity bits. code description manchester there is always a transition from on to off or from off to on in the middle of bit period. at the transition from logic bit ?1? to logic bit ?0? or logic bit ?0? to logic bit ?1? the phase change. value high of data stream presented below modulator switch off, low represents switch on (see fig. 6). biphase code at the beginning of each bit, a transition will occur. a logic bit ?1? will keep its state for the whole bit duration and a logic bit ?0? will show a transition in the middle of the bit duration (see fig. 7). psk code modulation switch goes on and off alternately every period of carrier frequency. when a phase shift occurs, a logical "0" is read from the memory. if no shift phase occurs after a data rate cycle, a logical "1" is read (see fig. 8). manchester code x 1 1 1 1 1 1 1 1 1 0 1 0 1 0 0 0 1 1 0 modulation control "low" means high current binary data memory output modulator control fig. 6 biphase code 01101001 binary data memory output modulator control modulation control "low" means high current fig. 7 psk code "0" on serial out "1" on serial out modulator control coil1 serial data out modulation control "low" means high current fig. 8
em4102 copyright ? 2002, em microelectronic-marin sa 6 www.emmicroelectronic.com pad description pad name function 1 coil2 coil terminal 2 / data output 2 coil1 coil terminal 1 / clock input 3 vdd positive internal supply voltage 4 vss negative internal supply voltage 1 2 3 4 chip dimensions em4102 y x 1016 1295 248 415 110 523 661 734 717 vss, vdd pad size : 76 x 76 c1, c2 pad size : 200 x 600 all dimensions in m fig. 9
em4102 copyright ? 2002, em microelectronic-marin sa 7 www.emmicroelectronic.com ordering information die form em4102 - v ersion: customer version: a6 = manchester, 64 clocks per bit %%% = only for custom specific version a5 = manchester, 32 clocks per bit b6 = bi-phase, 64 clocks per bit bumpin g : b5 = bi-phase, 32 clocks per bit " " (blank) = no bumps c4 = psk, 16 clocks per bit e = with gold bumps die form: thickness: ww = wafer 7 = 7 mils (178um) ws = sawn wafer/frame 11 = 11 mils (280um) wt = sticky tape wp = waffle pack (note 1) %%% a 6ws 11 e this chart shows general offering; for detailed part number to order, please see the table ?standard versions? below. card form this chart shows general offering; for detailed part number to order, please see the table ?standard versions? below. em4102 - v ersion: customer version: a6 = manchester, 64 clocks per bit %%% = only for custom specific version a5 = manchester, 32 clocks per bit b6 = bi-phase, 64 clocks per bit card form: b5 = bi-phase, 32 clocks per bit cx = card wit hout magnetic strip, gloss c4 = psk, 16 clocks per bit cy = card wit hout magnetic strip, matt cm = card with magnetic strip, gloss cn = card with magnetic strip, matt %%% a 6c x remarks: ? for ordering please use table of ?standard version? table below. ? for specifications of delivery form, including gold bumps, tape and bulk, as well as possible other delivery form or packages, please contact em microelectronic-marin s.a. sales office. ? note 1: this is a non-standard package. please contact em microelectronic-marin s.a sales office for availability. standard versions: the versions below are considered standards and should be readily available. for other versions or other delivery form, please contact em microelectronic-marin s.a. please make sure to give complete part number when ordering, without spacing. part number bit coding cycle/bit card / die form delivery form for em internal use only / bumping old version ops# em4102 a6 cm manchester 64 card with magnetic strip, gloss - 001 2973 em4102 a6 cx manchester 64 card wihtout magnetic strip, gloss - 001 2972 em4102 a6 cy manchester 64 card wihtout magnetic strip, matt - 001 2971 em4102 a6 wp11e manchester 64 die in waffle pack, 11 mils with gold bumps 001 3199 em4102 a6 ws11e manchester 64 sawn wafer/frame, 11 mils with gold bumps 001 4019 em4102 a6 wt11e manchester 64 die on sticky tape, 11 mils with gold bumps 001 2881 em4102 a6 ww11e manchester 64 unsawn wafer, 11 mils with gold bumps 001 3711 em4102 xx yyy-%%% custom custom custom custom %%% product support check our web site under products/rf identification section. questions can be sent to cid@emmicroelectronic.com ? em microelectronic-marin sa, 01/02, rev. d/411 em microelectronic-marin sa cannot assume responsibility for use of any circuitry described other than circuitry entirely embodied in an em microelectronic-marin sa product. em microelectronic-marin sa reserves the right to change the circuitry and specifications without notice at any time. you are strongly urged to ensure that the information given has not been superseded by a more up-to-date version.


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