g8050 to g8053 series ingaas linear image sensors are specifically designed as detectors for monitoring wdm in optical communic ations. these linear image sensors consist of an ingaas photodiode array with each pixel connected to a charge amplifier array comprised of c mos transistors, a cds circuit, an offset compensation circuit, a shift register and a timing generator. these sensors deliver high sensitivity and stable operation in the near infrared spectral range. the package is hermetically sealed for high reliability and the window has an anti-reflective coating for efficient light detection. signal processing circuits on the cmos chip allow selecting a feedback capacitance (cf) of 10 pf or 0.5 pf by supplying an exte rnal voltage. the image sensor operates over a wide dynamic range when cf=10 pf and delivers high gain when cf=0.5 pf. features l wide dynamic range l low noise and low dark current l selectable gain l anti-saturation circuit l cds circuit * 1 l offset compensation circuit l simple operation (by built-in timing generator) * 2 l high resolution: 25 ? pitch (512 ch) l low cross-talk l 256 ch: 1 video line 512 ch: 2 video lines applications l dwdm wavelength monitor l optical spectrum analyzer image sensor ingaas linear image sensor image sensor for dwdm wavelength monitor g8050 to g8053 series selection guide type no. cooling number of pixels pixel pitch (m ) pixel size [ m ( h ) m ( v )] spectral response range (m ) defective pixel g8050-256r non-cooled 0.9 to 1.7 (25 c) g8050-256s one-stage te-cooled 256 50 50 250 0.9 to 1.67 (-10 c) g8051-512r non-cooled 0.9 to 1.7 (25 c) G8051-512S one-stage te-cooled 512 25 25 250 0.9 to 1.67 (-10 c) g8052-256d * 3 g8052-256r non-cooled 0.9 to 1.7 (25 c) g8052-256s one-stage te-cooled 256 50 50 500 0.9 to 1.67 (-10 c) g8053-512d * 3 g8053-512r non-cooled 0.9 to 1.7 (25 c) g8053-512s one-stage te-cooled 512 25 25 500 0.9 to 1.67 (-10 c) 0 0.5 1.0 1.5 2.0 0 0.5 1.0 wavelength (?) photo sensitivity (a/w) (typ.) t=25 ?c t= -10 ?c spectral response kmirb0011ea *1: cds (correlated double sampling) circuit a major source of noise in charge amplifiers is the reset noise gen- erated when the integration capacitance is reset. a cds circuit greatly reduces this reset noise by holding the signal immediately after re- set to find the noise differential . *2: timing generator different signal timings must be properly set in order to operate a shift register. in conventional image sensor operation, external plds (programmable logic devices) are used to input the required timing signals. however, g8050 to g8053 series image sensors internally generate all timing signals on the cmos chip just by supplying clk and reset pulses. this makes it simple to set the timings. *3: for g8052-256d and g8053-512d specifications, see the separate data sheets available from hamamatsu. 1
ingaas linear image sensor g8050 to g8053 series absolute maximum ratings parameter symbol value unit clock pulse voltage v 5.5 v operating temperature * 1 topr -40 to +70 c storage temperature * 1 tstg -40 to +85 c *1: non condensation electrical characteristics (ta=25 c, v =5 v ) parameter symbol min. typ. max. unit vdd 4.9 5.0 5.1 supply voltage vref - 1.26 - v ground vss - 0 - v element bias inp 3.5 4.5 4.6 v clock frequency f 0.1 - 4 mhz high v - 0.5 v v + 0.5 v clock pulse voltage low v 000.4v tr clock pulse rise/fall times tf 0 20 100 ns clock pulse width tpw 200 - - ns high v - 0.5 v v + 0.5 v reset pulse voltage low v (res) 0 0 0.4 v tr (res) reset pulse rise/fall times tf (res) 0 20 100 ns reset pulse width tpw (res) 6000 - - ns high v h - 4.4 inp video output voltage low v l vref 1.26 - v data rate f v - f/8 - hz electrical and optical characteristics general ratings (t=25 c) parameter symbol min. typ. max. unit peak sensitivity wavelength p - 1.55 - m saturation charge *2 qsat - 30 - pc photo response non-uniformity *3 prnu - - 5 % *2: v =5 v, cf=10 pf *3: 50 % of saturation, 10 ms integration time, after dark output subtraction, excluding first and last pixels. dark current characteristics (t=25 c) parameter symbol min. typ. max. unit g8050 series - 2 20 g8051 series - 1.5 15 g8052 series - 4 40 g8053 series i d - 6 60 pa 2
ingaas linear image sensor g8050 to g8053 series integration time n ch (n-1) ch 2 ch 1 ch 8 n clocks (readout time) trigger (output) video (output) clk (input) reset (input) 2 clocks 8 clocks 8 clocks equivalent circuit cds 1 pixel inp shift register q( ) offset compensation video ad-trig cf=0.5 pf cf=10 pf timing generator clk external input reset vref vss vdd photodiode kmirc0010eb timing chart kmirc0011ea basic circuit connection buffer buffer vss inp cf select vdd reset clk video ad-trig vref kmirc0012ea 3
ingaas linear image sensor g8050 to g8053 series 1.0 0.2 12 14 28 15 10.2 0.15 3.0 0.15 25.4 0.15 22.9 0.15 63.5 0.15 53.3 0.15 38.1 0.15 35.6 0.15 20.3 0.15 a b (28 ) 2.54 (28 ) 0.46 6.4 1 27.2 0.15 index mark non-cooled one-stage te-cooled 4.35 1.8 ab 6.15 3.6 hamamatsu photonics k.k., solid state division 1126-1 ichino-cho, hamamatsu city, 435-8558 japan, telephone: (81) 053-434-3311, fax: (81) 053-434-5184, http://www.hamamatsu.com u.s.a.: hamamatsu corporation: 360 foothill road, p.o.box 6910, bridgewater, n.j. 08807-0910, u.s.a., telephone: (1) 908-231-0960, fax: (1) 908-231-1218 germany: hamamatsu photonics deutschland gmbh: arzbergerstr. 10, d-82211 herrsching am ammersee, germany, telephone: (49) 08152-3750, fax: (49) 08152-2658 france: hamamatsu photonics france s.a.r.l.: 8, rue du saule trapu, parc du moulin de massy, 91882 massy cedex, france, telephone: 33-(1) 69 53 71 00, fax: 33-(1) 69 53 71 10 united kingdom: hamamatsu photonics uk limited: 2 howard court, 10 tewin road, welwyn garden city, hertfordshire al7 1bw, united kingdom, telephone: (44) 1707-294888, fax: (44) 1707-325777 north europe: hamamatsu photonics norden ab: smidesv ? gen 12, se-171 41 solna, sweden, telephone: (46) 8-509-031-00, fax: (46) 8-509-031-01 italy: hamamatsu photonics italia s.r.l.: strada della moia, 1/e, 20020 arese, (milano), italy, telephone: (39) 02-935-81-733, fax: (39) 02-935-81-741 information furnished by hamamatsu is believed to be reliable. however, no responsibility is assumed for possible inaccuracies or omissions. specifications are subject to change without notic e . no patent r ights are g r anted to a n y of the circuits desc r ibed herein. ?200 2 hamamatsu photonics k.k. cat. no. kmir1009e04 feb. 2002 dn te r mi na l n am e input/output function and recommended connection clk input (cmos logic compatible) clock pulse for operating the cmos shift register reset input (cmos logic compatible) reset pulse for initializing the feedback capacitance in the charge amplifier formed on the cmos chip. the width of the reset pulse is integration time. vdd input supply voltage for operating the signal processing circuit on the cmos chip. vss - ground for the signal processing circuit on the cmos chip. inp input reset voltage for the charge amplifier array on the cmos chip. cf select input voltage that determines the feedback capacitance (cf) on the cmos chip. cf=10 pf at 0 v, and cf=0.5 pf at 5 v. case - this terminal is electrically connected to the package. therm - thermistor for monitoring temperature inside the package. no connection for room temperature operation type. te+, te- - power supply terminal for the thermoelectric cooler that cools the photodiode array. no connection for room temperature operation type. ad-trig output digital signal for ad conversion; positive polarity video output analog video signal; positive polarity vref input reset voltage for the offset compensation circuit on the cmos chip dimensional outline (unit: mm) kmira0010ea kmirc0013ea pin connection (top view) te + therm therm case reset te - vdd vss inp clk vref video cf select ad-trig 256 pixels 512 pixels te + therm therm case reset-odd te - vdd vss inp clk-odd vref video-odd cf select ad-trig-odd reset-even ad-trig-even clk-even video-even 4
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