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december 2008 rev 5 1/34 34 vn920 single channel high-s ide solid-state relay features cmos compatible input proportional load current sense shorted load protection under-voltage and over-voltage shutdown over-voltage clamp thermal shutdown current limitation protection against loss of ground and loss of v cc very low standby power dissipation reverse battery protected (see application schematic ) description the vn920 is a monolithic device designed in stmicroelectronics vipower m0-3 technology. the vn920 is intended for driving any type of load with one side connected to ground. the active v cc pin voltage clamp protects the device against low energy spikes (see iso7637 transient compatibility table). acti ve current limitation combined with thermal shutdown and automatic restart protects the device against over-load. the device integrates an analog current sense output which delivers a current proportional to the load current. the device automatically turns off in the case where the ground pin becomes disconnected. type r ds(on) i out v cc vn920 vn920-b5 vn920so 16 m ? 30 a 36 v pentawatt p 2 pak so-16l table 1. device summary package order codes tube tape and reel pentawatt vn920 - p 2 pak vn920-b5 vn920-b513tr so-16l vn920so vn920so13tr www.st.com
contents vn920 2/34 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16 3.1.1 solution 1: resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . . 16 3.1.2 solution 2: diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . . 17 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4 p 2 pak maximum demagnetization energy (vcc = 13.5v) . . . . . . . . . . . 18 3.5 so-16l maximum demagnetization energy (vcc = 13.5v) . . . . . . . . . . . 19 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1 so-16l thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.2 p 2 pak thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.2 pentawatt mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.3 p 2 pak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.4 so-16l packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.5 pentawatt packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.6 p 2 pak packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
vn920 list of tables 3/34 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. switching (v cc =13v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 7. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 8. current sense (9v vcc 16v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 9. v cc output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 10. protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 11. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 12. electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 13. so-16l thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 14. p 2 pak thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 15. so-16l mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 16. pentawatt mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 17. p 2 pak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 18. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
list of figures vn920 4/34 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. i out /i sense versus i out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 6. waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8. high-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 9. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 10. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 11. over-voltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 12. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 13. ilim vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 14. on-state resistance vs vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 15. input high-level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 16. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 17. on-state resistance vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 18. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 19. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 20. p 2 pak maximum turn-off curr ent versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 21. so-16l maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 22. so-16l pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 23. so-16l rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . 20 figure 24. so-16l thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 25. thermal fitting model of a single channel hsd in so-16l . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 26. p 2 pak pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 27. p 2 pak rthj-amb vs. pcb copper area in open box free air condition . . . . . . . . . . . . . . . 23 figure 28. p 2 pak thermal impedance junction ambien t single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 29. thermal fitting model of a single channel hsd in p 2 pak. . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 30. so-16l package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 31. pentawatt package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 32. p 2 pak package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 33. so-16l tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 34. so-16l tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 35. pentawatt tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 36. p 2 pak tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 37. p 2 pak tape and reel (suffix ?13tr?). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
vn920 block diagram and pin description 5/34 1 block diagram and pin description figure 1. block diagram figure 2. configuration diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin current sense n.c. output input floating x x x to ground through 1k ? resistor x through 10k ? resistor undervoltage overtemperature v cc gnd input output overvoltage current limiter logic driver power clamp v cc clamp v ds limiter detection detection detection k i out current sense output c.sense v cc input gnd 5 4 3 2 1 p2pak/ pentawatt v cc output output output output v cc output output v cc n.c. n.c. c.sense input v cc gnd n.c. 1 8 9 16 so-16l
electrical specifications vn920 6/34 2 electrical specifications figure 3. current and voltage conventions 2.1 absolute maximum ratings stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not imp lied. exposure to absolute ma ximum rating conditions for extended periods may affect device reliability. refer also to the st microelectronics sure program and other relevant quality document. i s i gnd v cc v cc v sense output i out current sense i sense input i in v in v out gnd v f table 3. absolute maximum ratings symbol parameter value unit so-16l pentawatt p 2 pak v cc dc supply voltage 41 v - v cc reverse dc supply voltage - 0.3 v - i gnd dc reverse ground pin current - 200 ma i out dc output current internally limited a - i out reverse dc output current - 21 a i in dc input current +/- 10 ma v csense current sense maximum voltage - 3 + 15 v v v esd electrostatic discharge (human body model: r = 1.5k ?; c = 100pf) input current sense output v cc 4000 2000 5000 5000 v v v v
vn920 electrical specifications 7/34 2.2 thermal data symbol parameter value unit so-16l pentawatt p 2 pak e max maximum switching energy (l = 0.25mh; r l = 0 ? ; v bat = 13.5v; t jstart = 150oc; i l = 45a) 352 364 mj p tot power dissipation t c 25c 8.3 96.1 96.1 w t j junction operating temperature internally limited c t c case operating temperature - 40 to 150 c t stg storage temperature - 55 to 150 c table 3. absolute maximum ratings (continued) table 4. thermal data symbol parameter max. value unit so-16l pentawatt p 2 pak r thj-case thermalresistance junction-case -1.31.3c/w r thj-lead thermalresistance junction-lead 15 - c/w r thj-amb thermalresistance junction-ambient 65 (1) 1. when mounted on a standard single-sided fr-4 board with 0.5cm 2 of cu (at least 35 m thick) connected to all v cc pins. 61.3 51.3 (2) 2. when mounted on a standard single-sided fr-4 board with 0.5cm 2 of cu (at least 35 m thick). c/w 48 (3) 3. when mounted on a standard single-sided fr-4 board with 6cm 2 of cu (at least 35 m thick) connected to all v cc pins. 37 (4) 4. when mounted on a standard single-sided fr-4 board with 6cm 2 of cu (at least 35 m thick). c/w
electrical specifications vn920 8/34 2.3 electrical characteristics values specified in this section are for 8v < v cc < 36v; -40c < t j < 150c, unless otherwise stated. note: v clamp and v ov are correlated. typical difference is 5v. table 5. power symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 5.5 13 36 v v usd under-voltage shutdown 3 4 5.5 v v ov over-voltage shutdown 36 v r on on-state resistance i out = 10a; t j = 25c; i out = 10a; i out = 3a; v cc = 6v 16 32 55 m ? m ? m ? v clamp clamp voltage i cc = 20ma 41 48 55 v i s supply current off-state; v cc = 13v; v in = v out = 0v off-state; v cc = 13v; v in = v out = 0v; t j = 25 c on-state; v cc = 13v; v in = 5v; i out = 0a; r sense = 3.9 k ? 10 10 25 20 5 a a ma i l(off1) off-state output current v in = v out = 0v 0 50 a i l(off2) off-state output current v in = 0v; v out = 3.5v -75 0 a i l(off3) off-state output current v in = v out = 0v; v cc = 13v; t j = 125c 5a i l(off4) off-state output current v in = v out = 0v; v cc = 13v; t j = 25c 3a table 6. switching (v cc =13v) symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time r l = 1.3 ? (see figure 4. )50s t d(off) turn-off delay time r l = 1.3 ? (see figure 4. )50s dv out /dt (on) turn-on voltage slope r l = 1.3 ? (see figure 4. ) see figure 10. v/s dv out /dt (off) turn-off voltage slope r l = 1.3 ? (see figure 4. ) see figure 12. v/s
vn920 electrical specifications 9/34 table 7. logic inputs symbol parameter test conditions min. typ. max. unit v il input low level voltage 1.25 v i il low level input current v in = 1.25v 1 a v ih input high-level voltage 3.25 v i ih high-level input current v in = 3.25v 10 a v i(hyst) input hysteresis voltage 0.5 v v icl input clamp voltage i in = 1ma i in = - 1ma 66.8 - 0.7 8v v table 8. current sense (9v v cc 16v) symbol parameter test conditions min. typ. max. unit k 1 i out /i sense i out = 1a; v sense = 0.5v; t j = -40c...150c 3300 4400 6000 dk 1 /k 1 current sense ratio drift i out = 1a; v sense = 0.5v; t j = - 40c...150c -10 +10 % k 2 i out /i sense i out = 10a; v sense = 4v; t j = - 40c t j = 25c...150c 4200 4400 4900 4900 6000 5750 dk 2 /k 2 current sense ratio drift i out = 10a; v sense = 4v; t j = -40c...150c -8 +8 % k 3 i out /i sense i out = 30a; v sense = 4v; t j = -40c t j = 25c...150c 4200 4400 4900 4900 5500 5250 dk 3 /k 3 current sense ratio drift i out = 30a; v sense = 4v; t j = -40c...150c -6 +6 % i sense0 analog sense current v cc = 6...16v; i out = 0a; v sense = 0v; t j = -40c...150c 0 10 a v sense max analog sense output voltage v cc = 5.5v; i out = 5a; r sense = 10k ? v cc > 8v, i out = 10a; r sense = 10k ? 2 4 v v v senseh sense voltage in over-temperature condition v cc = 13v; r sense = 3.9k ? 5.5 v
electrical specifications vn920 10/34 r vsenseh analog sense output impedance in over-temperature condition v cc = 13v; t j > t tsd ; output open 400 ? t dsense current sense delay response to 9 0 % i sense (1) 500 s 1. current sense signal delay after positive input slope. table 9. v cc output diode symbol parameter test conditions min. typ. max. unit v f forward on voltage - i out = 5a; t j = 150c 0.6 v table 10. protections (1) 1. to ensure long term reliability under heavy over-load or short circuit conditions , protection and related diagnostic signals must be used together with a pro per software strategy. if the device operates under abnormal conditions this software must limit the duration and number of activation cycles. symbol parameter test conditions min. typ. max. unit t tsd shutdown temperature 150 175 200 c t r reset temperature 135 c t hyst thermal hysteresis 7 15 c i lim current limitation v cc = 13v 5v < v cc < 36v 30 45 75 75 a a v demag turn-off output clamp voltage i out = 2 a; v in = 0v; l = 6mh v cc - 41 v cc - 48 v cc - 55 v v on output voltage drop limitation i out = 1 a; t j = -40c...150c 50 mv table 8. current sense (9v v cc 16v) (continued) symbol parameter test conditions min. typ. max. unit
vn920 electrical specifications 11/34 table 11. truth table conditions input output sense normal operation l h l h 0 nominal over-temperature l h l l 0 v senseh under-voltage l h l l 0 0 over-voltage l h l l 0 0 short circuit to gnd l h h l l l 0 (t j t tsd ) v senseh short circuit to v cc l h h h 0 < nominal negative output voltage clamp l l 0 table 12. electrical transient requirements iso t/r 7637/1 test pulse test level i ii iii iv delays and impedance 1- 25v (1) 1. all functions of the device are performed as designed after exposure to disturbance. - 50v (1) - 75v (1) - 100v (1) 2ms, 10 ? 2 + 25v (1) + 50v (1) + 75v (1) + 100v (1) 0.2ms, 10 ? 3a - 25v (1) - 50v (1) - 100v (1) - 150v (1) 0.1s, 50 ? 3b + 25v (1) + 50v (1) + 75v (1) + 100v (1) 0.1s, 50 ? 4- 4v (1) - 5v (1) - 6v (1) - 7v (1) 100ms, 0.01 ? 5+ 26.5v (1) + 46.5v (2) 2. one or more functions of the device is not perfor med as designed after exposure and cannot be returned to proper operation without replacing the device. + 66.5v (2) + 86.5v (2) 400ms, 2 ?
electrical specifications vn920 12/34 figure 4. switching characteristics figure 5. i out /i sense versus i out v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) i sense t t 90% t d(off) input t 90% t d(on) t dsense 0 2 4 6 8 101214161820222426283032 3000 3500 4000 4500 5000 5500 6000 6500 min.tj=-40c max.tj=-40c min.tj=25...150c max.tj=25...150c typical value i out (a) i out /i sense
vn920 electrical specifications 13/34 figure 6. waveforms sense input normal operation undervoltage v cc v usd v usdhyst input overvoltage v cc sense input sense load current load current load current v ov v ovhyst v cc > v usd short to ground input load current sense load voltage input load voltage sense load current electrical specifications vn920 14/34 2.4 electrical characteristics curves figure 7. off-state output current figure 8. high-level input current figure 9. input clamp voltage figure 10. turn-on voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c ) 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 10 vicl (v) iin=1 ma -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 250 300 350 400 450 500 550 600 650 700 dvout/dt(on) (v/ms) vcc=13v rl=1.3ohm figure 11. over-voltage shutdown figure 12. turn-off voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c ) 30 32 34 36 38 40 42 44 46 48 50 vov (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 350 400 450 500 550 dvout/dt(off) (v/ms) vcc=13v rl=1.3ohm
vn920 electrical specifications 15/34 figure 13. i lim vs t case figure 14. on-state resistance vs v cc -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 10 20 30 40 50 60 70 80 90 100 ilim (a ) vcc=13v 5 10152025303540 vcc (v) 0 5 10 15 20 25 30 35 40 45 50 ron (mohm) tc = - 40oc tc = 25oc tc = 150oc figure 15. input high-level figure 16. input hysteresis voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 vhyst (v) figure 17. on-state resistance vs tcase figure 18. input low level -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 0 5 10 15 20 25 30 35 40 45 50 ron (mohm) iout=10a vc c =8v; 36v -50 -25 0 25 50 75 100 125 150 175 tc (c) 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 vil (v)
application information vn920 16/34 3 application information figure 19. application schematic 3.1 gnd protection networ k against reverse battery 3.1.1 solution 1: resist or in the ground line (r gnd only) this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1. r gnd 600mv / (i s(on)max ). 2. r gnd ( - v cc ) / (- i gnd ) where - i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc < 0: during reverse battery situations) is: p d = (- v cc ) 2 / r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift will vary depending on how ma ny devices are on in the case of several high-side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st suggest s to utilize solution 2 (see below). v cc gnd output d gnd r gnd d ld c +5v r prot v gnd input current sense r sense r prot
vn920 application information 17/34 3.1.2 solution 2: diode (d gnd ) in the ground line a resistor (r gnd = 1k ?) should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the grou nd network will produce a shift ( 600mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. this shift will not vary if more than one hsd shares t he same diode/resistor network. series resistor in input and status lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. safest configuration for unused input and status pin is to leave them unconnected. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in the iso 7637-2: 2004(e) table. 3.3 mcu i/os protection if a ground protection network is used and negative transient are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the c i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of c and the current required by the hsd i/os (input levels compatibilit y) with the latch-up limit of c i/os. -v ccpeak /i latchup r prot (v oh c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = - 100v and i latchup 20ma; v oh c 4.5v 5k ? r prot 65k ? . recommended values: r prot =10k ? .
application information vn920 18/34 3.4 p 2 pak maximum demagnetization energy (v cc = 13.5v) figure 20. p 2 pak maximum turn-off current versus inductance note: values are generated with r l =0 ?. in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. c: t jstart = 125c repetitive pulse a: t jstart = 150c single pulse b: t jstart = 100c repetitive pulse demagnetization demagnetization demagnetization t v in , i l 1 10 100 0.01 0.1 1 10 100 l(mh) i lmax (a) a b c
vn920 application information 19/34 3.5 so-16l maximum demagnetization energy (v cc = 13.5v) figure 21. so-16l maximum turn-off current versus inductance note: values are generated with r l =0 ?. in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. c: t jstart = 125c repetitive pulse a: t jstart = 150c single pulse b: t jstart = 100c repetitive pulse demagnetization demagnetization demagnetization t v in , i l
package and pcb thermal data vn920 20/34 4 package and pcb thermal data 4.1 so-16l thermal data figure 22. so-16l pc board note: layout condition of r th and z th measurements (pcb fr4 area = 41mm x 48mm, pcb thickness = 2mm, cu thickness = 35m, copper areas: 0.5cm 2 , 6cm 2 ). figure 23. so-16l r thj-amb vs pcb copper area in open box free air condition 40 45 50 55 60 65 70 01234567 pc b c u heatsink area (cm^ 2) rth j-amb (c/ w)
vn920 package and pcb thermal data 21/34 figure 24. so-16l thermal impedance junction ambient single pulse equation 1 : pulse calculation formula figure 25. thermal fitting model of a single channel hsd in so-16l z th r th z thtp 1 ? () + ? = where t p t ? = t_amb c1 r1 r2 c2 r3 c3 r4 c4 r5 c5 r6 c6 pd tj
package and pcb thermal data vn920 22/34 4.2 p 2 pa k th e rm al da t a figure 26. p 2 pa k p c b oa rd note: layout condition of r th and z th measurements (pcb fr4 area = 60mm x 60mm, pcb thickness = 2 mm, cu thickness = 35 m , copper areas: 0.97cm 2 , 8cm 2 ). table 13. so-16l thermal parameters area / island (cm 2 ) footprint 6 r1 (c/w) 0.02 r2 (c/w) 0.1 r3 (c/w) 2.2 r4 (c/w) 12 r5 (c/w) 15 r6 (c/w) 35 20 c1 (w.s/c) 0.0015 c2 (w.s/c) 7e-03 c3 (w.s/c) 1.5e-02 c4 (w.s/c) 0.14 c5 (w.s/c) 1 c6 (w.s/c) 5 8
vn920 package and pcb thermal data 23/34 figure 27. p 2 pa k r thj-amb vs. pcb copper area in open box free air condition figure 28. p 2 pak thermal impedance junction ambient single pulse 30 35 40 45 50 55 024681 0 pcb cu heatsink area ( cm^ 2 ) rthj_amb (c/ w) tj-tamb=50c 0.01 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 time (s) zt h (c / w) 0.97 cm 2 6 cm 2
package and pcb thermal data vn920 24/34 equation 2: pulse calculation formula where = t p /t figure 29. thermal fitting model of a single channel hsd in p 2 pa k table 14. p 2 pak thermal parameter area/island (cm 2 )0.976 r1 (c/w) 0.02 r2 (c/w) 0.1 r3 (c/w) 0.22 r4 (c/w) 4 r5 (c/w) 9 r6 (c/w) 37 22 c1 (ws/c) 0.0015 c2 (ws/c) 0.007 c3 (ws/c) 0.015 c4 (ws/c) 0.4 c5 (ws/c) 2 c6 (ws/c) 3 5 z th r th z thtp 1 ? () + ? =
vn920 package and packing information 25/34 5 package and packing information 5.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com. ecopack ? is an st trademark. figure 30. so-16l package dimensions table 15. so-16l mechanical data dim. mm. min. typ. max. a 2.65 a1 0.1 0.2 a2 2.45 b 0.35 0.49 b1 0.23 0.32 c0.5 c1 45 (typ.)
package and packing information vn920 26/34 5.2 pentawatt mechanical data figure 31. pentawatt package dimensions dim. mm. min. typ. max. d 10.1 10.5 e 10.0 10.65 e1.27 e3 8.89 f7.4 7.6 l 0.5 1.27 m 0.75 s 8 (max.) table 15. so-16l mechanical data (continued)
vn920 package and packing information 27/34 table 16. pentawatt mechanical data dim. mm min. typ. max. a 4.8 c 1.37 d2.4 2.8 d1 1.2 1.35 e 0.35 0.55 f 0.8 1.05 f1 1 1.4 g3.23.43.6 g1 6.6 6.8 7 h2 10.4 h3 10.05 10.4 l17.85 l1 15.75 l2 21.4 l3 22.5 l5 2.6 3 l6 15.1 15.8 l7 6 6.6 m4.5 m1 4 diam. 3.65 3.85
package and packing information vn920 28/34 5.3 p 2 pak mechanical data figure 32. p 2 pak package dimensions p010r
vn920 package and packing information 29/34 table 17. p 2 pak mechanical data dim. mm min. typ. max. a 4.30 4.80 a1 2.40 2.80 a2 0.03 0.23 b 0.80 1.05 c 0.45 0.60 c2 1.17 1.37 d 8.95 9.35 d2 8.00 e 10.00 10.40 e1 8.50 e 3.20 3.60 e1 6.60 7.00 l 13.70 14.50 l2 1.25 1.40 l3 0.90 1.70 l5 1.55 2.40 r 0.40 v2 0o 8o package weight 1.40 gr (typ)
package and packing information vn920 30/34 5.4 so-16l packing information figure 33. so-16l tube shipment (no suffix) figure 34. so-16l tape and reel shipment (suffix ?tr?) all dimensions are in mm. base q.ty 50 bulk q.ty 1000 tube length ( 0.5) 532 a 3.5 b 13.8 c ( 0.1) 0.6 a c b base q.ty 1000 bulk q.ty 1000 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 16.4 n (min) 60 t (max) 22.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 16 tape hole spacing p0 ( 0.1) 4 component spacing p 12 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 7.5 compartment depth k (max) 6.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed reel dimensions
vn920 package and packing information 31/34 5.5 pentawatt packing information figure 35. pentawatt tube shipment (no suffix) 5.6 p 2 pak packing information figure 36. p 2 pak tube shipment (no suffix) all dimensions are in mm. base q.ty 50 bulk q.ty 1000 tube length ( 0.5) 532 a 18 b 33.1 c ( 0.1) 1 c b a all dimensions are in mm. base q.ty 50 bulk q.ty 1000 tube length ( 0.5) 532 a 18 b 33.1 c ( 0.1) 1 c b a
package and packing information vn920 32/34 figure 37. p 2 pak tape and reel (suffix ?13tr?) tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 ( 0.1) 4 component spacing p 12 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 11.5 compartment depth k (max) 6.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed reel dimensions all dimensions are in mm. base q.ty 1000 bulk q.ty 1000 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 24.4 n (min) 60 t (max) 30.4
vn920 revision history 33/34 6 revision history table 18. document revision history date revision changes 22-jun-2004 1 initial release. 07-jul-2004 2 current and voltage convention update (page 2). configuration diagram (top view) & suggested connections for unused and n.c. pins insertion (page 2). 6cm2 cu condition insertion in thermal data table (page 3). 09-jul-2004 3 v cc - output diode section update (page 5). protections note insertion (page 5). revision history table insertion (page 24). disclaimers update (page 25). 03-may-2006 4 suggested connections for unused and n.c.pins? correction (page 2). 17-dec-2008 5 document reformatted and restructured. added content, list of figures and tables. added ecopack ? packages information. updated figure 37.: p 2 pak tape and reel (suffix ?13tr?) : changed component spacing (p) in tape dimensions table from 16 mm to 12 mm.
vn920 34/34 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2008 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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