109 x o mhr series 9x14 mm, 5.0 volt, hcmos/ttl, clock oscillators * consult factory regarding availability of ?b? and ?c? symmetry codes, and ?8? stability code. pin connections note: a capacitor of value 0.01 f or greater between vdd and ground is recommended. 1. symmetry is measured at 1.4 v with ttl load, and at 50% vdd with hcmos load. 2. ttl load - see load circuit diagram #1 on page 148. hcmos load - see load circuit diagram #2 on page 148. 2. rise/fall times are measured between 0.5 v and 2.4 v for ttl load, and between 10% and 90% vdd for hcmos load.
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