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4151o?aero?01/10 features ? operating voltage: 5v ? access time: 30, 45 ns ? very low power consumption ? active: 600 mw (max) ? standby: 1 w (typ) ? wide temperature range: -55 ? c to +125 ? c ? 400 mils width packages: fp32 and sb32 ? ttl compatible inputs and outputs ? asynchronous ? no single event latch-up below a let threshold of 80 mev/mg/cm 2 @125c ? tested up to a total dose of 30 krads (si) according to mil std 883 method 1019 ? qml q and v with smd 5962-89598 ? escc with specification 9301/047 description the m65608e is a very low power cmos static ram organized as 131072 x 8 bits. utilizing an array of six transistors (6 t) memory cells, the m65608e combines an extremely low standby supply current (typic al value = 0.2 a) with a fast access time at 30 ns over the full military temperature range. the high stability of the 6t cell pro- vides excellent protection against soft errors due to noise. the m65608e is processed according to the me thods of the latest revision of the mil prf 38535 or escc 9000. rad. tolerant 128kx8, 5-volt very low power cmos sram m65608e
2 4151o?aero?01/10 m65608e block diagram pin configuration 32-lead dil side-brazed 400 mils 32-lead flatpack 400 mils 14 10 6 13 12 11 9 8 7 5 4 3 2 1 19 23 27 20 21 22 24 25 26 28 29 30 31 32 i/o0 a0 a1 a2 a3 a4 a5 a6 a7 a12 a14 a16 nc i/o5 i/o6 i/o7 a10 a11 a8 a13 cs2 vcc oe cs1 16 15 17 18 gnd i/o2 i/o1 i/o3 i/o4 a9 we a15
3 4151o?aero?01/10 m65608e pin description table 1. pin names table 2. truth table note: l = low, h = high, x = h or l, z = high impedance. names description a0 - a16 address inputs i/o0 - i/o7 data input/output cs1 chip select 1 cs2 chip select 2 we write enable oe output enable vcc power gnd ground cs1 cs2 w e oe inputs/ outputs mode hxxx z deselect/ power-down xlxx z deselect/power-down l h h l data out read l h l x data in write lhhh z output disable
4 4151o?aero?01/10 m65608e electrical characteristics absolute maximum ratings military operating range recommended dc operating conditions capacitance note: guaranteed but not tested. supply voltage to gnd potential: ........................ -0.5v + 7.0v voltage range on any input: ............ gnd - 0.5v to vcc + 0.5 voltage range on any ouput: ........... gnd - 0.5v to vcc + 0.5 storage temperature: ..................................... -65 ? c to +150 ? c output current from output pins: ................................ 20 ma electrostatic discharge voltage (mil std 883d method 3015): .. .............. .............. .... > 2000v *note: stresses beyond those listed under "abso- lute maximum ratings? may cause perma- nent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specif ication is not implied. exposure betwee n recommended dc operating and absolute maximum rating conditions for extended periods may affect device reliability. operating voltage operating temperature 5v + 10% -55 ? c to + 125 ? c parameter description minimum typical maximum unit v cc supply voltage 4.5 5.0 5.5 v gnd ground 0.0 0.0 0.0 v v il input low voltage gnd - 0.5 0.0 0.8 v v ih input high voltage 2.2 ? vcc + 0.5 v parameter description minimum typical maximum unit cin (note:) input low voltage ??8pf cout (note:) output high voltage ??8pf
5 4151o?aero?01/10 m65608e dc parameters dc test conditions ta = -55 c to + 125 c; vss = 0v; v cc = 4.5v to 5.5v consumption symbol description minimum typical maximum unit iix (1) 1. gnd < vin < v cc , gnd < vout < v cc output disabled. input leakage current -1 ? 1 a ioz (1) output leakage current -1 ? 1 a vol (2) 2. v cc min. iol = 8 ma output low voltage ??0.4v voh (3) 3. v cc min. ioh = -4 ma. output high voltage 2.4 ? ? v symbol description 65608e-30 65608e-45 unit value iccsb (1) 1. cs1 > v ih or cs2 < v il and cs1 < v il . standby supply current 2 2 ma max iccsb1 (2) 2. cs1 > v cc - 0.3v or, cs2 < gnd + 0.3v and cs1 < 0.2v. standby supply current 300 300 a max iccop (3) 3. f = 1/tavav, iout = 0 ma, w e = oe = v ih , vin = gnd or v cc , v cc max. dynamic operating current 110 100 ma max
6 4151o?aero?01/10 m65608e ac parameters ac test conditions input pulse levels: ................................................................................................. gnd to 3.0v input rise/fall times: ........................................................................................................ .. 5 ns input timing reference levels: .......................................................................................... 1.5v output loading iol/ioh (see figure 1 and figure 2) ...................................................... +30 pf ac test loads waveforms figure 1 figure 2 figure 3
7 4151o?aero?01/10 m65608e data retention mode atmel cmos ram?s are designed with battery backup in mind. data retention voltage and sup- ply current are guaranteed over temperature. the following rules ensure data retention: 1. during data retent ion chip select cs1 must be held high within vcc to vcc -0.2v or, chip select cs2 must be held down within gnd to gnd +0.2v. 2. output enable (oe ) should be held high to keep the ram outputs high impedance, mini- mizing power dissipation. 3. during power up and power-down transitions cs1 and oe must be kept between vcc + 0.3v and 70% of vcc, or with cs2 between gnd and gnd -0.3v. 4. the ram can begin operation > tr ns after vcc reaches the minimum operation volt- ages (4.5v). timing data retention characteristics notes: 1. tavav = read cycle time 2. cs1 = v cc or cs2 = cs1 = gnd, vin = gnd/ v cc , this parameter is only tested at v cc = 2v. 3. parameters guaranteed but not tested parameter description minimum typical ta = 25 ? c maximum unit vccdr v cc for data retention 2.0 ? ? v tcdr chip deselect to data retention time 0.0 ? ? ns tr operation recovery time tavav (1) ??ns iccdr1 data retention current at 2.0v ?0.1150a iccdr2 (2) data retention current at 3.0v ?0.2200a
8 4151o?aero?01/10 m65608e write cycle note: 1. parameters guaranteed, not te sted, with output loading 5 pf. write cycle 1 w e controlled, oe high during write symbol parameter 65608-30 65608-45 unit value tavaw write cycle time 30 45 ns min tavwl address set-up time 00nsmin tavwh address valid to end of write 22 35 ns min tdvwh data set-up time 18 20 ns min te1lwh cs1 low to write end 22 35 ns min te2hwh cs2 high to write end 22 35 ns min twlqz write low to high z (1) 815nsmax twlwh write pulse width 22 35 ns min twhax address hold from to end of write 00nsmin twhdx data hold time 00nsmin twhqx write high to low z (1) 00nsmin
9 4151o?aero?01/10 m65608e write cycle 2 w e controlled, oe low write cycle 3 cs1 or cs2 controlled note: the internal write time of the me mory is defined by the overlap of cs1 low and cs2 high and w e low. both signals must be actived to initiate a write and either signal can terminate a write by going inactived. the data input setup and hold timing should be referenced to the active edge of the signal that terminates the writ e. data out is high impedance if oe = v ih .
10 4151o?aero?01/10 m65608e read cycle note: 1. parameters guaranteed, not tested, with output loading 5 pf. symbol parameter 65608-30 65608-45 unit value tavav read cycle time 30 45 ns min tavqv address access time 30 45 ns max tavqx address valid to low z (1) 55nsmin te1lqv chip-select1 access time 30 45 ns max te1lqx cs1 low to low z (1) 33nsmin te1hqz cs1 high to high z (1) 15 20 ns max te2hqv chip-select2 access time 30 45 ns max te2hqx cs2 high to low z (1) 33nsmin te2lqz cs2 low to high z (1) 15 20 ns max tglqv output enable access time 12 15 ns max tglqx oe low to low z (1) 00nsmin tghqz oe high to high z (1) 815nsmax
11 4151o?aero?01/10 m65608e read cycle 1 address controlled (cs1 = oe low, cs2=we high) read cycle 2 c s1 controlled (cs2=we high) read cycle 3 cs2 controlled (we high, cs1 low)
12 4151o?aero?01/10 m65608e ordering information note: 1. contact atmel for availability. part number temperature range speed package flow mmc9-65608ev-30-e (1) 25 ? c 30 ns sb32.4 engineering samples mmdj-65608ev-30-e 25 ? c 30 ns fp32.4 engineering samples 5962-8959847qzc -55 ? to +125 ? c 30 ns sb32.4 qml q 5962-8959847qtc -55 ? to +125 ? c 30 ns fp32.4 qml q 5962-8959818mzc -55 ? to +125 ? c 45 ns sb32.4 qml q 5962-8959818mtc -55 ? to +125 ? c 45 ns fp32.4 qml q 5962-8959847vzc -55 ? to +125 ? c 30 ns sb32.4 qml v 5962-8959847vtc -55 ? to +125 ? c 30 ns fp32.4 qml v 5962-8959818vzc -55 ? to +125 ? c 45 ns sb32.4 qml v 5962-8959818vtc -55 ? to +125 ? c 45 ns fp32.4 qml v 930104703 -55 ? to +125 ? c 30 ns sb32.4 escc 930104704 -55 ? to +125 ? c 30 ns fp32.4 escc 930104701 -55 ? to +125 ? c 45 ns sb32.4 escc 930104702 -55 ? to +125 ? c 45 ns fp32.4 escc mm065608ev-30-e 25 ? c 30 ns die engineering samples 5962-8959847q6a -55 ? to +125 ? c 30 ns die qml q 5962-8959847v6a -55 ? to +125 ? c 30 ns die qml v
13 4151o?aero?01/10 m65608e package drawings 32-lead flat pack 400 mils
14 4151o?aero?01/10 m65608e package drawings 32-lead side braze 400 mils
15 4151o?aero?01/10 m65608e document revision history changes from rev. l to rev. m 1. change in ?consumption? on page 5. iccop. changes from rev. m to rev. n 1. update of footnotes under ?data retention characteristics? table 2. update of absolute maximum ratings section changes from rev. n to rev. o 1. update of ?ordering information? section 2. correction of typo erros in the note of ?write cycle 3? section 3. addition of headlines in pictures of ?read cycle? section 4. update of features section 5. correction of typo error in the write si gnal, in the pin configuration section : w replaced by we
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