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s-8205a/b series www.sii-ic.com battery protection ic for 4-series or 5-series cell pack ? seiko instruments inc., 2010-2011 rev.1.2 _00 seiko instruments inc. 1 the s-8205a/b series includes a voltage detection circuit with high accuracy and a delay circuit, in single use, makes it possible for users to monitor the status of 4-series or 5-series cell lithium-ion rechargeable battery. these ics are suitable for protecting rechargeable lithium-ion battery packs from overcharge, overdischarge, and overcurrent. ? features (1) high-accuracy voltage detection for each cell ? overcharge detection voltage n (n = 1 to 5) 3.55 v to 4.40 v *1 (50 mv step) accuracy 25 mv ? overcharge release voltage n (n = 1 to 5) 3.30 v to 4.40 v *2 accuracy 50 mv ? overdischarge detection voltage n (n = 1 to 5) 2.0 v to 3.2 v *1 (100 mv step) accuracy 80 mv ? overdischarge release voltage n (n = 1 to 5) 2.0 v to 3.4 v *3 accuracy 100 mv (2) discharge overcurrent detection in 2-step ? discharge overcurrent detection voltage 0.05 v to 0.30 v *4 (50 mv step) accuracy 15 mv ? short circuit detection voltage 0.50 v to 1.0 v *4 (100 mv step) accuracy 100 mv (3) charge overcurrent detection ? charge overcurrent detection voltage ? 0.30 v to ? 0.05 v (50 mv step) accuracy 30 mv (4) settable by external capacitor; overcharge detection delay time, overdischarge detection delay time, discharge overcurrent detection delay time, charge overcurrent detection delay time (load short circuit detection delay time is internally fixed.) (5) s-8205a series: used for 4-series cell, s-8205b series: used for 5-series cell (6) independent charging and discharge control by the control pins (7) products with and without a power-down function can be selected. (8) withstand voltage element absolute maximum rating : 28 v (9) wide range of operation voltage 2 v to 24 v (10) wide range of operation temperature ? 40c to + 85 c (11) low current consumption ? operation mode 40 a max. ( + 25 c) ? power-down mode 0.1 a max. ( + 25 c) (12) lead-free (sn 100%), halogen-free *5 *1. the overcharge detection voltage n (n = 1 to 5) and overdisc harge detection voltage (n = 1 to 5) are not selectable if the voltage difference betwe en them is 0.6 v or less. *2. overcharge hysteresis voltage n (n = 1 to 5) is sele ctable in 0 v, or in 0.1 v to 0.4 v in 50 mv step. (overcharge hysteresis volt age = overcharge detection voltage ? overcharge release voltage) *3. overdischarge hysteresis voltage n (n = 1 to 5) is sele ctable in 0 v, or in 0.2 v to 0.7 v in 100 mv step. (overdischarge hysteresis volt age = overdischarge release voltage ? overdischarge detection voltage) *4. the discharge overcurrent detection voltage and load short ci rcuit detection voltage are not selectable if the voltage difference between them is 0.3 v or less. *5. refer to ? ? product name structure ? for details. ? applications ? rechargeable lithiu m-ion battery packs ? package ? 16-pin tssop
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 2 ? block diagram 1. s-8205a series vm do + ? vini discharge overcurrent ctlc ctld cct control circuit r vmd r vms vdd vc1 vc2 vc3 vc4 overcharge 1 delay circuit delay circuit delay circuit delay circuit + ? + ? load short circuit charge overcurrent ? + + ? + ? + ? ? + ? + vc5 + ? ? + cdt co delay circuit vss cit r ctlc r ctld overcharge 2 overcharge 3 overcharge 4 ove r - discharge 1 over- discharge 2 over- discharge 3 over- discharge 4 remark diodes in the figure are parasitic diodes. figure 1
battery protection ic for 4-series or 5-series cell pack rev.1.2 _00 s-8205a/b series seiko instruments inc. 3 2. s-8205b series vm do + ? vini ctlc ctld cct r vmd r vms vdd vc1 vc2 vc3 vc4 + ? + ? ? + + ? + ? + ? ? + ? + vc5 + ? + ? ? + ? + cdt co vss cit r ctlc r ctld discharge overcurrent control circuit overcharge 1 delay circuit delay circuit delay circuit delay circuit load short circuit charge overcurrent delay circuit overcharge 2 overcharge 3 overcharge 4 ove r - discharge 1 over- discharge 2 over- discharge 3 over- discharge 4 overcharge 5 over- discharge 5 remark diodes in the figure are parasitic diodes. figure 2
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 4 ? product name structure 1. product name s-8205 x xx ? tct1 u product series name a: 4-cell b: 5-cell package abbreviation and ic packing specifications *1 tct1: 16-pin tssop, tape serial code *2 sequentially set from aa to zz environmental code u: lead-free (sn 100%), halogen-free *1. refer to the tape specifications. *2. refer to ? 2. product name list ?. 2. package drawing code package name package tape reel 16-pin tssop ft016-a-p-sd ft016-a-c-sd ft016-a-r-s1 3. product name list table 1 s-8205a series (for 4-series cell) product name overcharge detection voltage v cu overcharge release voltage v cl overdischarge detection voltage v dl overdischarge release voltage v du discharge overcurrent detection voltage v diov load short circuit detection voltage v short charge overcurrent detection voltage v ciov 0 v battery charge function power down function delay time *1 S-8205AAA-TCT1U 4.225 v 4.125 v 2.30 v 3.00 v 0.15 v 0.50 v ? 0.10 v available yes (1) s-8205aab-tct1u 4.225 v 4.075 v 2.30 v 3.00 v 0.20 v 0.50 v ? 0.10 v available yes (1) *1. the delay time is set by the external capacitor. but the discharge overcurrent release delay time (t diovr ) and charge overcurrent release delay time (t ciovr ) are calculated by discharge overcurrent detection delay time (t diov ) and charge overcurrent detection delay time (t ciov ) as the following equations. 1 [ms] (typ.) is the internal delay time of the s-8205a series. (1) t diovr = t diov 10 + 1 [ms] (typ.), t ciovr = t ciov 10 + 1 [ms] (typ.) (2) t diovr = t diov 0.05 + 1 [ms] (typ.), t ciovr = t ciov 0.05 + 1 [ms] (typ.) moreover, refer to ?8. delay time setting? in ?? operation? for calculational methods of delay times. remark please contact our sales office for products with detection voltage values other than those specified above.
battery protection ic for 4-series or 5-series cell pack rev.1.2 _00 s-8205a/b series seiko instruments inc. 5 table 2 s-8205b series (for 5-series cell) product name overcharge detection voltage v cu overcharge release voltage v cl overdischarge detection voltage v dl overdischarge release voltage v du discharge overcurrent detection voltage v diov load short circuit detection voltage v short charge overcurrent detection voltage v ciov 0 v battery charge function power down function delay time *1 s-8205baa-tct1u 4.225 v 4.125 v 2.30 v 3.00 v 0.15 v 0.50 v ? 0.10 v available yes (1) s-8205bab-tct1u 4.225 v 4.075 v 2.30 v 3.00 v 0.20 v 0.50 v ? 0.10 v available yes (1) s-8205bac-tct1u 4.200 v 4.100 v 2.50 v 3.20 v 0.10 v 0.80 v ? 0.10 v available yes (1) s-8205bad-tct1u 4.200 v 4.000 v 2.70 v 3.00 v 0.15 v 1.00 v ? 0.10 v available yes (1) s-8205bae-tct1u 4.200 v 4.100 v 2.50 v 3.20 v 0.15 v 0.50 v ? 0.10 v available yes (1) s-8205baf-tct1u 4.200 v 4.050 v 2.70 v 3.00 v 0.20 v 0.50 v ? 0.20 v available yes (1) s-8205bag-tct1u 4.250 v 4.150 v 2.70 v 3.00 v 0.20 v 0.50 v ? 0.20 v available yes (1) s-8205bah-tct1u 4.250 v 4.050 v 2.00 v 2.50 v 0.15 v 0.50 v ? 0.10 v available yes (1) s-8205bai-tct1u 4.225 v 4.075 v 2.30 v 3.00 v 0.10 v 0.50 v ? 0.05 v unavailable yes (1) s-8205baj-tct1u 4.200 v 4.100 v 2.50 v 3.20 v 0.10 v 0.80 v ? 0.10 v available yes (2) s-8205bak-tct1u 4.200 v 4.000 v 2.70 v 3.00 v 0.15 v 1.00 v ? 0.10 v available yes (2) s-8205bal-tct1u 4.250 v 4.100 v 2.30 v 3.00 v 0.15 v 0.50 v ? 0.10 v available no (2) *1. the delay time is set by the external capacitor. but the discharge overcurrent release delay time (t diovr ) and charge overcurrent release delay time (t ciovr ) are calculated by discharge overcurrent detection delay time (t diov ) and charge overcurrent detection delay time (t ciov ) as the following equations. 1 [ms] (typ.) is the internal delay time of the s-8205b series. (1) t diovr = t diov 10 + 1 [ms] (typ.), t ciovr = t ciov 10 + 1 [ms] (typ.) (2) t diovr = t diov 0.05 + 1 [ms] (typ.), t ciovr = t ciov 0.05 + 1 [ms] (typ.) moreover, refer to ?8. delay time setting? in ?? operation? for calculational methods of delay times. remark please contact our sales office for products with detection voltage values other than those specified above.
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 6 ? pin configuration 16-pin tssop top view 8 7 6 5 3 2 4 1 11 16 9 10 12 14 15 13 figure 3 table 3 pin no. symbol description 1 vm pin for voltage detection between vss and vm 2 co fet gate connection pin for charge control (pch open drain output) pin for voltage detection between vss and co 3 do fet gate connection pin for discharge control fet (cmos output) 4 vini pin for voltage det ection between vss and vini 5 ctlc control pin for charge fet 6 ctld control pin for discharge fet 7 cct capacitor connection pin for delay for overcharge detection voltage 8 cdt capacitor connection pin for delay for overdischarge detection voltage 9 cit capacitor connection pin for delay for discharge overcurrent detection, charge overcurrent detection 10 vss input pin for negative power supply, connection pin for battery 5?s negative voltage 11 vc5 connection pin for battery 4?s negative voltage, connection pin for battery 5?s positive voltage 12 vc4 connection pin for battery 3?s negative voltage, connection pin for battery 4?s positive voltage 13 vc3 connection pin for battery 2?s negative voltage, connection pin for battery 3?s positive voltage 14 vc2 connection pin for battery 1?s negative voltage, connection pin for battery 2?s positive voltage 15 vc1 connection pin for battery 1?s positive voltage 16 vdd input pin for positive power supply, connection pin for battery 1?s positive voltage
battery protection ic for 4-series or 5-series cell pack rev.1.2 _00 s-8205a/b series seiko instruments inc. 7 ? absolute maximum ratings table 4 (ta = + 25 c unless otherwise specified) item symbol applied pin absolute maximum ratings unit input voltage between vdd and vss v ds vdd v ss ? 0.3 to v ss + 28 v input pin voltage 1 v in1 vc1, vc2, vc3, vc4, vc5, ctlc, ctld, cct, cdt, cit v ss ? 0.3 to v dd + 0.3 v input pin voltage 2 v in2 vm, vini v dd ? 28 to v dd + 0.3 v do pin output voltage v do do v ss ? 0.3 to v dd + 0.3 v co pin input and output voltage v co co v dd ? 28 to v dd + 0.3 v power dissipation p d ? 1100 *1 mw operating ambient temperature t opr ? ? 40 to + 85 c storage temperature t stg ? ? 40 to + 125 c *1. when mounted on board [mounted board] (1) board size : 114.3 mm 76.2 mm t1.6 mm (2) board name : jedec standard51-7 caution the absolute maximum ratings are rated values exceeding which the product could suffer physical damage. these values must therefore not be exceeded under any conditions. 0 50 100 150 800 400 0 power dissipation (p d ) [mw] ambient temperature (ta) [ c] 1000 600 200 1200 figure 4 power dissipation of package (when mounted on board)
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 8 ? electrical characteristics table 5 (1 / 2) (ta = + 25 c unless otherwise specified) item symbol conditions min. typ. max. unit test circuit [detection voltage] overcharge detection voltage n (n = 1, 2, 3, 4, 5) v cun v1 = v2 = v3 = v4 = v5 *1 = v cu ? 0.05 v v cu ? 0.025 v cu v cu + 0.025 v 2 overcharge release voltage n (n = 1, 2, 3, 4, 5) v cln ? v cl ? 0.05 v cl v cl + 0.05 v 2 overdischarge detection voltage n (n = 1, 2, 3, 4, 5) v dln ? v dl ? 0.08 v dl v dl + 0.08 v 2 overdischarge release voltage n (n = 1, 2, 3, 4, 5) v dun ? v du ? 0.10 v du v du + 0.10 v 2 discharge overcurrent detection voltage v diov ? v dio ? 0.015 v diov v diov + 0.015 v 2 load short circuit detection voltage v short ? v short ? 0.10 v short v short + 0.10 v 2 charge overcurrent detection voltage v ciov ? v ciov ? 0.03 v ciov v ciov + 0.03 v 2 temperature coefficient 1 *2 t coe1 ta = 0c to 50c *4 ? 1.0 0 1.0 mv/c ? temperature coefficient 2 *3 t coe2 ta = 0c to 50c *4 ? 0.5 0 0.5 mv/c ? [delay time function] *5 cct pin internal resistance r cct v1 = 4.5 v, v2 = v3 = v4 = v5 *1 = 3.5 v 6.15 8.31 10.2 m 3 cdt pin internal resistance r cdt v1 = 1.5 v, v2 = v3 = v4 = v5 *1 = 3.5 v 615 831 1020 k 3 cit pin internal resistance r cit ? 123 166 204 k 3 cct pin detection voltage v cct v1 = 4.5 v, v2 = v3 = v4 = v5 *1 = 3.5 v v ds 0.68 v ds 0.70 v ds 0.72 v 3 cdt pin detection voltage v cdt v1 = 1.5 v, v2 = v3 = v4 = v5 *1 = 3.5 v v ds 0.68 v ds 0.70 v ds 0.72 v 3 cit pin detection voltage v cit v6 = v diov + 0.015 v v ds 0.68 v ds 0.70 v ds 0.72 v 3 load short circuit detection delay time t short ? 100 300 600 s 2 ctlc pin response time t ctlc ? ? ? 2.5 ms 2 ctld pin response time t ctld ? ? ? 2.5 ms 2 [0 v battery charge function] charger voltage for start charging 0 v battery v 0cha available 0 v charging v1 = v2 = v3 = v4 = v5 *1 = 0 v ? 0.8 1.5 v 4 battery voltage for inhibit charging 0 v battery v 0inh inhibit 0 v charging 0.4 0.7 1.1 v 2 [internal resistance] ctlc pin internal resistance r ctlc ? 7 10 13 m 5 ctld pin internal resistance r ctld ? 7 10 13 m 5 resistance between vm and vdd *6 r vmd v1 = v2 = v3 = v4 = v5 *1 = 1.8 v 450 900 1800 k 5 resistance between vm and vss r vms ? 250 500 750 k 5
battery protection ic for 4-series or 5-series cell pack rev.1.2 _00 s-8205a/b series seiko instruments inc. 9 table 5 (2 / 2) (ta = + 25 c unless otherwise specified) item symbol conditions min. typ. max. unit test circuit [input voltage] operating voltage between vdd and vss *7 v dsop fixed output voltage of do and co 2 ? 24 v ? ctlc change voltage *7 v ctlc ? 2.1 3.0 4.0 v 2 ctld change voltage *7 v ctld ? 2.1 3.0 4.0 v 2 [input current] current consumption during operation i ope ? ? 20 40 a 1 current consumption during power down *6 i pdn v1 = v2 = v3 = v4 = v5 *1 = 1.5 v ? ? 0.1 a 1 vc1 pin current i vc1 ? 0 1.5 3.0 a 5 vc2 pin current i vc2 ? ? 1.0 0 1.0 a 5 vc3 pin current i vc3 ? ? 1.0 0 1.0 a 5 vc4 pin current i vc4 ? ? 1.0 0 1.0 a 5 s-8205a series ? 3.0 ? 1.5 0 a 5 vc5 pin current i vc5 s-8205b series ? 1.0 0 1.0 a 5 [output current] co pin source current i coh v13 = 0.5 v 10 ? ? a 5 co pin leakage current i col s-8205a series v1 = v2 = v3 = v4 = 6 v s-8205b series v1 = v2 = v3 = v4 = v5 = 4.8 v ? ? 0.1 a 5 do pin source current i doh v14 = 0.5 v 10 ? ? a 5 do pin sink current i dol v15 = 0.5 v ? ? ? 10 a 5 *1. because s-8205a series are the protection ics for 4-series cell, there is no v5 for them. *2. voltage temperature coefficient 1 : overcharge detection voltage *3. voltage temperature coefficient 2 : discharge overcurrent detection voltage *4. since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. *5. refer to ? ? operation ? for details of delay time function. *6. for products with power-down function *7. the s-8205a/b series does not operate detecti on if the operating voltage between vdd and vss (v dsop ) is ctlc change voltage (v ctlc ) or ctld change voltage (v ctld ) or less.
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 10 ? test circuit 1. current consumption during operation and power down (test circuit 1) set s1 and s2 to off. 1. 1 current consumption during operation (i ope ) set v1 = v2 = v3 = v4 = 3.5 v (s-8205a series), v1 = v2 = v3 = v4 = v5 = 3.5 v (s-8205b series), s2 to on. i ss is the current consumption during operation (i ope ) at that time. 1. 2 current consumption during power down (i pdn ) (for products with power-down function) set v1 = v2 = v3 = v4 = 1.5 v (s-8205a series), v1 = v2 = v3 = v4 = v5 = 1.5 v (s-8205b series), s1 to on. i ss is the current consumption during power down (i pdn ) at that time. 2. overcharge detection voltage, overcharge release voltage, overdischarge detection voltage, overdischarge release voltage, discharge overcurrent detection voltage, load short circuit detection voltage, charge overcurrent detection voltage, ctlc change voltage, ctld change voltage, load short circuit detection delay ti me, ctlc pin response time, ctld pin response time (test circuit 2) set s3 to off. confirm both v co and v do are in ?h? (its voltage level is v ds 0.9 v or more) after setting v1 = v2 = v3 = v4 = 3.5 v (s-8205a series), v1 = v2 = v3 = v4 = v5 = 3.5 v (s-8205b series), v6 = v7 = v8 = 0 v (this status is referred to as initial status 1). 2. 1 overcharge detection voltage (v cu1 ), overcharge release voltage (v cl1 ) the overcharge detection voltage (v cu1 ) is v1 when the v co is set to ?l? (its voltage level is v ds 0.1 v or less) after increasing v1 gradually after setting v1 = v2 = v3 = v4 = v cu ? 0.05 v (s-8205a series), v1 = v2 = v3 = v4 = v5 = v cu ? 0.05 v (s-8205b series) from the initial status 1. after that, decreasing v1 gradually, v1 is the overcharge release voltage (v cl1 ) when the v co is set to ?h? after setting v2 = v3 = v4 = 3.5 v (s-8205a series), v2 = v3 = v4 = v5 = 3.5 v (s-8205b series). 2. 2 overdischarge detection voltage (v dl1 ), overdischarge release voltage (v du1 ) the overdischarge detection voltage (v dl1 ) is v1 when the v do is set to ?l? after decreasing v1 gradually from the initial status 1. after that, increasing v1 gradually, v1 is the overdischarge release voltage (v du1 ) when v do is set to ?h?. by changing vn (n = 2 to 4: s-8205a series, n = 2 to 5: s-8205b series), users can define the overcharge detection voltage (v cun ), the overcharge release voltage (v cln ), the overdischarge detection voltage (v dln ), the overdischarge release voltage (v dun ) as well when n = 1. 2. 3 discharge overcurrent detection voltage (v diov ) the discharge overcurrent detection voltage (v diov ) is v6 when v do is set to ?l? after increasing v6 gradually from the initial status 1. 2. 4 load short circuit detection voltage (v short ) the load short circuit detection voltage (v short ) is v6 when v do is set to ?l? after increasing v6 gradually after setting s3 to on from the initial status 1. 2. 5 charge overcurrent detection voltage (v ciov ) the charge overcurrent detection voltage (v ciov ) is v6 when v co is set to ?l? after decreasing v6 gradually from the initial status 1. 2. 6 ctlc change voltage (v ctlc ) the ctlc change voltage (v ctlc ) is v7 when v co is set to ?l? after increasing v7 gradually from the initial status 1. 2. 7 ctld change voltage (v ctld ) the ctld change voltage (v ctld ) is v8 when v do is set to ?l? after increasing v8 gradually from the initial status 1.
battery protection ic for 4-series or 5-series cell pack rev.1.2 _00 s-8205a/b series seiko instruments inc. 11 2. 8 load short circuit detection delay time (t short ) load short circuit detection delay time (t short ) is a period in which v do changes to ?l? after changing v6 to 1.5 v instantaneously, after setting s3 to on from the initial status 1. 2. 9 ctlc pin response time (t ctlc ) ctlc pin response time (t ctlc ) is a period in which v co changes to ?l? after changing v7 = v ds instantaneously from the initial status 1. 2. 10 ctld pin response time (t ctld ) ctld pin response time (t ctld ) is a period in which v do changes to ?l? after changing v8 = v ds instantaneously from the initial status 1. 3. cct pin internal resistance, cdt pin internal resistance, cit pin internal resistance, cct pin detection voltage, cdt pin detection voltage, cit pin detection voltage (test circuit 3) confirm both v co and v do are in ?h? after setting v1 = v2 = v3 = v4 = 3.5 v (s-8205a series), v1 = v2 = v3 = v4 = v5 = 3.5 v (s-8205b series), v6 = v9 = v10 = v11 = 0 v (this status is referred to as initial status 2). 3. 1 cct pin internal resistance (r cct ) the cct pin internal resistance (r cct ) can be defined by r cct = v ds / i cct by using i cct when setting v1 = 4.5 v from the initial status 2. 3. 2 cdt pin internal resistance (r cdt ) the cdt pin internal resistance (r cdt ) can be defined by r cdt = v ds / i cdt by using i cdt when setting v1 = 1.5 v from the initial status 2. 3. 3 cit pin internal resistance (r cit ) the cit pin internal resistance (r cit ) can be defined by r cit = v ds / i cit by using i cit when setting v6 = v diov + 0.015 v from the initial status 2. 3. 4 cct pin detection voltage (v cct ) the cct pin detection voltage (v cct ) is v9 when v co is set to ?l? after increasing v9 gradually, after setting v1 = 4.5 v from the initial status 2. 3. 5 cdt pin detection voltage (v cdt ) the cdt pin detection voltage (v cdt ) is v10 when v do is set to ?l? after increasing v10 gradually, after setting v1 = 1.5 v from the initial status 2. 3. 6 cit pin detection voltage (v cit ) the cit pin detection voltage (v cit ) is v11 when v do is set to ?l? after increasing v11 gradually, after setting v6 = v diov + 0.015 v from the initial status 2.
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 12 4. charger voltage for start charging 0 v battery (product with function to charge 0 v battery) (test circuit 4), battery voltage for inhibit charging 0 v battery (product with function to inhibit charging 0 v battery) (test circuit 2) 4. 1 charger voltage for start charging 0 v battery (v 0cha ) (product with function to charge 0 v battery) charger voltage for start charging 0 v battery (v 0cha ) is v12 when v co is 0.1 v or more after increasing v12 gradually after setting v1 = v2 = v3 = v4 = 0 v (s-8205a series), v1 = v2 = v3 = v4 = v5 = 0 v (s-8205b series). 4. 2 battery voltage for i nhibit charging 0 v battery (v 0inh ) (product with function to inhibit charging 0 v battery) battery voltage for inhibit charging 0 v battery (v 0inh ) is v1 when v co is set to ?l? after decreasing v1 gradually from the initial status 1. 5. ctlc pin internal resistance, ctld pin inte rnal resistance, resistance between vm and vdd, resistance between vm and vss, vc1 pin current, vc2 pin curre nt, vc3 pin current, vc4 pin current, vc5 pin current, co pin source current, co pin leakage current, do pin source current, do pin sink current (test circuit 5) set s1, s5, s6 and s7 to off, set s2 and s4 to on. set v1 = v2 = v3 = v4 = 3.5 v (s-8205a series), v1 = v2 = v3 = v4 = v5 = 3.5 v (s-8205b series), v6 = v13 = v14 = v15 = v16 = 0 v (this status is referred to as initial status 3). 5. 1 ctlc pin internal resistance (r ctlc ) in the initial status 3, the value of ctlc pin internal resistance (r ctlc ) can be defined by r ctlc = v ds / i ctlc by using i ctlc . 5. 2 ctld pin internal resistance (r ctld ) in the initial status 3, the value of ctld pin internal resistance (r ctld ) can be defined by r ctld = v ds / i ctld by using i ctld . 5. 3 resistance between vm and vdd (r vmd ) (for products with power-down function) the value of resistance between vm and vdd (r vmd ) can be defined by r vmd = v ds / i vm by using i vm when setting v1 = v2 = v3 = v4 = 1.8 v (s-8205a series), v1 = v2 = v3 = v4 = v5 = 1.8 v (s-8205b series) from the initial status 3. 5. 4 resistance between vm and vss (r vms ) the value of resistance between vm and vss (r vms ) can be defined by r vms = v ds / i vm by using i vm when setting v6 = 1.5 v, s2 to off, s1 to on from the initial status 3. 5. 5 vc1 pin current (i vc1 ), vc2 pin current (i vc2 ), vc3 pin current (i vc3 ), vc4 pin current (i vc4 ), vc5 pin current (i vc5 ) in the initial status 3, i 1 is the vc1 pin current (i vc1 ), i 2 is the vc2 pin current (i vc2 ), i 3 is the vc3 pin current (i vc3 ), i 4 is the vc4 pin current (i vc4 ), i 5 is the vc5 pin current (i vc5 ). 5. 6 co pin source current (i coh ), co pin leakage current (i col ) the co pin source current (i coh ) is i co when setting v13 = 0.5 v from the initial status 3. after that, the co pin leakage current (i col ) is i co when setting v1 = v2 = v3 = v4 = 6 v (s-8205a series), v1 = v2 = v3 = v4 = v5 = 4.8 v (s-8205b series), s4 to off, s5 to on. 5. 7 do pin source current (i doh ), do pin sink current (i dol ) the do pin source current (i doh ) is i do when setting v14 = 0.5 v, s6 to on from the initial status 3. after that, the do pin leakage current (i dol ) is i do when setting v1 = v2 = v3 = v4 = 1.8 v (s-8205a series), v1 = v2 = v3 = v4 = v5 = 1.8 v (s-8205b series), s6 to off, s7 to on, v15 = 0.5 v.
battery protection ic for 4-series or 5-series cell pack rev.1.2 _00 s-8205a/b series seiko instruments inc. 13 c 1 = 0.1 f v1 v2 v4 v3 1 vm 2 co 3 do 4 vini 5 ctlc 6 ctld 7 cct 8 16 vc2 15 vc3 14 vc4 13 vc5 12 vss 11 vdd vc1 cit 9 s-8205a cdt 10 a s2 s1 i ss s-8205b c 1 = 0.1 f v1 v2 v4 v3 1vm 2co 3do 4vini 5ctlc 6ctld 7 cct 8 16 vc2 15 vc3 14 vc4 13 vc5 12 vss 11 vdd vc1 cit 9 cdt 10 a v5 s2 s1 i ss figure 5 test circuit 1 c 1 = 0.1 f v1 v2 v4 v3 1 vm 2 co 3 do 4 vini 5 ctlc 6 ctld 7 cct 8 16 vc2 15 vc3 14 vc4 13 vc5 12 vss 11 vdd vc1 cit 9 s-8205a cdt 10 v v r 1 = 1 m v6 v7 v8 s3 v do v co c 1 = 0.1 f v1 v2 v4 v3 1vm 2co 3do 4vini 5ctlc 6ctld 7 cct 8 16 vc2 15 vc3 14 vc4 13 vc5 12 vss 11 vdd vc1 cit 9 s-8205b cdt 10 v v v5 r 1 = 1 m v6 v7 v8 v co v do s3 figure 6 test circuit 2 c 1 = 0.1 f v1 v2 v4 v3 1 vm 2 co 3 do 4 vini 5 ctlc 6 ctld 7 cct 8 16 vc2 15 vc3 14 vc4 13 vc5 12 vss 11 vdd vc1 cit 9 s-8205a cdt 10 a a a r 1 = 1 m v v v co v do v6 v9 v10 v11 i cit i cdt i cct s-8205b v5 c 1 = 0.1 f v1 v2 v4 v3 1vm 2co 3do 4vini 5ctlc 6ctld 7 cct 8 16 vc2 15 vc3 14 vc4 13 vc5 12 vss 11 vdd vc1 cit 9 cdt 10 a a a r 1 = 1 m v v v co v do v6 v9 v10 v11 i cit i cdt i cct figure 7 test circuit 3
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 14 c 1 = 0.1 f v1 v2 v4 v3 1 vm 2 co 3 do 4 vini 5 ctlc 6 ctld 7 cct 8 16 vc2 15 vc3 14 vc4 13 vc5 12 vss 11 vdd vc1 cit 9 s-8205a cdt 10 r 1 = 1 m v v co v12 s-8205b c 1 = 0.1 f v1 v2 v4 v3 1vm 2co 3do 4vini 5ctlc 6ctld 7 cct 8 16 vc2 15 vc3 14 vc4 13 vc5 12 vss 11 vdd vc1 cit 9 cdt 10 v5 r 1 = 1 m v v co v12 figure 8 test circuit 4 s-8205a c 1 = 0.1 f v1 v2 v4 v3 1 vm 2 co 3 do 4 vini 5 ctlc 6 ctld 7 cct 8 16 vc2 15 vc3 14 vc4 13 vc5 12 vss 11 vdd vc1 cit 9 cdt 10 a a a a a a a a a a i 1 i 2 i 3 i 4 i 5 i vm i co i do i ctlc i ctld v6 v13 s1 s2 s4 s5 s6 s7 v14 v15 s-8205b c 1 = 0.1 f v1 v2 v4 v3 1vm 2co 3do 4vini 5ctlc 6ctld 7 cct 8 16 vc2 15 vc3 14 vc4 13 vc5 12 vss 11 vdd vc1 cit 9 cdt 10 a a a a a a a a a a i 1 i 2 i 3 i 4 i 5 i vm i co i do i ctlc i ctld v6 v13 s1 s2 s4 s5 s6 s7 v14 v15 v5 figure 9 test circuit 5
battery protection ic for 4-series or 5-series cell pack rev.1.2 _00 s-8205a/b series seiko instruments inc. 15 ? operation remark refer to ? ? connection examples of battery protection ic ?. 1. normal status in the s-8205a/b series, both of co and do pins get the v dd level when all values of batte ry voltage are in the range of overdischarge detection voltage (v dln ) to overcharge detection voltage (v cun ), and due to the discharge current, the vini pin?s voltage is in the range of charge overcu rrent detection voltage (v ciov ) to discharge overcurrent detection voltage (v diov ). this is the normal status. at this time, the charge/discharge fets are on. 2. overcharge status in the s-8205a/b series, any voltage of t he batteries increases to the level of v cun or more, the co pin is set in high impedance. this is the overcharge stat us. the co pin is pulled down to eb ? by an external resistor so that the charge fet is turned off and it stops charging. this overcharge status is released if either condition 1 or 2 is satisfied; (1) in case that the co pin voltage is 1/50 v ds or less, and all voltages of the batteries which are v cun or more are in the level of overcharge release voltage (v cln ) or less. (2) in case that the vmp pin voltage is 1/50 v ds or more, and all voltages of the batteries are in the level of v cun or less. 3. overdischarge status in the s-8205a/b series, when any voltage of the batteries decreases to the level of v dln or less, the do pin voltage gets the v ss level. this is the overdischarge status. the discharge fet is turned off and it stops discharging. this overcharge status is released if either condition 1 or 2 is satisfied; (1) in case that the vm pin voltage is in the v ss level or less, and all voltages of the batteries are in the v dln level or more. (2) in case that the vm pin voltage is v ds /5 (typ.) or less and the vm pin voltage is in the v ss level or more, and all voltages of the batteries which are v dln or less are in the level of overdischarge release voltage (v dun ) or more. 4. power-down status (for products with power-down function) in the s-8205a/b series, when it reaches the over discharge status, the vm pin is pulled up to the v dd level by a resistor between vm and vdd pin (r vmd ). if the vm pin voltage and the co pin voltage increase to the level of v ds /5 (typ.) or more, almost every circuit in the s-8205a/b stops working so that the current consumption decreases to the level of current consumption during power down (i pdn ) or less. this is the power-down status. the power-down status is released if the following condition is satisfied. (1) the vm pin voltage gets v ds /5 (typ.) or less. (2) the co pin voltage gets v ds /5 (typ.) or less. 5. discharge overcurrent status the discharging current increases more t han a certain value. as a result, if the status in which the vini pin voltage increases to the level of v diov or more, the do pin gets the v ss level. this is the discharge overcurrent status. the discharge control fet is turned off and it stops discharging. in the status of discharge ov ercurrent, the co pin is set in high impedance. the vm pin is pulled down to the v ss level by a resistor between vm and vss pin (r vms ). s-8205a/b series has two levels for discharge overcurrent detection (v diov , v short ). the s-8205a/b series? actions against load short circuit detection voltage (v short ) are as well in v diov . the discharge overcurrent status is released if the following condition is satisfied. (1) the vm pin voltage gets v ds /10 (typ.) or less.
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 16 6. charge overcurrent status in the s-8205a/b series, the charge current increases more th an a certain value. as a result, if the status in which the vini pin voltage decreas es to the level of v ciov or less, the co pin is set in hi gh impedance. this is the charge overcurrent status. the charge control fet is turned off and it stops chargi ng. in this charge overcurrent status, do pin gets the v ss level. the vm pin is pulled-up to the v dd level by resistance between vm and vdd (r vmd ). the status of charge overcurrent is releas ed if the following condition is satisfied. (1) the co pin voltage gets 1/50 v ds (typ.) or more. 7. 0 v battery charge function in the s-8205a/b series, regarding how to charge a discharged battery (0 v battery), users are able to select either function of the two mentioned below. (1) enable to charge a 0 v battery a 0 v battery is charged when charger voltage is more than voltage for start charging 0 v battery (v 0cha ). (2) inhibit charging a 0 v battery a 0 v battery is not charged when any battery voltage is battery voltage for inhibit charging 0 v battery (v 0inh ) or less. caution when the vdd pin voltage is less than the minimum value of operation voltage between vdd and vss pin (v dsop ), the s-8205a/b series? action is not assured. 8. delay time setting in the s-8205a/b series, users are able to set delay time fo r the period; from detecting an y voltage of the batteries or detecting changes in the volta ge at the vini pin, to the out put to the co, do pin. each delay time is determined by a resistor in the ic and an external capacitor. in the overchage detection, when any voltage of the batteries gets v cun or more, the s-8205a/b starts charging to the cct pin?s capacitor (c cct ) via the cct pin?s internal resistor (r cct ). after a certain period, the co pin is set in high impedance if the voltage at the cct pin reaches the cct pin detection voltage (v cct ). this period is overcharge detection delay time (t cu ). t cu is calculated using the following equation (v ds = v1 + v2 + v3 + v4 + v5). t cu [s] = ? ln ( 1 ? v cct / v ds ) c cct [ f] r cct [m ] = ? ln ( 1 ? 0.7 (typ.)) c cct [ f] 8.31 [m ] (typ.) = 10.0 [m ] (typ.) c cct [ f] overdischarge detection delay time (t dl ), discharge overcurrent detection delay time (t diov ), charge overcurrent detection delay time (t ciov ) are calculated using the fo llowing equations as well. t dl [ms] = ? ln ( 1 ? v cdt / v ds ) c cdt [ f] r cdt [k ] t diov [ms] = ? ln ( 1 ? v cit / v ds ) c cit [ f] r cit [k ] t ciov [ms] = ? ln ( 1 ? v cit / v ds ) c cit [ f] r cit [k ] in case c cct = c cdt = c cit = 0.1 [ f], each delay time t cu , t dl , t diov , t ciov is calculated as follows. t cu [s] = 10.0 [m ] (typ.) 0.1 [ f] = 1.0 [s] (typ.) t dl [ms] = 1000 [k ] (typ.) 0.1 [ f] = 100 [ms] (typ.) t diov [ms] = 200 [k ] (typ.) 0.1 [ f] = 20 [ms] (typ.) t ciov [ms] = 200 [k ] (typ.) 0.1 [ f] = 20 [ms] (typ.) load short circuit detection delay time (t short ) is fixed internally.
battery protection ic for 4-series or 5-series cell pack rev.1.2 _00 s-8205a/b series seiko instruments inc. 17 9. ctlc and ctld pins the s-8205a/b series has two pins to control. the ctlc pin controls the co pin, the ctld pin controls the do pin. thus it is possible for users to control the co pin and do pin independently. these contro ls precede the battery protection circuit. table 6 conditions set by ctlc pin ctlc pin co pin ctlc pin voltage v ctlc high impedance open *1 high impedance ctlc pin voltage < v ctlc normal status *2 *1. pulled up by r ctlc when ctlc pin is open *2. the status is controlled by the voltage detection circuit. table 7 conditions set by ctld pin ctld pin do pin ctld pin voltage v ctld v ss level open *1 v ss level ctld pin voltage < v ctld normal status *2 *1. pulled up by r ctld when ctld pin is open *2. the status is controlled by the voltage detection circuit.
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 18 ? timing chart 1. overcharge detection and overdischarge detection v cun v dln v cln battery voltage co pin voltage do pin voltage v ss charger connection load connection status *1 (for products with power-down function) overcharge detection delay time (t cu ) <1> <2> <1> <3> <1> v ss vm pin voltage v dd v dd v eb - high-z v dd <4> v eb - <1> <3> <1> <2> <1> 1/5 v dd status *1 (for products without power-down function) overdischarge detection delay time (t dl ) (n= 1 to 5 ) *1. <1> : normal status <2> : overcharge status <3> : overdischarge status <4> : power-down status remark the charger is assumed to charge with a constant current. v eb- indicates the open voltage of the charger. figure 10
battery protection ic for 4-series or 5-series cell pack rev.1.2 _00 s-8205a/b series seiko instruments inc. 19 2. discharge overcurrent detection v cun v dun v dln (n = 1 to 5) v cln battery voltage v hc v hd v dd do pin voltage v ss high-z v dd v eb- co pin voltage v dd v ss vm pin voltage v short v ss vini pin voltage v dd v diov load connection status *1 discharge overcurrent detection delay time (t diov ) <1> <2> <1> load short circuit detection delay time (t short ) <2> high-z <1> *1. <1> : normal status <2> : discharge overcurrent status remark the charger is assumed to charge with a constant current. v eb- indicates the open voltage of the charger. figure 11
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 20 3. charge overcurrent detection v cun v dun v dln (n= 1 to 5 ) v cln battery voltage v hc v hd v dd do pin voltage v ss co pin voltage v dd v ss vm pin voltage vini pin voltage v dd v diov charger connection <3> <2> <1> <1> <2> v ss v ciov high-z <1> high-z <4> v eb- v dd v eb - load connection <3> <1> <2> <2> <1> < 1> status *1 (for products without power-down function) status *1 (for products with power-down function) discharge overcurrent detection delay time (t diov ) load short circuit detection delay time (t short ) *1. <1> : normal status <2> : charge overcurrent status <3> : overdischarge status <4> : power-down status remark the charger is assumed to charge with a constant current. v eb- indicates the open voltage of the charger. figure 12
battery protection ic for 4-series or 5-series cell pack rev.1.2 _00 s-8205a/b series seiko instruments inc. 21 ? connection examples of battery protection ic 1. s-8205a series (4-series cell) r vm 1 vm 2 co 3 do 4 vini 5 ctlc 6 ctld 7 cct 8 cdt vc5 11 vss 10 9 vc4 12 vc3 13 vc2 14 vc1 15 vdd 16 c vc1 c vc2 c vc3 c vc4 r vc4 r vc3 r vc2 r vc1 r vdd r co r sense s-8205a r ctlc r vc5 c vdd c cdt c cct cit c cit r do r vini r ctld charging fet discharging fet eb+ eb? figure 13 2. s-8205b series (5-series cell) r vm 1 vm 2 co 3 do 4 vini 5 ctlc 6 ctld 7 cct 8 cdt vc5 11 vss 10 9 vc4 12 vc3 13 vc2 14 vc1 15 vdd 16 c vc1 c vc2 c vc3 c vc4 r vc4 r vc3 r vc2 r vc1 r vdd r co r sense s-8205b r ctlc c vc5 r vc5 c vdd c cdt c cct cit c cit r do r vini r ctld charging fet discharging fet eb+ eb? figure 14
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 22 ? application circuit r vm eb+ eb? 1 vm 2 co 3 do 4 vini 5 ctlc 6 ctld 7 cct 8 cdt vc5 11 vss 10 9 vc4 12 vc3 13 vc2 14 vc1 15 vdd 16 c vc1 c vc2 c vc3 c vc4 r vc4 r vc3 r vc2 r vc1 r vdd r co charging fet r sense s-8205b ptc ctlc c vc5 r vc5 c vdd c cdt c cct discharging fet cit c cit r do r vini ptc ctld figure 15 overheat protection via ptc [for ptc, contact] murata manufacturing co., ltd. thermistor products department nagaokakyo-shi, kyoto 617-8555 japan tel +81-75-955-6863 contact us: http://www.murata.com/contact/index.html
battery protection ic for 4-series or 5-series cell pack rev.1.2 _00 s-8205a/b series seiko instruments inc. 23 table 8 constants for external components symbol typical range unit r vc1 1 0.47 to 1 *1 k r vc2 1 0.47 to 1 *1 k r vc3 1 0.47 to 1 *1 k r vc4 1 0.47 to 1 *1 k r vc5 1 0.47 to 1 *1 k r do 5.1 1 to 10 k r co 1 0.1 to 1 m r vm 5.1 3 to 10 k r ctlc 1 0.1 to 1 k r ctld 1 0.1 to 1 k r vini 1 0.1 to 1 k r sense ? 0 or higher m r vdd 100 43 to 100 *1 c vc1 0.1 0.068 to 1 *1 f c vc2 0.1 0.068 to 1 *1 f c vc3 0.1 0.068 to 1 *1 f c vc4 0.1 0.068 to 1 *1 f c vc5 0.1 0.068 to 1 *1 f c cct 0.1 0.01 or higher f c cdt 0.1 0.01 or higher f c cit 0.1 0.02 or higher f c vdd 1 0 to 10 *1 f *1. set up a filter constant to be r vdd c vdd = 68 f ? or more, and to be r vc1 c vc1 = r vc2 c vc2 = r vc3 c vc3 = r vc4 c vc4 = r vc5 c vc5 = r vdd c vdd . caution 1. the above constants may be changed without notice. 2. it is recommended that filt er constants between vdd and vss sh ould be set approximately to 100 f ? . e.g., c vdd r vdd = 1.0 f 100 = 100 f ? sufficient evaluation of transient power supply fluctuation and overcurrent protection function with the actual application is needed to determine the proper constants. contact our sales office in case the constants should be set to other than 100 f ? . 3. it has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. in addition, the example of connection shown above and the constant do not guarantee proper operation. perform thorough evaluation using the actual application to set the constant.
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 24 ? precautions ? the application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. ? batteries can be connected in any order, however, there may be cases w hen discharging cannot be performed when a battery is connected. in this case, short the vm pin and vss pin or connect the battery charger to return to the normal mode. ? if both an overcharge battery and an overdischarge battery are included among the whole batteries, the condition is set in overcharge status and overdischarge status. ther efore either charging or discharging is impossible. ? do not apply an electrostatic discharge to this ic that exceeds the performance ratings of the built-in electrostatic protection circuit. ? sii claims no responsibility for any disputes arising out of or in connection with any infringement by products including this ic of patents owned by a third party.
battery protection ic for 4-series or 5-series cell pack rev.1.2 _00 s-8205a/b series seiko instruments inc. 25 ? characteristics (typical data) 1. current consumption 1. 1 i ope vs v ds 1. 2 i ope vs ta 0 5 10 25 i ope [a] 25 15 5 0 v ds [v] 35 15 20 30 20 10 30 40 i ope [a] 25 15 5 0 35 30 20 10 40 ? 40 0 25 50 75 ta [c] ?25 85 1. 3 i pdn vs v ds 1. 4 i pdn vs ta 0 5 10 25 i pdn [a] 0.06 0.07 0.04 0.01 0.02 0.00 v ds [v] 0.09 15 20 0.08 0.05 0.03 30 0.10 i pdn [a] 0.07 0.06 0.04 0.01 0.02 0.00 0.09 0.08 0.05 0.03 0.10 ? 40 0 25 50 75 ta [c] ?25 85
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 26 2. overcharge detection / release voltage, overdischarge detection / release voltage, discharge overcurrent detection voltage, load short circuit detection voltage, charge overcurrent detection voltage 2. 1 v cu vs ta 2. 2 v cl vs ta ? 40 0 25 50 75 ta [c] ?25 85 v cu [v] 4.235 4.225 4.215 4.200 4.245 4.240 4.230 4.220 4.250 4.205 4.210 ? 40 0 25 50 75 ta [c] ?25 85 v cl [v] 4.145 4.125 4.105 4.075 4.165 4.155 4.135 4.115 4.175 4.085 4.095 2. 3 v dl vs ta 2. 4 v du vs ta v dl [v] 2.320 2.280 2.240 2.220 2.360 2.340 2.300 2.260 2.380 ? 40 0 25 50 75 ta [c] ?25 85 ? 40 0 25 50 75 ta [c] ?25 85 v du [v] 3.040 3.000 2.960 2.900 3.080 3.060 3.020 2.980 3.100 2.920 2.940 2. 5 v diov vs ta 2. 6 v short vs ta v diov [v] 0.155 0.150 0.140 0.135 0.160 0.145 0.165 ? 40 0 25 50 75 ta [c] ?25 85 ? 40 0 25 50 75 ta [c] ?25 85 v short [v] 0.540 0.500 0.460 0.400 0.580 0.560 0.520 0.480 0.600 0.420 0.440 2. 7 v ciov vs ta v ciov [v] ?0.090 ?0.100 ?0.120 ?0.130 ?0.080 ?0.110 ?0.070 ? 40 0 25 50 75 ta [c] ?25 85
battery protection ic for 4-series or 5-series cell pack rev.1.2 _00 s-8205a/b series seiko instruments inc. 27 3. cct pin internal resistance / detection voltage, cdt pin internal resistance / detection voltage, cit pin internal resistance / detection voltage and short circuit detection voltage delay time 3. 1 r cct vs ta 3. 2 v cct vs ta (v ds = 18.5 v) r cct [m ] 10.0 9.0 7.0 6.0 11.0 8.0 12.0 ? 40 0 25 50 75 ta [c] ?25 85 v cct [v] 13.0 13.1 12.9 12.7 12.6 13.2 12.8 13.3 ? 40 0 25 50 75 ta [c] ?25 85 3. 3 r cdt vs ta 3. 4 v cdt vs ta (v ds = 15.5 v) r cdt [k ] 1000 900 700 600 1100 800 1200 ? 40 0 25 50 75 ta [c] ?25 85 v cdt [v] 10.9 11.0 10.8 10.6 10.5 11.1 10.7 11.2 ? 40 0 25 50 75 ta [c] ?25 85 3. 5 r cit vs ta 3. 6 v cit vs ta (v ds = 17.5 v) r cit [k ] 200 180 140 120 220 160 240 ? 40 0 25 50 75 ta [c] ?25 85 v cit [v] 12.3 12.4 12.2 12.0 11.9 12.5 12.1 12.6 ? 40 0 25 50 75 ta [c] ?25 85 3. 7 t short vs ta t short [s] 400.0 300.0 100.0 500.0 200.0 600.0 ? 40 0 25 50 75 ta [c] ?25 85
battery protection ic for 4-series or 5-series cell pack s-8205a/b series rev.1.2 seiko instruments inc. 28 4. co pin source / leakage current, do pin source / sink current 4. 1 i coh vs v co 4. 2 i col vs v co 0 5 15 i coh [ma] v co [v] 10 20 10 6 2 0 12 8 4 14 0 5 10 25 i col [a] 0.08 0.06 0.02 0 v co [v] 15 20 0.04 30 0.10 4. 3 i doh vs v do 4. 4 i dol vs v do 0 5 15 i doh [ma] 10 6 2 0 v do [v] 10 12 8 4 20 14 0 2 4 8 i dol [ma] ?1 ?4 ?3 ?6 ?7 v do [v] 6 0 ?2 ?5 10

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www.sii-ic.com ? the information described herein is subject to change without notice. ? seiko instruments inc. is not responsible for any pr oblems caused by circuits or diagrams described herein whose related industrial properties, patents, or ot her rights belong to third parties. the application circuit examples explain typical applications of the products, and do not guarant ee the success of any specific mass-production design. ? when the products described herein are regulated produ cts subject to the wassenaar arrangement or other agreements, they may not be exported without authoriz ation from the appropriate governmental authority. ? use of the information described he rein for other purposes and/or repr oduction or copying without the express permission of seiko instrum ents inc. is strictly prohibited. ? the products described herein cannot be used as par t of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of seiko instruments inc. ? although seiko instruments inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may oc cur. the user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.

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