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power management 1 www.semtech.com sc1452 dual 150ma ldo regulator with programmable reset features applications revision: september 20, 2006 typical application circuit description the sc1452 is a state of the art device intended to provide maximum performance and flexibility in battery operated systems. it has been designed specifically to fully support a single li-ion battery and its external charger voltages. the sc1452 contains two independently enabled, ultra low dropout voltage regulators (uldos). it operates from an input voltage range of 2.25v to 6.5v, and a wide variety of output voltage options are available which are designed to provide an initial tolerance of 1% and 2% over temperature. each regulator has an associated active-low reset signal which is asserted when the voltage output declines below the preset threshold. once the output recovers, the reset continues to be asserted (delayed) for a predetermined time, 50ms for reset a and 150ms for reset b. in the case of regulator b, the delay time may be reduced by the addition of an external capacitor. the sc1452 has a bypass pin to enable the user to capacitively decouple the bandgap reference for very low output noise (down to 50vrms). the devices utilize cmos technology to achieve very low operating currents (typically 130ua with both outputs supplying 150ma). the dropout voltage is typically 155mv at 150ma, helping to prolong battery life. in addition, the devices are guaranteed to provide 400ma of peak current for applications which require high initial inrush current. they have been designed to be used with low esr ceramic capacitors to save cost and pcb area. the sc1452 comes in the low profile 10-lead msop package. ? up to 150ma per regulator output ? low quiescent current (130 a typical with both outputs at 150ma) ? low dropout voltage ? wide selection of output voltages ? stable operation with ceramic caps ? tight load and line regulation ? current and thermal limiting ? reverse input polarity protection ? <1 a off-mode current ? logic controlled enable ? active low resets valid for v in down to 0v ? programmable reset ? full industrial temperature range ? 10-pin msop package. also available in lead-free, fully weee and rohs compliant ? cellular telephones ? palmtop/laptop computers ? battery-powered equipment ? bar code scanners ? smps post regulator/dc to dc modules ? high efficiency linear power supplies ? dsp supplies 3.3v in enable output a enable output b reset b reset a 2.5v out 3.0v out u1 sc1452fims 1 2 3 4 5 6 7 8 9 10 outa outb gnd rsta rstb dlyb enb byp ena in couta 1uf cbyp 10nf cdlyb 10nf cin 1uf coutb 1uf not recommended for new design not recommended for new design
2 ? 2006 semtech corp. www.semtech.com sc1452 power management retemara pl obmy sm umixa ms tinu egatlovylppustupn iv ni 7+ot5 -v egatlovtupnielban ev ne v+ot5- ni v egnarerutarepmettneibmagnitarep ot a 58+ot04 -c egnarerutarepmetnoitcnujgnitarep ot j 521+ot04 -c erutarepmetegarot st gts 051+ot06 -c tneibmaotnoitcnujecnadepmilamreht )( retemara pl obmy ss noitidno cn i mp y tx a ms tinu ni egatlovylppustupn iv ni 52. 25 .6 v tnerructnecseiu qi q v ane v,v0= bne v= ni i, btuo roam051= v bne v,v0= ane v= ni i, atuo am051= 01 10 5 1a 002 v ane v= bne v= ni i, atuo i= btuo am051 =0 3 10 0 2a 052 v ni v,v5.6= ane v= bne )ffo(v0 =2 . 00 . 1a 5.1 btuo,atuo egatlovtuptuo )1( v tuo i tuo am1 =% 1 -v tuo %1 +v am0 + %2 -% 2+ noitalugerenil )1( ger )enil( v tuo v1+ = 21 noitalugerdaol )1( ger )daol( am1.0 03- unless specified: t a = 25c, v in = v out + 1v, i outa = i outb = 1ma, c in = c out = 1.0 f, v ena = v enb = v in . values in bold apply over full operating temperature range. absolute maximum ratings exceeding the specifications below may result in permanent damage to the device, or device malfunction. operation outside of the parameters specified in the electrical characteristics section is not implied. exposure to absolute maximum rated conditions for extended periods of time may affect device reliability. electrical characteristics not recommended for new design not recommended for new design
3 ? 2006 semtech corp. www.semtech.com sc1452 power management unless specified: t a = 25c, v in = v out + 1v, i outa = i outb = 1ma, c in = c out = 1.0 f, v ena = v enb = v in . values in bold apply over full operating temperature range. retemara pl obmy ss noitidno cn i mp y tx a ms tinu egatlovtuopord )2()1( v d i tuo am1 =1v m i tuo am05 =2 50 7v m 09 i tuo am051 =5 5 10 1 2v m 072 timiltnerru ci mil 004 am noitcejerelppi rr rs pc ,zh021=f pyb fn01 =9 5b d esionegatlovtuptu oe n i,zhk001otzh01=f tuo ,am05= c pyb c,fn01= tuo tuptuov8.1,f2.2= 7 2v smr i,zhk001otzh01=f tuo ,am05= c pyb c,fn01= tuo tuptuov3.3,f2.2= 55 pyb emitesirpu-trat st r c pyb fn01 =5 2. 1s m bne,ane dlohserhttupnielban ev hi 6.1 v v li 4.0 tnerrucsaibtupnielbane )3( i b/ane v0 v b/ane v ni 5.0 -5 .0+ a btsr,atsr dlohserhttese rv )tsr(ht v tuo gnillaf 88 09 29 v% tuo v tuo gnisir 09 29 49 yaledatese rt atsr 03 05 07 sm yaledbtese rt btsr v byld v0= 09 051 012 sm c byld fn01 =4 egatlovtuptuob,ateser )4( v ho i ecruos am5.0= 09 8 9v % tuo v lo i knis am2.1 =2 0.0 01.0 v byld dlohserhtegatlovyale dv )byld(ht 052. 1v tnerrucecruosyale di byld v btuo v< ht 1.2 0.3 9.3 a electrical characteristics (cont.) not recommended for new design not recommended for new design
4 ? 2006 semtech corp. www.semtech.com sc1452 power management timing diagrams notes: (1) low duty cycle pulse testing with kelvin connections required. (2) defined as the input to output differential at which the output drops 100mv below the value measured at a differential of 1v. not measurable on 1.5v and 1.8v outputs due to minimum v in constraints. (3) guaranteed by design. (4) v oha will be a percentage of v outa , and v ohb will be a percentage of v outb . electrical characteristics (cont.) retemara pl obmy ss noitidno cn i mp y tx a ms tinu noitcetorperutarepmetrevo levelpirthgi ht ih 05 1c siseretsy ht tsyh 0 2c unless specified: t a = 25c, v in = v out + 1v, i outa = i outb = 1ma, c in = c out = 1.0 f, v ena = v enb = v in . values in bold apply over full operating temperature range. not recommended for new design not recommended for new design
5 ? 2006 semtech corp. www.semtech.com sc1452 power management pin configuration ordering information notes: (1) where x denotes voltage options - see voltage options table. (2) only available in tape and reel packaging. a reel contains 2500 devices. (3) lead-free product. this product is fully weee and rohs compliant. srebmuntra pe gakcap rtsmix2541cs )2()1( 01-posm trtsmix2541cs )3()2()1( (top view) msop-10 xv atuo )v (v btuo )v( a8 . 18 .1 b5 . 25 .2 c8 . 28 .2 d0 . 30 .3 e3 . 33 .3 f0 . 35 .2 g0 . 38 .1 h0 . 38 .2 j3 . 35 .2 k3 . 38 .2 voltage options replace x in the part number (sc1452xims) by the letter shown below for the corresponding voltage option: #ni pe manni pn oitcnufnip 1a tu o. tuptuoarotaluger 2b tu o. tuptuobrotaluger 3d n g. nipdnuorg 4a tsr atsr.dlohserhtteserehtwolebsiatuonehwwolevitca.atuptuoroftesernorewop .dlohserhtteserehtevobasesiratuoretfa)lacipyt(sm05hgihseog 5b tsr btsr.dlohserhtteserehtwolebsibtuonehwwolevitca.btuptuoroftesernorewop cgnisudetsujdaebnac-lacipyt(sm051hgihseog byld teserehtevobasesirbtuoretfa) .dlohserht 6b yld c,roticapacagnitcennocybtesebnacemityaled.bteserrofyaledelbammargorp ,byld .emityaledtluafedehtgnisufinipsihtdnuorg.dnuorgdnanipsihtneewteb 7b ne gniebtonfiniottcennoc.tupnielbitapmocsomc.btuptuorofnipelbanehgihevitca .desu 8p yb c,roticapacfn01atcennoc.ecnereferpagdnabrofnipssapyb pyb dnanipsihtneewteb, .noitarepoesionwolrofdnuorg 9a ne gniebtonfiniottcennoc.tupnielbitapmocsomc.atuptuorofnipelbanehgihevitca .desu 0 1n i. srotalugerhtobrofniptupni pin descriptions not recommended for new design not recommended for new design
6 ? 2006 semtech corp. www.semtech.com sc1452 power management block diagram marking information # = voltage options (example: 452f) yyww = datecode (example: 0008) xxxx = lot number (example: e01102) not recommended for new design not recommended for new design
7 ? 2006 semtech corp. www.semtech.com sc1452 power management pin descriptions applications information theory of operation the sc1452 is intended for applications where very low dropout voltage, low supply current and low output noise are critical. furthermore, the sc1452, by combining two ultra low dropout (uldo) regulators, along with enable controls and power-on resets (which function is usually served by external devices), provides a very space efficient solution for multiple supply requirements. the sc1452 contains two uldos, both of which are supplied by one input supply, between in and gnd. each uldo has its own active high enable pin (ena/enb). pulling this pin low causes that specific uldo to enter a very low power shutdown state. each uldo also has its own power on reset pin (rsta/ rstb), which asserts low whenever the output voltage is below the reset threshold for that output. each reset remains asserted low until a specific delay time after the output rises back above the reset threshold. for output a, this delay time is typically 50ms. output b has a programmable reset delay. if dlyb is grounded, the reset delay will be controlled by an internal timer to 150ms. if a capacitor is connected between dlyb and gnd, a constant current, i dlyb , charges this capacitor until the delay threshold, v th(dlyb) , is reached, or the internal timer times out. see ?adjusting rstb delay time?. one advantage of on-board resets is that they remain asserted low all the way down to v in = 0v, whereas external devices may require pull-down resistors. a bypass pin (byp) is provided to decouple the bandgap reference to reduce output noise (on both outputs) and also to improve power supply rejection. the sc1452 contains an internal bandgap reference which is fed into the inverting input of two error amplifiers, one for each output. the output voltage of each regulator is divided down internally using a resistor divider and compared to the bandgap voltage. the error amplifier drives the gate of a low r ds(on) p-channel mosfet pass device. each regulator has its own current limit circuitry to ensure that the output current will not damage the device during output short, overload or start-up. the current limit is guaranteed to be greater than 400ma to allow fast charging of the output capacitor and high initial currents for dsp initialization. the sc1452 has a fast start-up circuit to speed up the initial charging time of the bypass capacitor to enable the output voltage to come up quicker. the sc1452 includes thermal shutdown circuitry to turn off the device if t j exceeds 150c (typical), with the device remaining off until t j drops by 20c (typical). reverse battery protection circuitry ensures that the device cannot be damaged if the input supply is accidentally reversed, limiting the reverse current to less than 1.5ma. adjusting rstb delay time the power on reset delay for regulator b, t rstb , can be reduced externally by connecting a capacitor to the delay time set pin dlyb. if dlyb is connected to ground, the internally controlled delay time of 150ms (typ.) will apply. referring to the block diagram, as the output of regulator b (v outb ) rises and reaches the reset threshold voltage (92% v outb(nom) ), two things happen: 1) the internal 150ms timer starts; 2) the 3a current source turns on, charging c dlyb (if connected). if dlyb is connected to ground, rstb goes high 150ms after v outb crosses the threshold voltage. if a capacitor is connected between dlyb and ground, the voltage at dlyb can be described by the following equation: an internal comparator compares this voltage to a 1.25v reference, and triggers the reset high once this voltage is reached. the delay time can be calculated by rearranging the above equation, solving for t: note that the maximum delay time is 150ms, as rstb goes high when either the internal timer or externally set timer times out, so if t rstb is set externally for 200ms, the reset delay will still be 150ms. thus for a 150ms delay, dlyb should be grounded, and for a delay time dlyb 6 dlyb c t103 v ?? = ? ? = ? ? = ? not recommended for new design not recommended for new design
8 ? 2006 semtech corp. www.semtech.com sc1452 power management applications information (cont.) less than 150ms, c dlyb can be calculated using the equation above, or read from the chart below. 0.01 0.1 1 10 100 1000 0.1 1 10 100 1000 c dlyb (nf) t rstb (ms) t rstb = 150ms max. component selection output capacitor - semtech recommends a minimum capacitance of 1f at the output with an equivalent series resistance (esr) of < 1 ? over temperature. the sc1452 has been designed to be used with ceramic capacitors, but does not have to be used with ceramic capacitors, allowing the designer a choice. increasing the bulk capacitance will further reduce output noise and improve the overall transient response. input capacitor - semtech recommends the use of a 1f ceramic capacitor at the input. this allows for the device being some distance from any bulk capacitance on the rail. additionally, input droop due to load transients is reduced, improving overall load transient response. bypass capacitor - semtech recommends the use of a 10nf ceramic capacitor to bypass the bandgap reference. increasing this capacitor to 100nf will further improve power supply rejection. c byp may be omitted if low noise operation is not required. thermal considerations the worst-case power dissipation for this part is given by: (1) for all practical purposes, equation (1) can be reduced to the following expression: (2) looking at a typical application: v in(max) = 4.2v v outa = 3v - 2% (worst case) = 2.94v v outb = 3.3v - 2% (worst case) = 3.234v i outa = i outb = 150ma t a = 85c inserting these values into equation (2) above gives us: using this figure, we can calculate the maximum thermal impedance allowable to maintain t j 125c: with the standard msop-10 land pattern shown at the end of this datasheet, and minimum trace widths, the thermal impedance junction to ambient for sc1452 is 113c/w. thus no additional heatsinking is required for the above conditions. the junction temperature can be further reduced by using larger trace widths and connecting pcb copper area to the gnd pin (pin 3), which connects directly to the device substrate. lower junction temperatures improve overall output voltage accuracy. layout considerations while layout for linear devices is generally not as critical as for a switching application, careful attention to detail will ensure reliable operation. 1) attaching the part to a larger copper footprint will enable better heat transfer from the device, especially on pcbs where there are internal ground and power planes. 2) place the input, output and bypass capacitors close to the device for optimal transient response and device behaviour. () () )max(q)max( in )max(outb ) min (outb )max( in )max(outa ) min (outa )max( in )max(d iv i vv i vv p ?+ ? ? + ? ? = () () ) max (outb ) min (outb ) max ( in ) max (outa ) min (outa ) max ( in ) max (d i v v i v v p ? ? + ? ? = ()( ) w 334 .0 145 .0 189 .0 15.0 234 .32.415.094.22.4p ) max (d = += ??+??= () () w/c120 334.0 85125 p tt ) max (d ) max (a) max (j ) max (ja = ? = ? = not recommended for new design not recommended for new design
9 ? 2006 semtech corp. www.semtech.com sc1452 power management applications information (cont.) 3) connect all ground connections directly to the ground plane. if there is no ground plane, connect to a common local ground point before connecting to board ground. typical characteristics -12 -10 -8 -6 -4 -2 0 0 25 50 75 100 125 150 i out (ma) v out deviation (mv) t j = 25c t j = -40c t j = 125c v in = v out + 1v output voltage vs. output current vs. junction temperature -12 -10 -8 -6 -4 -2 0 -50 -25 0 25 50 75 100 125 t j (c) v out deviation (mv) v in = v out + 1v top to bottom: i out = 1ma i out = 50ma i out = 100ma i out = 150ma output voltage vs. junction temperature vs. output current dropout voltage vs. output current vs. junction temperature dropout voltage vs. junction temperature vs. output current 0 25 50 75 100 125 150 175 200 -50 -25 0 25 50 75 100 125 t j (c) v d (mv) i out = 150ma i out = 50ma 0 25 50 75 100 125 150 175 200 0 25 50 75 100 125 150 i out (ma) v d (mv) top to bottom: t j = 125c t j = 25c t j = -40c 0.4 0.6 0.8 1.0 1.2 1.4 1.6 -50 -25 0 25 50 75 100 125 t j (c) v en (v) v ih @ v in = 6.5v v ih @ v in = 4v v il @ v in = 6.5v v il @ v in = 4v enable input voltage vs. junction temperature vs. input voltage not recommended for new design not recommended for new design
10 ? 2006 semtech corp. www.semtech.com sc1452 power management line regulation vs. junction temperature load regulation vs. junction temperature 0 1 2 3 4 5 6 7 8 9 10 -50 -25 0 25 50 75 100 125 t j (c) reg (line) (mv) i out = 1ma v in = v out + 1v to 5.5v v in = v out + 1v to 6.5v 0 1 2 3 4 5 6 7 8 9 10 -50 -25 0 25 50 75 100 125 t j (c) reg (load) mv v in = v out + 1v i out = 0.1ma to 150ma typical characteristics (cont.) current limit vs. junction temperature vs. input voltage off-state quiescent current vs. junction temperature quiescent current vs. junction temperature vs. output current quiescent current vs. junction temperature vs. input voltage 0.40 0.45 0.50 0.55 0.60 0.65 0.70 0.75 0.80 -50 -25 0 25 50 75 100 125 t j (c) i lim (ma) v in = 6.5v v in = 4v 0 50 100 150 200 250 300 350 400 -50 -25 0 25 50 75 100 125 t j (c) i q (na) v in = 6.5v v ena = v enb = 0v 0 25 50 75 100 125 150 175 200 -50 -25 0 25 50 75 100 125 t j (c) i q (a) v in = 6.5v i outa or i outb = 150ma i outa = i outb = 150ma 0 25 50 75 100 125 150 175 200 -50 -25 0 25 50 75 100 125 t j (c) i q (a) i outa = i outb = 150ma top to bottom: v in = 6.5v v in = 5v v in = 4v not recommended for new design not recommended for new design
11 ? 2006 semtech corp. www.semtech.com sc1452 power management typical characteristics (cont.) bypass start-up rise time vs. junction temperature vs. input voltage reset threshold voltage vs. junction temperature 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 -50 -25 0 25 50 75 100 125 t j (c) t r (ms) c byp = 10nf v in = 4v v in = 6.5v 88 89 90 91 92 93 94 -50 -25 0 25 50 75 100 125 t j (c) v th(rst) (%v out ) v out falling v out rising reset delay times vs. junction temperature delay source current and voltage threshold vs. junction temperature 0 25 50 75 100 125 150 175 200 -50 -25 0 25 50 75 100 125 t j (c) t rst (ms) t rsta t rstb , dlyb = 0v t rstb , c dlyb = 10nf v out + 1v v in 6.5v 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 -50 -25 0 25 50 75 100 125 t j (c) i dlyb (a) 1.225 1.230 1.235 1.240 1.245 1.250 1.255 1.260 1.265 1.270 1.275 v th(dlyb) (v) v out + 1v v in 6.5v v th(dlyb) i dlyb output spectral noise density vs. frequency vs. output voltage output spectral noise density vs. frequency vs. output capacitance 0.01 0.1 1 10 0.01 0.1 1 10 100 1000 f (khz) e n (v/ ) v in = v out + 1v i out = 50ma c in = 1f c byp = 10nf c out = 2.2f t j = 25c top to bottom: v out = 3.3v v out = 3.0v v out = 2.8v v out = 2.5v v out = 1.8v 0.001 0.01 0.1 1 10 0.01 0.1 1 10 100 1000 f (khz) e n (v/ ) v out = 3v v in = 4v i out = 50ma c byp = 10nf c in = 1f t j = 25c left to right: c out = 44f c out = 22f c out = 10f c out = 2.2f not recommended for new design not recommended for new design
12 ? 2006 semtech corp. www.semtech.com sc1452 power management typical characteristics (cont.) output spectral noise density vs. frequency vs. bypass capacitance output spectral noise density vs. frequency vs. output current psrr vs. frequency vs. output voltage (c byp = 10nf) psrr vs. frequency vs. output voltage (c byp = 100nf) 0.01 0.1 1 10 0.01 0.1 1 10 100 1000 f (khz) e n (v/ ) v out = 1.8v v in = 2.8v i out = 50ma c in = 1f c out = 2.2f t j = 25c c byp = 100pf c byp = 1nf c byp = 10nf c byp = 100nf c byp = 1f 0.001 0.01 0.1 1 10 0.01 0.1 1 10 100 1000 f (khz) e n (v/ ) v out = 1.8v v in = 2.8v c in = 1f c byp = 10nf c out = 2.2f t j = 25c top to bottom: i out = 150ma i out = 100ma i out = 50ma i out = 1ma 25 30 35 40 45 50 55 60 65 70 75 0.01 0.1 1 10 100 1000 f (khz) psrr (db) v in = v out + 1v c in = c out = 1f c byp = 10nf i out = 1ma t j = 25c top to bottom: v out = 1.8v v out = 2.5v v out = 2.8v v out = 3.0v v out = 3.3v 25 30 35 40 45 50 55 60 65 70 75 0.01 0.1 1 10 100 1000 f (khz) psrr (db) v in = v out + 1v c in = c out = 1f c byp = 100nf i out = 1ma t j = 25c top to bottom: v out = 1.8v v out = 2.5v v out = 2.8v v out = 3.0v v out = 3.3v not recommended for new design not recommended for new design
13 ? 2006 semtech corp. www.semtech.com sc1452 power management evaluation board schematic evaluation board gerber plots j18 gnd j17 gnd j16 gnd j15 gnd j14 gnd j13 gnd j12 gnd c2 2.2uf c5 10nf c6 10nf c4 1uf c3 2.2uf u1 sc1452xims 1 2 3 4 5 6 7 8 9 10 outa outb gnd rsta rstb dlyb enb byp ena in + c1 220uf j1 ena j2 enb j5 vin j6 outa j7 outb j8 rsta j9 rstb r4 open r3 open jp6 outb load 1 2 3 jp7 outa load 1 2 3 jp3 iq mon 1 2 j11 outa load drv j10 outb load drv jp1 outa enable 1 2 3 jp2 outb enable 1 2 3 jp5 outb load 1 2 3 jp4 outa load 1 2 3 r1 10k r2 10k j3 ripple a 12345 j4 ripple b 12345 u3 si4410 1 2 3 4 5 6 7 8 s s s gd d d d u2 si4410 1 2 3 4 5 6 7 8 s s s gd d d d r5 (1) r6 (1) en en off off 150ma 150ma short short note: (1) see table below for resistor values output voltage r (ohms) (1w) 1.8 2.5 2.8 3.0 3.3 12 16 18 20 22 top copper bottom copper not recommended for new design not recommended for new design
14 ? 2006 semtech corp. www.semtech.com sc1452 power management evaluation board bill of materials ytitnau qe cnerefe rn oitpircsed/tra pr odne vs eton 11 cv 01,f02 2s uoirav 23 c,2 cc imarecf2. 2a taru m6 1k522r7x6-24mrg 14 cc imarecf 1a taru m5 2k501r7x6-24mrg 26 c,5 cc imarecfn0 1s uoirav 22 j,1 jn iptse ts uoira ve tihw 24 j,3 jt ekcoscn bs uoira vv tuo rotinomelppir 37 j-5 jn iptse ts uoira vd er 29 j,8 jn iptse ts uoira vw olley 21 1j,01 jn iptse ts uoira ve gnaro 78 1j-21 jn iptse ts uoira vk calb 67 pj-4pj,2pj,1p jn ip3,redae hs uoirav 13 p jn ip2,redae hs uoirav 22 r,1 rk 01 ? w01/1 ,s uoirav 24 r,3 rd ecalpton 26 r,5 rc itamehcsee ss uoira vw 1 11 u smix2541cs hcetmes 23 u,2 u0 144i sy ahsiv evaluation board gerber plots (cont.) top silk screen not recommended for new design not recommended for new design
15 ? 2006 semtech corp. www.semtech.com sc1452 power management outline drawing - msop-10 land pattern - msop-10 bbb c a-b d dimensions "e1" and "d" do not include mold flash, protrusions 3. or gate burrs. datums and to be determined at datum plane controlling dimensions are in millimeters (angles in degrees). -b- notes: 1. 2. -a- -h- side view a b c d h plane 0 .010 .004 - .016 .003 .024 (.037) - .000 .030 - - - - 0.25 0.10 8 0 - 8 0.60 (.95) .032 .009 0.40 0.08 .043 .006 .037 0.75 0.00 - 0.80 0.23 - 0.95 1.10 0.15 - - - e .193 bsc .020 bsc detail aaa c seating indicator ccc c 2x n/2 tips pin 1 2x e/2 10 see detail a1 a a2 bxn d 0.25 a plane gage .003 e1 12 n .114 .114 .118 .118 .007 - 10 01 c (l1) l a 0.08 3.00 3.00 4.90 bsc 0.50 bsc .122 .122 2.90 2.90 .011 0.17 3.10 3.10 0.27 - reference jedec std mo-187 , variation ba. 4. dim ccc a1 e bbb aaa 01 l1 n l d e1 e a2 b c a millimeters nom inches dimensions min nom max min max e this land pattern is for reference purposes only. consult your manufacturing group to ensure your company's manufacturing guidelines are met. notes: 1. p (c) x z g y .063 .224 .011 .020 .098 (.161) 5.70 1.60 0.30 0.50 2.50 (4.10) millimeters dimensions dim inches y z g p x c semtech corporation power management products division 200 flynn road, camarillo, ca 93012 phone: (805)498-2111 fax (805)498-3804 contact information not recommended for new design not recommended for new design

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