sn74cbt16214 12-bit 1-of-3 fet multiplexer/demultiplexer scds008l ? may 1993 ? revised november 2001 1 post office box 655303 ? dallas, texas 75265 member of the texas instruments widebus ? family 5- ? switch connection between two ports ttl-compatible input levels description the sn74cbt16214 provides 12 bits of high-speed ttl-compatible bus switching between three separate ports. the low on-state resistance of the switch allows connections to be made with minimal propagation delay. the device operates as a 12-bit bus-select switch via the data-select (s0?s2) terminals. ordering information t a package ? orderable part number top-side marking ssop dl tube sn74cbt16214dl cbt16214 ?40 c to 85 c ssop ? dl tape and reel sn74cbt16214dlr cbt16214 tssop ? dgg tape and reel SN74CBT16214DGGR cbt16214 ? package drawings, standard packing quantities, thermal data, symbolization, and pcb design guidelines are available at www.ti.com/sc/package. production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. copyright ? 2001, texas instruments incorporated dgg or dl package (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 s0 1a 1b3 2a 2b3 3a 3b3 gnd 4a 4b3 5a 5b3 6a 6b3 7a 7b3 v cc 8a gnd 8b3 9a 9b3 10a 10b3 11a 11b3 12a 12b3 s1 s2 1b1 1b2 2b1 2b2 3b1 gnd 3b2 4b1 4b2 5b1 5b2 6b1 6b2 7b1 7b2 8b1 gnd 8b2 9b1 9b2 10b1 10b2 11b1 11b2 12b1 12b2 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. widebus is a trademark of texas instruments.
sn74cbt16214 12-bit 1-of-3 fet multiplexer/demultiplexer scds008l ? may 1993 ? revised november 2001 2 post office box 655303 ? dallas, texas 75265 function table inputs input/output function s2 s1 s0 a function l l l z disconnect l lh b1 a port = b1 port l hl b2 a port = b2 port l hh z disconnect h ll z disconnect h lh b3 a port = b3 port h hl b1 a port = b1 port h h h b2 a port = b2 port logic diagram (positive logic) 1b2 1b1 12a 1a s0 s1 s2 1b3 12b2 12b1 12b3 2 27 1 56 55 54 53 3 30 29 28
sn74cbt16214 12-bit 1-of-3 fet multiplexer/demultiplexer scds008l ? may 1993 ? revised november 2001 3 post office box 655303 ? dallas, texas 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage range, v cc ? 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i (see note 1) ? 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous channel current 128 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0) ? 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, ja (see note 2): dgg package 64 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dl package 56 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ? 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ? recommended operating conditions ? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observe d. 2. the package thermal impedance is calculated in accordance with jesd 51-7. recommended operating conditions (see note 3) min max unit v cc supply voltage 4 5.5 v v ih high-level control input voltage 2 v v il low-level control input voltage 0.8 v t a operating free-air temperature ? 40 85 c note 3: all unused control inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , literature number scba004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions min typ ? max unit v ik v cc = 4.5 v, i i = ? 18 ma ? 1.2 v i i v cc = 0, v i = 5.5 v 10 a i i v cc = 5.5 v, v i = 5.5 v or gnd 1 a i cc v cc = 5.5 v, i o = 0, v i = v cc or gnd 3 a ? i cc control inputs v cc = 5.5 v, one input at 3.4 v, other inputs at v cc or gnd 2.5 ma c i control inputs v i = 3 v or 0 4 pf c io(off) v o = 3 v or 0, s 0 , s 1 , and s 2 = gnd 7.5 pf ? v cc = 4 v, typ at v cc = 4 v v i = 2.4 v, i i = 15 ma 14 20 r on ? v i =0 i i = 64 ma 4 7 ? on v cc = 4.5 v v i = 0 i i = 30 ma 4 7 v i = 2.4 v, i i = 15 ma 6 12 ? all typical values are at v cc = 5 v (unless otherwise noted), t a = 25 c. this is the increase in supply current for each input that is at the specified ttl voltage level rather than v cc or gnd. ? measured by the voltage drop between the a and b terminals at the indicated current through the switch. on-state resistance is determined by the lower of the voltages of the two (a or b) terminals.
sn74cbt16214 12-bit 1-of-3 fet multiplexer/demultiplexer scds008l ? may 1993 ? revised november 2001 4 post office box 655303 ? dallas, texas 75265 switching characteristics over recommended operating free-air temperature range, c l = 50 pf (unless otherwise noted) (see figure 1) parameter from (input) to (output) v cc = 4 v v cc = 5 v 0.5 v unit (input) (output) min max min max t pd ? a or b b or a 0.35 0.25 ns t pd s b or a 15.3 5.5 13.9 ns t en s a or b 16 5.1 14.5 ns t dis s a or b 12.1 3.6 11.7 ns ? the propagation delay is the calculated rc time constant of the typical on-state resistance of the switch and the specified loa d capacitance, when driven by an ideal voltage source (zero output impedance). parameter measurement information v oh v ol from output under test c l = 50 pf (see note a) load circuit s1 7 v open gnd 500 ? 500 ? t plh t phl output control output waveform 1 s1 at 7 v (see note b) output waveform 2 s1 at open (see note b) t pzl t pzh t plz t phz 3 v 0 v v oh v ol 0 v v ol + 0.3 v v oh ? 0.3 v 0 v input 3 v 3.5 v voltage waveforms propagation delay times voltage waveforms enable and disable times output t pd t plz /t pzl t phz /t pzh open 7 v open test s1 notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 ? , t r 2.5 ns, t f 2.5 ns. d. the outputs are measured one at a time with one transition per measurement. e. t plz and t phz are the same as t dis . f. t pzl and t pzh are the same as t en . g. t plh and t phl are the same as t pd . 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v figure 1. load circuit and voltage waveforms
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