1/9 data briefing february 2005 for further information contact your local st sales office. upsd34xx turbo plus series fast turbo 8032 mcu with usb and programmable logic features summary fast 8-bit turbo 8032 mcu, 40mhz ? advanced core, 4-clocks per instruction ? 10 mips peak performance at 40mhz (5v) ? jtag debug and in-system programming ? 16-bit internal instruction path fetches double-byte instruction in a single memory cycle ? branch cache & 4 instruction prefetch queue ? dual xdata pointers with automatic increment and decrement ? compatible with 3rd party 8051 tools dual flash memories with memory management ? place either memory into 8032 program address space or data address space ? read-while-write operation for in- application programming and eeprom emulation ? single voltage program and erase ? 100k guaranteed erase cycles, 15-year retention clock, reset, and power supply management ? sram is battery backup capable ? flexible 8-level cpu clock divider register ? normal, idle, and power down modes ? power-on and low voltage reset supervisor ? programmable watchdog timer programmable logic, general purpose ? 16 macrocells for logic applications (e.g., shifters, state machines, chip-selects, glue-logic to keypads, and lcds) a/d converter ? eight channels, 10-bit resolution, 6s figure 1. packages communication interfaces ? usb v2.0 full speed (12mbps) 10 endpoint pairs (in/out), each endpoint with 64-byte fifo (supports control, intr, and bulk transfer types) ?i 2 c master/slave controller, 833khz ? spi master controller, 1mhz ? two uarts with independent baud rate ? irda potocol: up to 115 kbaud ? up to 46 i/o, 5v tolerant upsd34xxv timers and interrupts ? three 8032 standard 16-bit timers ? programmable counter array (pca), six 16-bit modules for pwm, capcom, and timers ? 8/10/16-bit pwm operation ? 12 interrupt sources with two external interrupt pins operating voltage source (10%) ? 5v devices: 5.0v and 3.3v sources ? 3.3v devices: 3.3v source tqfp52 (t), 52-lead, thin, quad, flat tqfp80 (u), 80-lead, thin, quad, flat obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s)
upsd34xx 2/9 table 1. device summary note: operating temperature is in the industrial range (?40c to 85c). summary description the turbo plus upsd34xx series combines a powerful 8051-based microcontroller with a flexi- ble memory structure, programmable logic, and a rich peripheral mix to form an ideal embedded controller. at its core is a fast 4-cycle 8032 mcu with a 4-byte instruction prefetch queue (pfq) and a 4-entry fully associative branching cache (bc). the mcu is connected to a 16-bit internal instruc- tion path to maximize performance, enabling loops of code in smaller localities to execute extremely fast. the 16-bit wide instruction path in the turbo plus series allows double-byte instructions to be fetched from memory in a single memory cycle. this keeps the average performance near its peak performance (peak performance for 5v, 40mhz turbo plus upsd34xx is 10 mips for single-byte instructions, and average performance will be ap- proximately 9 mips for mix of single- and multi- byte instructions). usb 2.0 (full speed, 12mbps) is included, provid- ing 10 endpoints, each with its own 64-byte fifo to maintain high data throughput. endpoint 0 (con- trol endpoint) uses two of the 10 endpoints for in and out directions, the remaining eight endpoints may be allocated in any mix to either type of trans- fers: bulk or interrupt. code development is easily managed without a hardware in-circuit emulator by using the serial jtag debug interface. jtag is also used for in- system programming (isp) in as little as 10 sec- onds, perfect for manufacturing and lab develop- ment. the 8032 core is coupled to programmable system device (psd) architecture to optimize the 8032 memory structure, offering two independent banks of flash memory that can be placed at vir- tually any address within 8032 program or data ad- dress space, and easily paged beyond 64k bytes using on-chip programmable decode logic. dual flash memory banks provide a robust solu- tion for remote product updates in the field through in-application programming (iap). dual flash banks also support eeprom emulation, eliminat- ing the need for external eeprom chips. general purpose programmable logic (pld) is in- cluded to build an endless variety of glue-logic, saving external logic devices. the pld is config- ured using the software development tool, psd- soft express, available from the web at www.st.com/psm , at no charge. the upsd34xx also includes supervisor functions such as a programmable watchdog timer and low- voltage reset. part number max mhz 1st flash (bytes) 2nd flash sram gpio 8032 bus v cc v dd pkg. upsd3422e-40t6 40 64k 32k 4k 35 no 3.3v 5.0v tqfp52 upsd3422ev-40t6 40 64k 32k 4k 35 no 3.3v 3.3v tqfp52 upsd3422e-40u6 40 64k 32k 4k 46 yes 3.3v 5.0v tqfp80 upsd3422ev-40u6 40 64k 32k 4k 46 yes 3.3v 3.3v tqfp80 upsd3433e-40t6 40 128k 32k 8k 35 no 3.3v 5.0v tqfp52 upsd3433ev-40t6 40 128k 32k 8k 35 no 3.3v 3.3v tqfp52 upsd3433e-40u6 40 128k 32k 8k 46 yes 3.3v 5.0v tqfp80 upsd3433ev-40u6 40 128k 32k 8k 46 yes 3.3v 3.3v tqfp80 upsd3434e-40t6 40 256k 32k 8k 35 no 3.3v 5.0v tqfp52 upsd3434ev-40t6 40 256k 32k 8k 35 no 3.3v 3.3v tqfp52 upsd3434e-40u6 40 256k 32k 8k 46 yes 3.3v 5.0v tqfp80 upsd3434ev-40u6 40 256k 32k 8k 46 yes 3.3v 3.3v tqfp80 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s)
3/9 upsd34xx figure 2. block diagram pa0:7 pb0:7 pd1:2 pc0:7 mcu bus p4.0:7 p1.0:7 p3.0:7 upsd34xx system bus dedicated pins supervisor: watchdog and low-voltage reset 1st flash memory: 64k, 128k, or 256k bytes 2nd flash memory: 32k bytes sram: 4k or 8k bytes programmable decode and page logic general purpose programmable logic, 16 macrocells (8) gpio, port a (80-pin only) (8) gpio, port b (4) gpio, port c (2) gpio, port d jtag ice and isp 8032 address/data/control bus (80-pin device only) v cc , v dd , gnd, reset, crystal in turbo 8032 core pfq & bc (3) 16-bit timer/ counters (2) external interrupts i 2 c spi (8) 10-bit adc uart0 (8) gpio, port 1 (8) gpio, port 3 (8) gpio, port 4 usb+, usb? usb v2.0, full speed 10 fifos uart1 optional irda encoder/decoder 16-bit pca (6) pwm, capcom, timer ai09695 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s)
upsd34xx 4/9 pin descriptions figure 3. tqfp52 connections note: 1. for 5v applications, v dd must be connected to a 5.0v source. for 3.3v applications, v dd must be connected to a 3.3v source. 2. these signals can be used on one of two different ports (port 1 or port 4) for flexibility. default is port1. 3. av ref and 3.3v av cc are shared in the 52-pin package only. adc channels must use 3.3v as av ref for the 52-pin package. 39 p1.5/spirxd (2) /adc5 38 p1.4/spiclk (2) /adc4 37 p1.3/txd1(irda) (2) /adc3 36 p1.2/rxd1(irda) (2) /adc2 35 p1.1/t2x (2) /adc1 34 p1.0/t2 (2) /adc0 33 v dd (1) 32 xtal2 31 xtal1 30 p3.7/scl 29 p3.6/sda 28 p3.5/c1 27 p3.4/c0 pd1/clkin pc7 jtag tdo jtag tdi debug 3.3v v cc usb+ v dd (1) gnd usb? pc2/v stby jtag tck jtag tms 1 2 3 4 5 6 7 8 9 10 11 12 13 52 51 50 49 48 47 46 45 44 43 42 41 40 pb0 pb1 pb2 pb3 pb4 av cc /v ref (3) pb5 gnd reset_in pb6 pb7 p1.7/spisel (2) /adc7 p1.6/spitxd (2) /adc6 14 15 16 17 18 19 20 21 22 23 24 25 26 spisel (2) /pcaclk1/p4.7 spitxd (2) /tcm5/p4.6 spirxd (2) /tcm4/p4.5 spiclk (2) /tcm3/p4.4 txd1(irda) (2) /pcaclk0/p4.3 gnd rxd1(irda) (2) /tcm2/p4.2 t2x (2) /tcm1/p4.1 t2 (2) /tcm0/p4.0 rxd0/p3.0 txd0/p3.1 extint0/tg0/p3.2 extint1/tg1/p3.3 ai09696 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s)
5/9 upsd34xx figure 4. tqfp80 connections note: nc = not connected note: 1. the usb+ pin needs a 1.5k ? pull-up resistor. 2. for 5v applications, v dd must be connected to a 5.0v source. for 3.3v applications, v dd must be connected to a 3.3v source. 3. these signals can be used on one of two different ports (port 1 or port 4) for flexibility. default is port1. 60 p1.5/spirxd (3) /adc5 59 p1.4/spiclk (3) /adc4 58 p1.3/txd1(irda) (3) /adc3 57 nc 56 p1.2/rxd1(irda) (3) /adc2 55 nc 54 p1.1/t2x (3) /adc1 53 nc 52 p1.0/t2 (3) /adc0 51 nc 50 v dd (1) 49 xtal2 48 xtal1 47 mcu ad7 46 p3.7/scl 45 mcu ad6 44 p3.6/sda 43 mcu ad5 42 p3.5/c1 41 mcu ad4 pd2/csi p3.3/tg1/exint1 pd1/clkin ale pc7 jtag tdo jtag tdi debug pc4/terr 3.3v v cc usb+ (1) v dd (2) gnd usb? pc3/tstat pc2/v stby jtag tck spisel (2) /pcaclk1/p4.7 spitxd (2) /tcm5/p4.6 jtag tms 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 pb0 p3.2/exint0/tg0 pb1 p3.1/txd0 pb2 p3.0/rxd0 pb3 pb4 av cc pb5 v ref gnd reset_in pb6 pb7 rd p1.7/spisel (3) /adc7 psen wr p1.6/spitxd (3) /adc6 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 pa7 pa6 spirxd (2) /tcm4/p4.5 pa5 spiclk (2) /tcm3/p4.4 pa4 txd1(irda) (2) /pcaclk0/p4.3 pa3 gnd rxd1(irda) (2) /tcm2/p4.2 t2x (2) /tcm1/p4.1 pa2 t2 (2) /tcm0/p4.0 pa1 pa0 mcu ad0 mcu ad1 mcu ad2 mcu ad3 p3.4/c0 ai09697 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s)
upsd34xx 6/9 table 2. major parameters note: 1. operating current is measured while the upsd34xx is executing a typical program at 40mhz. parameter test conditions/comments 5.0v value 3.3v value unit operating voltage ? 4.5 to 5.5 (psd); 3.0 to 3.6 (mcu) 3.0 to 3.6 (psd and mcu) v operating temperature ? ?40 to 85 ?40 to 85 c mcu frequency 8mhz (min) for i 2 c 3 min, 40 max 3 min, 40 max mhz operating current, typical (1) (20% of pld used; 25c operation. bus control signals are blocked from the pld in non- turbo mode.) 40mhz crystal, turbo 79 63 ma 40mhz crystal, non-turbo 71 58 ma 8mhz crystal, turbo 32 24 ma 8mhz crystal, non-turbo 17.7 14 ma idle current, typical (20% of pld used; 25c operation) 40mhz crystal divided by 2048 internally. all interfaces are disabled. 19 18 ma standby current, typical power-down mode needs reset to exit. 140 120 a sram backup current, typical if external battery is attached. 0.5 0.5 a i/o sink/source current, ports a, b, c, and d v ol = 0.45v (max); v oh = 2.4v (min) i ol = 8 (max); i oh = ?2 (min) i ol = 4 (max); i oh = ?1 (min) ma i/o sink/source current, port 4 v ol = 0.6v (max); v oh = 2.4v (min) i ol = 10 (max); i oh = ?10 (min) i ol = 10 (max); i oh = ?10 (min) ma pld macrocells for registered or combinatorial logic 16 16 ? pld inputs inputs from pins, feedback, or mcu addresses 69 69 ? pld outputs output to pins or internal feedback 18 18 ? pld propagation delay, typical, turbo mode pld input to output 15 22 ns obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s)
7/9 upsd34xx part numbering table 3. ordering information scheme for other options, or for more information on any aspect of this device, please contact the st sales office nearest you. example: upsd 34 3 4 e v ? 40 u 6 t device type upsd = microcontroller psd family 34 = turbo plus core sram size 2 = 4kbyte 3 = 8kbyte main flash memory size 2 = 64kbyte 3 = 128kbyte 4 = 256kbyte ip mix e = ip mix: usb, i 2 c, spi, uart (2), irda, adc, supervisor, pca operating voltage blank = v cc = 4.5 to 5.5v v = v cc = 3.0 to 3.6v speed ?40 = 40mhz package t = 52-pin tqfp u = 80-pin tqfp temperature range 6 = ?40 to 85c shipping optio n tape & reel packing = t obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s)
upsd34xx 8/9 revision history table 4. document revision history date version revision details 08-nov-2004 1.0 first edition 07-feb-2005 2.0 updated from v1.0 full datasheet obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s)
9/9 upsd34xx information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s)
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