digital multi - phase buck controller chl8203 / 12 / 13 / 14 october 1 3 , 2011 | final | v1. 3 1 features ? dual output 2/ 3/4+1 - phase pwm controller (chl8 21 2/ 1 3/ 14 ) and s ingle output 3 - phase pwm controller (chl8 20 3) ? easiest layout and fewest pins in the industry ? footprint compatible with chl8225 (chl8213/14) for analog and power signals ? up to 3 vid select lines for dynamic voltage transitions ? slow ocp for thermal design current (tdc) protection ? programmable i critical signal ? i2c interface for configuration & telem etry ? pin programmable i2c address (chl8203/13/14) ? overclocking support with i2c voltage override and vmax setting ? flexible i2c bus security features ? i2c security enable pin (chl8203/13/14) ? independent loop switching frequencies from 200khz to 1.2mhz per phase ? ir efficiency shaping with dynamic phase control (dpc) ? 1 - phase & active diode emulation modes for light load efficiency ? ir adaptive transient algorithm (ata) on both loops minimizes output bulk capacitors and system cost ? per - loop fault protection: ovp, uvp, ocp ? thermal protection (otp) and vrhot# flag (chl8203/13/14) ? multiple time programmable (mtp) memory for custom configuration ? compatible with ir atl and 3.3v tri - state drivers ? 3.3v +10%/ - 15% supply voltage; 0oc to 85oc operation ? pb - free, rohs, q fn package s applications ? multi - phase gpu s ystems ? gddr m emory description the chl8212/13/14 are dual - loop digital multi - phase buck controllers and the chl8203 is a single - loop digital multiphase buck controller designed for gpu voltage regulation. dynamic voltage control is provided by registers which are programmed through i2c and then selected using a 3 - bit parallel bus for fast access. the chl8203/12/13/14 include ir efficiency shaping technology to deliver exceptional efficiency at minimum cost across the entire load range. ir dynamic phase control adds/drops active phases based upon load current and can be configured to enter 1 - phase operation and diode emulation mode automatically or by command. ir s unique adaptive transient algorithm (ata), b ased on proprietary non - linear digital pwm algorithms, minimizes output bulk capacitors and multiple time programmable (mtp) storage saves pins and enables a small package size. device configuration and fault parameters are easily defined using the ir digi tal power design center ( dpdc ) gui and stored in on - chip mtp. the chl8203/12/13/14 provides extensive ovp, uvp, ocp and otp fault protection and the chl8203/13/14 includes thermistor based temperature sensing with vrhot signal. the chl8203/12/13/14 includ es numerous features like register diagnostics for fast design cycles and platform differentiation, truly simplifying vrd design and enabling fastest time - to - market (ttm) with set - and - forget methodolog y . pin diagram figure 1 : chl8213/14 package top view s m b _ d a t p w m _ l 2 e n a b l e v r t n r c s m i s e n _ l 2 i s e n 4 1 / n c 2 i s e n 3 v s e n s m b _ c l k p w m 4 1 / n c 2 i r t n 3 i r t n 4 1 / n c 2 i r t n _ l 2 r c s p t s e n v r h o t # p w m 3 a d d r / p r o t e c t v 1 8 a r r e s v c c i s e n 2 i s e n 1 i r t n 1 i r t n 2 p w m 2 p w m 1 r c s m _ l 2 r c s p _ l 2 v i d s e l 0 v i d s e l 1 v i d s e l 2 v p g m v i n s e n v r t n _ l 2 v s e n _ l 2 1 2 7 8 5 6 3 4 1 0 9 3 0 2 9 2 4 2 3 2 6 2 5 2 8 2 7 2 1 2 2 4 1 g n d c h l 8 2 1 3 / 1 4 4 0 p i n 6 x 6 q f n t o p v i e w 1 2 1 6 1 4 1 9 1 3 1 7 1 5 2 0 1 8 1 1 3 9 3 5 3 7 3 2 3 8 3 4 3 6 3 1 3 3 4 0 1 c h l 8 2 1 4 2 c h l 8 2 1 3 v r r d y 1 v r r d y 2 t s e n 2
digital multi - phase buck controller chl8203 / 12 / 13 / 14 october 1 3 , 2011 | final | v1. 3 2 ordering information chl8 2 ? ? D ? ? ? ? ? figure 2: chl8203 package top view package tape & reel qty part number qfn 3000 chl8203 - 00crt 1 qfn 3000 chl8203 - xxcrt 2 qfn 3000 chl8212 - 00crt 1 qfn 3000 chl8212 - xxcrt 2 qfn 3000 chl8213 - 00crt 1 qfn 3000 chl8213 - xxcrt 2 qfn 3000 chl8214 - 00crt 1 qfn 3000 chl8214 - xxcrt 2 notes: 1. for unprogrammed/default parts, use configuration file 00. unprogrammed parts will not start up until programmed in order to insure a safe power up . 2. - xx indicates a customer specific configuration file. figure 3: chl8212 package top view t C tape and reel r C package type: qfn c C commercial operating temperature xx C configuration file part number: 03: chl8203 12: chl8212 13: chl8213 14: chl8214 e n a b l e p w m 1 v p g m i r t n 3 i s e n 2 v r t n a d d r / p r o t e c t s m b _ c l k v r r d y i r t n 2 r c s p t s e n v 1 8 a v i d s e l 0 v r h o t # r r e s p w m 3 i s e n 1 r c s m i r t n 1 s m b _ d a t v c c i s e n 3 v i d s e l 1 v i d s e l 2 v i n s e n v s e n p w m 2 1 2 6 5 3 4 7 2 1 2 0 1 6 1 7 1 9 1 8 1 5 2 9 g n d c h l 8 2 0 3 2 8 p i n 5 x 5 q f n t o p v i e w 8 1 0 1 4 9 1 2 1 1 1 3 2 8 2 4 2 6 2 2 2 7 2 5 2 3 s m b _ d a t p w m _ l 2 v p g m i r t n _ l 2 i s e n 2 v r t n s m b _ c l k p w m 2 v r r d y i r t n 2 i s e n _ l 2 r c s m v 1 8 a v i d s e l 0 e n a b l e r r e s v c c i s e n 1 r c s p i r t n 1 p w m 1 r c s m _ l 2 r c s p _ l 2 v i d s e l 1 v i d s e l 2 v i n s e n v s e n v s e n _ l 2 1 2 6 5 3 4 7 2 1 2 0 1 6 1 7 1 9 1 8 1 5 2 9 g n d c h l 8 2 1 2 2 8 p i n 5 x 5 q f n t o p v i e w 8 1 0 1 4 9 1 2 1 1 1 3 2 8 2 4 2 6 2 2 2 7 2 5 2 3
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