document number: 83629 www.vishay.com revision 17-august-01 2?48 features high input sensitivity i ft =2.0 ma 600/800 v blocking voltage 300 ma on-state current high static dv/dt 10 kv/ s inverse parallel scrs provide commutating dv/dt >10 kv/ s very low leakage <10 a isolation test voltage from double molded package 5300 v rms small 6-pin dip package underwriters lab file #e52744 vde app roval #0884 available with option 1 maximum ratings emitter reverse voltage ...................................................6.0 v forward current ................................................ 60 ma surge current ...................................................... 2.5 a power dissipation............................................100 mw derate from 25 c ......................................1.33 mw/ c detector peak off-state voltage il420 ................................................................600 v IL4208 ..............................................................800 v rms on-state current..................................... 300 ma single cycle surge current................................. 3.0 a total power dissipation ...................................500 mw derate from 25 c ........................................6.6 mw/ c package isolation test voltage (between emitter and detector, climate per din 50014, part 2, nov. 74, t=1.0 sec.) ..................... 5300 v rms pollution degree (din vde 0109) .............................. 2 creepage distance ....................................... 7.0 mm clearance ...................................................... 7.0 mm comparative tracking index per din iec 112/vde 0303 part 1, group iiia per din vde 6110.................................................. 175 isolation resistance v io =500 v, t a =25 c ................................... 10 12 ? v io =500 v, t a =100 c ................................. 10 11 ? storage temperature range .............?5 c to +150 c ambient temperature range ............?5 c to +100 c soldering temperature (max. 10 sec.dip soldering 0.5 mm from case bottom)............260 c v de description the il420/4208 consists of a gaas irled optically coupled to a photo- sensitive non-zero crossing triac network. the triac consists of two inverse parallel connected monolithic scrs. these three semiconduc- tors are assembled in a six pin 0.3 inch dual in-line package, using high insulation double molded, over/under leadframe construction. high input sensitivity is achieved by using an emitter follower pho- totransistor and a cascaded scr predriver resulting in an led trigger current of less than 2.0 ma (dc). the il420/4208 uses two discrete scrs resulting in a commutating dv/dt of greater than 10 kv/ s. the use of a proprietary dv/dt clamp results in a static dv/dt of greater than 10 kv/ s. this clamp circuit has a mosfet that is enhanced when high dv/dt spikes occur between mt1 and mt2 of the triac. when conducting, the fet clamps the base of the phototransistor, disabling the ?st stage scr predriver. the 600/800 v blocking voltage permits control of off-line voltages up to 240 vac, with a safety factor of more than two, and is suf?ient for as much as 380 vac. the il420/4208 isolates low-voltage logic from 120, 240, and 380 vac lines to control resistive, inductive, or capacitive loads including motors, solenoids, high current thyristors or triac and relays. applications include solid-state relays, industrial controls, of?e equip- ment, and consumer appliances. .008 (.20) .012 (.30) .130 (3.30) .150 (3.81) .130 (3.30) .150 (3.81) .033 (0.84) typ. .300 (7.62) typ. .033 (0.84) typ. .100 (2.54) typ. .018 (0.46) .020 (0.51) .048 (1.22) .052 (1.32) .248 (6.30) .256 (6.50) .335 (8.50) .343 (8.70) 6 5 4 1 2 3 18 3 ? .300?347 (7.62?.81) 4 typ. 1 2 3 6 5 4 nc .039 (1.00) min. pin one id triac mt2 triac mt1 substrate do not connect led anode led cathode dimensions in inches (mm) 600 v il420 800 v IL4208 triac optocoupler
document number: 83629 www.vishay.com revision 17-august-01 2?49 characteristics parameter symbol min. typ. max. unit condition emitter forward voltage v f 1.16 1.35 v i f =10 ma reverse current i r 0.1 10 a v r =6.0 v capacitance c o 40 pf v f =0 v, f=1.0 mhz thermal resistance, junction to ambient r thja 750 k/w detector off-state voltage il420 v d(rms) 424 460 v i d(rms) =70 a IL4208 565 repetitive peak off-state voltage il420 v drm 600 vi drm =100 s IL4208 800 off-state current i d (rms) 10 100 a v d = v drm , t a =100 c on-state voltage v tm 1.7 3.0 v i t =300 ma on-state current i tm 300 ma pf=1.0, v t(rms) =1.7 v surge (non-repetitive) on-state current i tsm 3.0 a f=50 hz holding current i h 65 500 a latching current i l 5.0 ma v t =2.2 v led trigger current i ft 1.0 2.0 v ak =5.0 v trigger current temperature gradient ? i ft / ? t j 7.0 14 a/k turn-on time t on 35 sv rm =v dm = v d(rms) turn-off time t off 50 pf=1.0, i t =300 ma critical state of rise of off-state voltage dv/dt cr 10000 v/ s v d =0.67 v drm , t j =25 c 5000 v d =0.67 v drm , t j =80 c critical rate of rise of voltage at current commutation dv/dt crq 10000 v d =0.67 v drm , di/dt crq 15 a/ms t j =25 c 5000 v d =0.67 v drm , di/dt crq 15 a/ms t j =80 c critical state of rise of on-state current di/dt cr 8.0 a/ s thermal resistance, junction to ambient r thja 150 k/w package critical rate of rise of coupled input/output voltage dv (io) /dt 5000 v / si t =0 a, v rm =v dm = v d(rms) package capacitance c lo 0.8 pf f=1.0 mhz, v io = 0 v common mode coupling capacitance c cm 0.01 pf isolation resistance r is 10 12 ? v io =500, t a =25 c 10 11 v io =500, t a =100 c
document number: 83629 www.vishay.com revision 17-august-01 2?50 figure 1. forward voltage versus forward current figure 2. peak led current versus duty factor, tau figure 3. maximum led power dissipation 100 10 1 .1 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 if - forward current - ma vf - forward voltage - v ta = -55? ta = 25? ta = 85? 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 100 1000 10000 t - led pulse duration - s if(pk) - peak led current - ma .005 .05 .02 .01 .1 .2 .5 duty factor t df = /t 100 80 60 40 20 0 -20 -40 -60 0 50 100 150 ta - ambient temperature - c p - led power - mw led figure 4. typical output characteristics i t =f( v t ), parameter: t j figure 5. current reduction i trms =f( t a ) r th ja =150 k/w device switch is soldered in pcb or base plate figure 6. current reduction i trms =f(t pin5 ), r thj =16.5 k/w thermocouple measurement must be performed potentially separated to a1 and a2. measuring junction to be as near as possible at case.
document number: 83629 www.vishay.com revision 17-august-01 2?51 figure 7. typical trigger delay time t gd =f( i f / i ft25 c ), v d =200 v, parameter: t j figure 8. typical off-state current i d =f( t j ), v d =600 v, parameter: t j figure 9. power dissipation for 40 to 60 hz line operation, p tot =f(i trms ) figure 10. pulse trigger current i ftn =f(t pif )i ftn normalized to i ft , referring to t pif 1.0 ms, v op =200 v, f=40 to 60 hz typ.
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