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| power management 1 www.semtech.com sc1175 low power dual synchronous dc/dc controller with current sharing circuitry description features applications revision: september 22, 2004 the sc1175 is a versatile 2 phase, synchronous, volt- age mode pwm controller that may be used in two dis- tinct ways. first, the sc1175 is ideal for applications where point of use output power exceeds any single in- put power budget. alternatively, the sc1175 can be used as a dual switcher. the sc1175 features a temperature compensated voltage reference, over current protection with 50% fold-back and internal level-shifted, high-side drive circuitry. in current sharing configuration, the sc1175 can pro- duce a single output voltage from two separate voltage sources (which can be different voltage levels) while maintaining current sharing between the channels. cur- rent sharing is programmable to allow loading each input supply as required by the application. in dual switcher configuration, two feedback paths are provided for independent control of the separate out- puts. the device will provide a regulated output from flexibly configured inputs (3.3v, 5v, 12v), provided 5v is present for v cc . the two switchers are 180 out of phase to minimize input and output ripple. ? 300khz fixed frequency operation ? soft start and enable function ? power good output provided ? over current protection with 50% fold-back ? phase-shifted switchers minimize ripple ? high efficiency operation, >90% ? programmable output(s) as low as 1.25v ? industrial temperature range ? 20 pin soic or tssop package two phase, current sharing controller ? flexible, same or separate v in ? programmable current sharing ? combined current limit with fold-back ? 2 phases operating opposed for ripple reduction ? thermal distribution via multi-phase output two independent pwm controllers ? flexible, same or separate v in ? independent control for each channel ? independent and separate current limit ? 2 phases operating opposed for ripple reduction (if same v in used) ? graphics cards ? ddr memory ? peripheral add-in card ? sstl termination ? dual-phase power supply ? power supplies requiring two outputs
2 ? 2004 semtech corp. www.semtech.com sc1175 power management 2 channels with current sharing typical application circuit 3 ? 2004 semtech corp. www.semtech.com sc1175 power management electrical characteristics r e t e m a r a ps n o i t i d n o cn i mp y tx a ms t i n u e g a t l o v t u p t u oi o a 2 = ) 1 ( v , t u o v 5 7 . 2 o t t e s5 6 . 25 7 . 25 8 . 2v e g a t l o v y l p p u sv c c 2 . 45 1v t n e r r u c y l p p u sv c c 0 . 5 =0 1a m e c n e r e f e r 5 7 3 2 . 15 2 . 15 2 6 2 . 1v n o i t a l u g e r d a o li o a 5 1 o t a 3 . 0 = ) 1 ( 1% n o i t a l u g e r e n i l e c n e r e f e rv 5 5 ? 2004 semtech corp. www.semtech.com sc1175 power management expanded pin description expanded pin description expanded pin description expanded pin description expanded pin description pin 1: pin 1: pin 1: pin 1: pin 1: (vref) internal 1.25v reference connected to the + input of the master channel error amplifier. pin 2: pin 2: pin 2: pin 2: pin 2: (+in) + input of slave channel error amplifier. connected to 1.25v reference (pin 1) for the two independent channel configuration. pin 3, 18: pin 3, 18: pin 3, 18: pin 3, 18: pin 3, 18: (-in2, -in1) - inputs of close loop error amplifiers. works as a feedback inputs (for both modes). pin 4: pin 4: pin 4: pin 4: pin 4: (vcc) vcc chip supply voltage. 15v maximum, 10ma typical. needs a 1f ceramic multilayer decoupling capacitor to gnd (pin 20). pin 5, 6, pin 5, 6, pin 5, 6, pin 5, 6, pin 5, 6, 1 1 1 1 1 5, 1 5, 1 5, 1 5, 1 5, 1 6: 6: 6: 6: 6: (cl2-, cl2+, cl1+, cl1-) pins (-) and (+) of the current limit amplifiers for both channels. connected to output current sense resistors. com- pares that sense voltage to internal 75mv reference. needs rc filter for noise rejection. pin 7, 14: pin 7, 14: pin 7, 14: pin 7, 14: pin 7, 14: (bst2, bst1) bst signal. supply for high side driver. can be connected to a high enough voltage source. usually connected to bootstrap circuit. pin 8, 13: pin 8, 13: pin 8, 13: pin 8, 13: pin 8, 13: (dh2, dh1) dh signal (drive high). gate drive for top mosfets. requires a small series resistor. pin 9, 12: pin 9, 12: pin 9, 12: pin 9, 12: pin 9, 12: (dl2, dl1) dl signal (drive low). gate drive for bottom mosfets. requires a small series resistor. pin 10: pin 10: pin 10: pin 10: pin 10: (pgnd) power gnd. return of gate drive currents. pin 11: pin 11: pin 11: pin 11: pin 11: (bstc) supply for bottom mosfets gate drive. pin 1 pin 1 pin 1 pin 1 pin 1 7 7 7 7 7 : : : : : (ss/ena) soft start pin. internal current source connected to external capacitor. inhibits the chip if pulled down. pin 19: pin 19: pin 19: pin 19: pin 19: (pwrgd) power good signal. open collector signal . turns to 0 if output voltage is outside the power good window. pin 20: pin 20: pin 20: pin 20: pin 20: (gnd) analog gnd. e c i v e d ) 1 ( e g a k c a p r t . w s c 5 7 1 1 c s0 2 - c i o s t r t w s c 5 7 1 1 c s ) 2 ( r t . s t 5 7 1 1 c s0 2 - p o s s t t r t s t 5 7 1 1 c s ) 2 ( 1 - b v e 5 7 1 1 c sn o i t a u l a v e n o i s r e v e r a h s t n e r r u c d r a o b 2 - b v e 5 7 1 1 c sn o i t a u l a v e n o i s r e v l e n n a h c l a u d d r a o b notes: (1) only available in tape and reel packaging. a reel contains 1000 (soic) and 2500 (tssop) devices. (2) lead free product. this product is fully weee and rohs compliant. pin configuration ordering information pin descriptions top view (soic-20 and tssop-20 pin) 6 ? 2004 semtech corp. www.semtech.com sc1175 power management notes (1) block 1 (top) is the master and block 2 (bottom) is the slave in current sharing configuration. (2) for independant operation there is no master or slave. main loop(s) the sc1175 is a dual, voltage mode synchronous buck controller, the two separate channels are identical and share only ic supply pins (vcc and gnd), output driver ground (pgnd) and pre-driver supply voltage (bstc). they also share a common oscillator generating a sawtooth waveform for channel 1 and an inverted sawtooth for channel 2. each channel has its own current limit com- parator. channel 1 has the positive input of the error amplifier internally connected to vref. channel 2 has both inputs of the error amplifier uncommitted and avail- able externally. this allows the sc1175 to operate in two distinct modes. a) two independent channels with either common or different input voltages and different output voltages. the two channels each have their own voltage feed- block diagram applications information - theory of operation back path from their own output. in this mode, the positive input of error amplifier 2 is connected exter- nally to vref. if the application uses a common input voltage, the sawtooth phase shift between the chan- nels provides some measure of input ripple current cancellation. b) two channels operating in current sharing mode with common output voltage and either common in- put voltage or different input voltages. in this mode, channel 1 operates as a voltage mode buck control- ler, as before, but error amp 2 monitors and amplifies the difference in voltage across the output current sense resistors of channel 1 and channel 2 (master and slave) and adjusts the slave duty cycle to match output currents. because of finite gain and offsets in the loop, the resistor ratio for perfect current match- ing is not 1:1. the master and slave channels still have 7 ? 2004 semtech corp. www.semtech.com sc1175 power management their own current limits, identical to the independent channel case. power good the controller provides a power good signal. this is an open collector output, which is pulled low if the output voltage is outside of the power good window. soft start/enable the soft start/enable (ss/ena) pin serves several func- tions. if held below the soft start enable threshold, both channels are inhibited. dh1 and dh2 will be low, turning off the top fets. between the soft start enable thresh- old and the soft start end threshold, the duty cycle is allowed to increase. at the soft start end threshold, maximum duty cycle is reached. in practical applications the error amplifier will be controlling the duty cycle be- fore the soft start end threshold is reached. to avoid boost problems during startup in current share mode, both channels start up in asynchronous mode, and the bottom fet body diode is used for recirculating current during the fet off time. when the ss/ena pin reaches the soft start transition threshold, the channels begin operating in synchronous mode for improved efficiency. the soft start pin sources approximately 25ua and soft start timing can be set by selection of an appropriate soft start capacitor value. sense resistor selection current sharing mode calculation of the three programming resistors to achieve sharing. three resistors will determine the current shar- ing load line. first the offset resistor will ensure that the load line crosses the origin (0 amp on each channel) for sharing at light current. a pull up resistor from the 5v bias (v cc of the chip) will be used. for low duty cycle on the slave channel (below 50%), the pull up will be on pin applications information - theory of operation 3. for high duty cycle on the slave channel (above 50%), the pull up will be on pin 2. the formula is: slave out out up pull v 1 . v 5 . v 5 x 1 . 2 ) k ( r + ? ? = ? ? 100 ? being the value of the resistors connecting the pins 2 and 3 to the two output sense resistors. .1 v is an estimated voltage drop across the mosfets. positive values go to pin 3, negative to pin 2. a +20k will be a 20k on pin 3. a -20k will be a 20k on pin 2. now that the offset resistor has been fixed, we need to set up the maximum current for each channel. selection of r sense 1 for the master channel: (in m ohm) r sense 1 = 72mv / i max master selection of r sense 2 for the slave channel: (in m ohm) r sense 2 = 72mv / i max slave the errors will be minimized if the power components have been sized proportionately to the maximum currents. independent channels calculation of the two current limiting resistors. there is no need for an offset resistor in the indepen- dent channels mode, only the two sense resistors are used: selection of r sense 1 for the channel 1: (mohms) r sense 1 = 72mv / i max ch 1 selection of r sense 2 for the channel 2: (mohms) r sense 1 = 72mv / i max ch 2 8 ? 2004 semtech corp. www.semtech.com sc1175 power management typical characteristics - 2 channels with current sharing figure 1: figure 1: figure 1: figure 1: figure 1: v out vs i in(5v) and i in(12v) with v cc applied and 4a load. soft start capacitor = 10nf. ch1: v out ch2: i in(5v) (1a/div) ch4: i in(12v) (1a/div) i out : 4.004 amps figure 2: figure 2: figure 2: figure 2: figure 2: v out vs i in(5v) and i in(12v) with v cc removed and 4a load. soft start capacitor = 10nf. ch1: v out ch2: i in(5v) (1a/div) ch4: i in(12v) (1a/div) i out : 4.004 amps 9 ? 2004 semtech corp. www.semtech.com sc1175 power management typical characteristics - 2 channels with current sharing (cont.) figure 3: figure 3: figure 3: figure 3: figure 3: v out vs i in(5v) and i in(12v) with v cc applied and 12a load. soft start capacitor = 10nf. ch1: v out ch2: i in(5v) (2a/div) ch4: i in(12v) (2a/div) i out : 12 amps figure 4: figure 4: figure 4: figure 4: figure 4: v out vs i in(5v) and i in(12v) with v cc removed and 12a load. soft start capacitor = 10nf. ch1: v out ch2: i in(5v) (2a/div) ch4: i in(12v) (2a/div) i out : 12 amps 10 ? 2004 semtech corp. www.semtech.com sc1175 power management typical characteristics - 2 channels with current sharing (cont.) the current sharing evaluation board is not intended for a specific application. the power components are not optimized for minimum cost and size. this evaluation board should be used to understand the operation of the sc1175. to design with sc1175 for specific current sharing applications,please refer to application note an00-3. figure 5: figure 5: figure 5: figure 5: figure 5: efficiency data - current sharing mode. 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 02468101214 current (a) efficiency (%) v in(master) = 12v v in(slave) = 5v v out = 2.75v 11 ? 2004 semtech corp. www.semtech.com sc1175 power management evaluation board schematic - 2 channel with current sharing 12 ? 2004 semtech corp. www.semtech.com sc1175 power management m e t iy t i t n a u qe c n e r e f e rt r a p 127 c , 1 cv 0 5 , f u 2 2 . 23 4 c , 3 c , 2 cv 0 5 , f u 1 33 6 1 c , 5 1 c , 5 c10v 0 5 , f n 418 cv 0 5 , f n 1 53 4 1 c , 0 1 c , 9 cv 6 , f u 0 0 1 66 9 1 c , 8 1 c , 7 1 c , 3 1 c , 2 1 c , 1 1 cv 6 1 , f u 0 5 1 722 d , 1 d8 4 1 4 l d 811 la 8 , h u 5 . 7 912 la 8 , h u 7 . 4 0 123 m , 1 m0 3 0 7 b d f r o 9 0 8 7 f r i 1 124 m , 2 m0 3 0 7 b d f r o 1 1 8 7 f r i 2 111 r4 2 1 3 17 8 r , 7 r , 6 r , 5 r , 4 r , 3 r , 2 r2 . 2 4 120 1 r , 9 r0 0 1 5 112 1 r0 5 1 6 113 1 r6 0 0 . 7 114 1 r3 0 0 . 8 111 u5 7 1 1 c s evaluation board bill of materials - 2 channels with current sharing 13 ? 2004 semtech corp. www.semtech.com sc1175 power management top side traces bottom side traces evaluation board gerber plots - 2 channels with current sharing 14 ? 2004 semtech corp. www.semtech.com sc1175 power management figure 6: figure 6: figure 6: figure 6: figure 6: figure 7 figure 7 figure 7 figure 7 figure 7 : output current : output current : output current : output current : output current input voltage = 12v @ 5amps. 2a/div. typical characteristics - 2 independent channels 15 ? 2004 semtech corp. www.semtech.com sc1175 power management typical characteristics - 2 independent channels (cont.) figure 8: figure 8: figure 8: figure 8: figure 8: peak - peak output ripple @ 5a iinput voltage = 12v. output voltage = 2.0v figure 9: phase node 12v input @ 5a figure 9: phase node 12v input @ 5a figure 9: phase node 12v input @ 5a figure 9: phase node 12v input @ 5a figure 9: phase node 12v input @ 5a (without snubber and rc network. 16 ? 2004 semtech corp. www.semtech.com sc1175 power management typical characteristics - 2 independent channels (cont.) figure 10: start-up power on figure 10: start-up power on figure 10: start-up power on figure 10: start-up power on figure 10: start-up power on chan. 1 = output current. 2a/div. chan. 2 = 5v bias voltage figure 11: power off figure 11: power off figure 11: power off figure 11: power off figure 11: power off chan. 1 = output current. 2a/div. chan. 2 = 5v bias voltage 17 ? 2004 semtech corp. www.semtech.com sc1175 power management the independent channels evaluation board is not intended for a specific application. the power components are not optimized for minimum cost and size. this evaluation board should be used to understand the operation of the sc1175. to design with the sc1175 for specific independent channels applications. please refer to: application note an00-4. typical characteristics - 2 independent channels efficiency test 70 75 80 85 90 95 100 0123456 output current efficiency vin = 12v vout = 2.0v vin = 5v vout = 1.25v figure 12: figure 12: figure 12: figure 12: figure 12: 18 ? 2004 semtech corp. www.semtech.com sc1175 power management evaluation board schematic - 2 independent channels 19 ? 2004 semtech corp. www.semtech.com sc1175 power management m e t iy t i t n a u qe c n e r e f e rt r a p 13 3 c , 2 c , 1 cv 0 5 , f u 1 23 1 1 c , 6 c , 4 cv 0 5 , f u 2 2 . 315 cv 0 5 , f n 1 44 0 1 c , 9 c , 8 c , 7 cv 0 5 , f n 0 1 59 0 2 c , 9 1 c , 8 1 c , 7 1 c , 6 1 c , 5 1 c , 4 1 c , 3 1 c , 2 1 cv 6 , f u 0 5 1 63 3 2 c , 2 2 c , 1 2 cv 6 1 , f u 0 0 1 722 d , 1 d8 4 1 4 l d 811 la 8 , h u 5 . 7 912 la 8 , h u 7 . 4 0 123 m , 1 m0 3 0 7 b d f r o 9 0 8 7 f r i 1 124 m , 2 m0 3 0 7 b d f r o 1 1 8 7 f r i 2 17 7 r , 6 r , 5 r , 4 r , 3 r , 2 r , 1 r2 . 2 3 13 3 1 r , 9 r , 8 r0 0 1 4 110 1 r6 0 0 . 5 111 1 r0 2 2 6 112 1 r3 0 0 . 7 125 1 r , 4 1 r4 2 1 8 111 u5 7 1 1 c s evaluation board bill of materials - 2 independent channels 20 ? 2004 semtech corp. www.semtech.com sc1175 power management top side traces bottom side traces evaluation board gerber plots - 2 independent channels 21 ? 2004 semtech corp. www.semtech.com sc1175 power management power and signal traces must be kept separated for noise considerations. feedback, current sense traces and analog ground should not cross any traces or planes carrying high switching currents, such as the input loop or the phase node. the input loop, consisting of the input capacitors and both mosfets must be kept as small as possible. all of the high switching currents occur in this loop. the enclosed loop area must be kept small to minimize inductance and radiated and conducted emissions. designing for minimum trace length is not always the best approach, often a more optimum layout can be achieved by keeping loop area constraints in mind. it is important to keep gate lengths short, the ic must be close to the power switches. this is more difficult in a dual channel device than a single and requires that the two power paths run on either side of a centrally located controller. grounding requirements are always conflicting in a buck converter, especially at high power, and the trick is to achieve the best compromise. power ground (pgnd) should be returned to the bottom mosfet source to provide the best gate current return path. analog ground (gnd) should be returned to the ground side of the output capacitors so that the analog circuitry in the controller has an electrically quiet reference and to provide the greatest feedback accuracy. the problem is that the differential voltage capability of the two ic grounds is limited to about 1v for proper operation and so the physical separation between the two grounds must also be minimized. if the grounds are too far apart, fast current transitions in the connection can generate voltage spikes exceed- ing the 1v capability, resulting in unstable and erratic behavior. the feedback divider must be close to the ic and be returned to analog ground. current sense traces must be run parallel and close to each other and to analog ground. the ic must have a ceramic decoupling capacitor across its supply pins, mounted as close to the device as possible. the small ceramic, noise-filtering capaci- tors on the current sense lines should also be placed as close to the ic as possible. 22 ? 2004 semtech corp. www.semtech.com sc1175 power management outline drawing - tssop-20 l (l1) c 01 gage plane see detail detail a a 0.25 .026 bsc .252 bsc 20 .004 .169 .251 .173 .255 .007 - 20 0.10 0.65 bsc 6.40 bsc 4.40 6.50 - .177 .259 4.30 6.40 .012 0.19 4.50 6.60 0.30 bxn 2x n/2 tips seating aaa c e/2 indicator pin 1 2x 1 3 2 n e1 bbb c a-b d ccc c dimensions "e1" and "d" do not include mold flash, protrusions 3. or gate burrs. datums and to be determined at datum plane controlling dimensions are in millimeters (angles in degrees). -b- notes: 1. 2. -a- -h- side view (.039) .004 .008 - .024 - - - - 0 .018 .003 .031 .002 - 8 0 0.20 0.10 - 8 0.45 0.09 0.80 0.05 .030 .007 .047 .042 .006 - (1.0) 0.60 - 0.75 0.20 - - - 1.20 1.05 0.15 a b c d e e/2 h plane d e a1 a2 a reference jedec std mo-153, variation ac. 4. inches b n ccc aaa bbb 01 e1 e l l1 e d c a2 a1 dim a min max millimeters min dimensions nom max nom (.222) (5.65) z g y p (c) 4.10 .161 0.65 .026 0.40 .016 1.55 .061 7.20 .283 x inches dimensions z p y x dim c g millimeters this land pattern is for reference purposes only. consult your manufacturing group to ensure your company's manufacturing guidelines are met. notes: 1. land pattern - tssop-20 23 ? 2004 semtech corp. www.semtech.com sc1175 power management outline drawing - so-20 h c n a r b n a w i a t 0 8 3 3 - 8 4 7 2 - 2 - 6 8 8 : l e t fx a0 9 3 3 - 8 4 7 2 - 2 - 6 8 8 : h b m g d n a l r e z t i w s h c e t m e s h c n a r b n a p a j 0 5 9 0 - 8 0 4 6 - 3 - 1 8 : l e t 1 5 9 0 - 8 0 4 6 - 3 - 1 8 : x a f h c n a r b a e r o k tl e7 7 3 4 - 7 2 5 - 2 - 2 8 : f6 7 3 4 - 7 2 5 - 2 - 2 8 : x a ) . k . u ( d e t i m i l h c e t m e s 0 0 6 - 7 2 5 - 4 9 7 1 - 4 4 : l e t 1 0 6 - 7 2 5 - 4 9 7 1 - 4 4 : x a f e c i f f o i a h g n a h s t0 3 8 0 - 1 9 3 6 - 1 2 - 6 8 : l e 1 3 8 0 - 1 9 3 6 - 1 2 - 6 8 : x a f l r a s e c n a r f h c e t m e s 0 0 - 2 2 - 8 2 - 9 6 1 ) 0 ( - 3 3 : l e t 8 9 - 2 1 - 8 2 - 9 6 1 ) 0 ( - 3 3 : x a f f o y r a i d i s b u s d e n w o - y l l o h w a s i g a l a n o i t a n r e t n i h c e t m e s . a . s . u e h t n i s r e t r a u q d a e h s t i s a h h c i h w , n o i t a r o p r o c h c e t m e s h b m g y n a m r e g h c e t m e s 3 2 1 - 0 4 1 - 1 6 1 8 ) 0 ( - 9 4 : l e t 4 2 1 - 0 4 1 - 1 6 1 8 ) 0 ( - 9 4 : x a f contact information for semtech international ag |
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