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? 1 ? e02122a27 sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. ICX432DQ 18 pin dip (plastic) diagonal 6.67mm (type 1/2.7) frame readout ccd image sensor with a square pixel for color cameras optical black position (top view) ? super had ccd is a trademark of sony corporation. the super had ccd is a v ersion of son y's high performance ccd had (hole- accumulation diode) sensor with sharply improved sensitivity by the incorporation of a new semiconductor technology developed by sony corporation. description the ICX432DQ is a diagonal 6.67mm (type 1/2.7) interline ccd solid-state image sensor with a square pixel array and 3.24m effective pixels. adoption of a 3-field readout system ensures small size and high performance. this chip features an electronic shutter with variable charge-storage time. r, g, b primary color mosaic filters are used as the color filters, and at the same time high sensitivity and low dark current are achieved through the adoption of super had ccd technology. this chip is suitable for applications such as electronic still cameras, etc. features ? supports frame readout system high horizontal and vertical resolution supports high frame rate readout mode : 30 frames/s, af mode : 60 frames/s, 50 frames/s square pixel horizontal drive frequency: 24.3mhz no voltage adjustments (reset gate and substrate bias are not adjusted.) r, g, b primary color mosaic filters on chip high sensitivity, low dark current continuous variable-speed shutter excellent anti-blooming characteristics 18-pin high-precision plastic package device structure interline ccd image sensor total number of pixels: 2140 (h) 1560 (v) approx. 3.34m pixels number of effective pixels: 2088 (h) 1550 (v) approx. 3.24m pixels number of active pixels: 2080 (h) 1542 (v) approx. 3.21m pixels diagonal 6.667mm number of recommended recording pixels: 2048 (h) 1536 (v) approx. 3.15m pixels diagonal 6.592mm aspect ratio 4:3 chip size: 6.10mm (h) 4.95mm (v) unit cell size: 2.575m (h) 2.575m (v) optical black: horizontal (h) direction: front 4 pixels, rear 48 pixels vertical (v) direction: front 8 pixels, rear 2 pixels number of dummy bits: horizontal 28 vertical 1 (3rd field only) substrate material: silicon 2 8 v h pin 1 pin 11 48 4
? 2 ? ICX432DQ block diagram and pin configuration (top view) pin description pin no. description pin no. symbol description 1 2 3 4 5 6 7 8 9 v 6 v 5b v 5a v 4 v 3b v 3a v 2 v 1 gnd vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock gnd 10 11 12 13 14 15 16 17 18 v out v dd rg gnd sub c sub v l h 1 h 2 ? 1 dc bias is generated within the ccd, so that this pin should be grounded externally through a capacitance of 0.1f. signal output supply voltage reset gate clock gnd substrate clock substrate bias ? 1 protective transistor bias horizontal register transfer clock horizontal register transfer clock symbol 10 11 12 13 14 15 16 17 18 note) note) : photo sensor horizontal register vertical register v out v dd rg gnd sub c sub v l h 1 h 2 9 8 7 6 5 4 3 2 1 gnd v 1 v 2 v 3a v 3b v 4 v 5a v 5b v 6 b gr b gr b gb r gb r gb b gr b gr b gb r gb r gb gr r gr r b gr gb r b gr gb r
? 3 ? ICX432DQ absolute maximum ratings item v dd , v out , rg ? sub v 1 , v 3a , v 3b , v 5a , v 5b ? sub v 2 , v 4 , v 6 , v l ? sub h 1 , h 2 , gnd ? sub c sub ? sub v dd , v out , rg, c sub ? gnd v 1 , v 2 , v 3a , v 3b , v 4 , v 5a , v 5b , v 6 ? gnd h 1 , h 2 ? gnd v 1 , v 3a , v 3b , v 5a , v 5b ? v l v 2 , v 4 , v 6 , h 1 , h 2 , gnd ? v l voltage difference between vertical clock input pins h 1 ? h 2 h 1 , h 2 ? v 6 against sub against gnd against v l between input clock pins storage temperature guaranteed temperature of performance operating temperature ? 40 to +12 ? 50 to +15 ? 50 to +0.3 ? 40 to +0.3 ? 25 to ? 0.3 to +22 ? 10 to +18 ? 10 to +6.5 ? 0.3 to +28 ? 0.3 to +15 to +15 ? 6.5 to +6.5 ? 10 to +16 ? 30 to +80 ? 10 to +60 ? 10 to +75 v v v v v v v v v v v v v c c c ? 1 ratings unit remarks ? 1 +24v (max.) when clock width < 10s, clock duty factor < 0.1%. +16v (max.) is guaranteed for turning on or off power supply.
? 4 ? ICX432DQ bias conditions supply voltage protective transistor bias substrate clock reset gate clock item v dd v l sub rg symbol 15.0 ? 1 ? 2 ? 2 min. v unit remarks typ. max. ? 1 v l setting is the v vl voltage of the vertical clock waveform, or the same voltage as the v l power supply for the v driver should be used. ? 2 do not apply a dc bias to the substrate clock and reset gate clock pins, because a dc bias is generated within the ccd. dc characteristics 14.55 15.45 supply current item i dd symbol 7.0 min. unit remarks typ. max. ma 9.0 5.0 clock voltage conditions readout clock voltage vertical transfer clock voltage horizontal transfer clock voltage reset gate clock voltage substrate clock voltage item v vt v vh1 , v vh2 v vh3 , v vh4 v vh5 , v vh6 v vl1 , v vl2 , v vl3 , v vl4 , v vl5 , v vl6 v v v vh5 ? v vh v vh6 ? v vh v vhh v vhl v vlh v vll v h v hl v cr v rg v rglh ? v rgll v rgl ? v rglm v sub symbol 14.55 ? 0.05 ? 0.2 ? 8.0 6.8 ? 0.25 ? 0.25 3.0 ? 0.05 0.5 3.0 21.5 min. 15.0 0 0 ? 7.5 7.5 3.3 0 1.65 3.3 22.5 ty p . 15.45 0.05 0.05 ? 7.0 8.05 0.1 0.1 0.8 0.9 0.9 0.8 3.6 0.05 3.6 0.4 0.5 23.5 max. unit 1 2 2 2 2 2 2 2 2 2 2 3 3 3 4 4 4 5 waveform diagram v vh = (v vh1 + v vh2 + v vh3 + v vh4 )/2 v vl = (v vl5 + v vl6 )/2 v v = v vh n ? v vl n (n = 1 to 6) high-level coupling high-level coupling low-level coupling low-level coupling cross-point voltage low-level coupling low-level coupling remarks v v v v v v v v v v v v v v v v v v
? 5 ? ICX432DQ clock equivalent circuit constants vertical transfer clock equivalent circuit horizontal transfer clock equivalent circuit c v1 c v3a , c v3b , c v5a , c v5b c v2 , c v4 , c v6 c v12 c v23a , c v23b , c v45a , c v45b c v3a4 , c v3b4 , c v5a6 , c v5b6 c v61 c h1 , c h2 c hh c rg c sub r 1 , r 2 , r 4 , r 6 r 3a , r 5a r 3b , r 5b r gnd r h symbol capacitance between vertical transfer clock and gnd capacitance between vertical transfer clocks capacitance between horizontal transfer clock and gnd capacitance between horizontal transfer clocks capacitance between reset gate clock and gnd capacitance between substrate clock and gnd vertical transfer clock series resistor vertical transfer clock ground resistor horizontal transfer clock series resistor item min. typ. max. pf pf pf pf pf pf pf pf pf pf pf ? ? ? ? ? unit remarks 1280 640 400 510 50 260 100 40 70 8 1000 60 240 80 18 13 r gnd v 2 r 2 c v12 v 1 v 6 v 3a v 3b v 4 v 5a v 5b r 1 r 6 r 5b r 3a r 3b r 4 r 5a c v5b6 c v23a c v3b4 c v45a c v61 c v3b c v23b c v3a c v3a4 c v2 c v1 c v6 c v5a6 c v5b c v5a c v4 c v45b h 1 h 2 c h1 c h2 c hh r h r h
? 6 ? ICX432DQ drive clock waveform conditions (1) readout clock waveform v vh = (v vh1 + v vh2 + v vh3 + v vh4 )/4 v vl = (v vl5 + v vl6 )/2 v v = v vh n ? v vl n (n = 1 to 6) (2) vertical transfer clock waveform v 1 v 2 v 3a , v 3b v 4 v 5a , v 5b v 6 100% 90% 10% 0% tr tf 0v twh m 2 m v vt v vh1 v vhh v vh v vhl v vhh v vhl v vl1 v vlh v vll v vl v vh3 v vhh v vh v vhl v vhh v vhl v vhl v vl3 v vlh v vll v vl v vh2 v vhh v vhl v vh v vhl v vhh v vhl v vhh v vl2 v vlh v vll v vhh v vl v vhl v vhh v vhl v vhh v vh v vh5 v vl v vl5 v vhh v vh v vhl v vhl v vl4 v vlh v vll v vl v vh4 v vlh v vll v vhl v vlh v vll v vhh v vhl v vhh v vh v vh6 v vl v vl6
? 7 ? ICX432DQ (3) horizontal transfer clock waveform cross-point voltage for the h 1 rising side of the horizontal transfer clocks h 1 and h 2 waveforms is v cr . the overlap period for twh and twl of horizontal transfer clocks h 1 and h 2 is two. (4) reset gate clock waveform v rglh is the maximum value and v rgll is the minimum value of the coupling waveform during the period from point a in the above diagram until the rising edge of rg. in addition, v rgl is the average value of v rglh and v rgll . v rgl = (v rglh + v rgll )/2 assuming v rgh is the minimum value during the interval with twh, then: v rg = v rgh ? v rgl negative overshoot level during the falling edge of rg is v rglm . (5) substrate clock waveform v hl v cr twl two twh v h v h 2 tr h 2 90% 10% h 1 tf rg waveform v rglh v rgh v rgl v rgll v rglm tr twh twl tf v rg point a v sub (a bias generated within the ccd) 100% 90% 10% 0% tr tf twh m 2 m v sub
? 8 ? ICX432DQ spectral sensitivity characteristics (excludes lens characteristics and light source characteristics) clock switching characteristics (horizontal drive frequency: 24.3mhz) min. twh typ. max. min. typ. max. min. typ. max. min. typ. max. twl tr tf 2.63 11 11 6 2.5 2.83 15 15 8 3.02 11 11 15 15 28 0.5 6.0 6.0 3 9.5 9.5 0.5 15 0.5 6.0 6.0 3 350 9.5 9.5 0.5 unit s ns ns ns s remarks during readout when using cxd3400n tf tr ? 2ns during drain charge item readout clock vertical transfer clock horizontal transfer clock reset gate clock substrate clock symbol v t v 1 , v 2 , v 3a , v 3b , v 4 , v 5a , v 5b , v 6 h 1 h 2 rg sub min. two typ. max. 10 15 unit ns remarks item horizontal transfer clock symbol h 1 , h 2 400 1.0 b g r 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 450 500 550 wave length [nm] relative response 600 650 700
? 9 ? ICX432DQ image sensor characteristics (horizontal drive frequency: 24.3mhz) (ta = 25 c) ? 1 after closing the mechanical shutter, the smear can be reduced to below the detection limit by performing vertical register sweep operation. ? 2 excludes vertical dark signal shading caused by vertical register high-speed transfer. zone definition of video signal shading measurement system note) adjust the amplifier gain so that the gain between [ ? a] and [ ? b], and between [ ? a] and [ ? c] equals 1. item g sensitivity sensitivity comparison saturation signal smear video signal shading dark signal dark signal shading line crawl g line crawl r line crawl b lag symbol sg rr rb vsat sm shg vdt ? vdt lcg lcr lcb lag min. 165 0.46 0.33 420 ty p. 220 ? 87.5 ? 78 max. 275 0.72 0.59 ? 80 ? 70.5 20 25 10 8 3.8 3.8 3.8 0.5 unit mv mv db % mv mv % % % % measurement method 1 1 1 2 3 4 5 6 7 7 7 8 remarks 1/30s accumulation ta = 60 c frame readout mode ? 1 high frame rate readout mode zone 0 and i zone 0 to ii ' ta = 60 c, 5.0 frame/s ta = 60 c, 5.0 frame/s, ? 2 4 v 10 4 4 4 ignored region effective pixel region zone 0, i zone ii , ii ' v 10 h 8 h 8 2088 (h) 1550 (v) ccd c.d.s s/h s/h amp ccd signal output [ ? a] gr/gb channel signal output [ ? b] r/b channel signal output [ ? c]
? 10 ? ICX432DQ image sensor characteristics measurement method measurement conditions (1) in the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions, and the frame readout mode is used. in addition, v sub cont. is turned off. (2) in the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (ob) is used as the reference for the signal output, which is taken as the value of the gr/gb channel signal output or the r/b channel signal output of the measurement system. color coding of this image sensor & readout the primary color filters of this image sensor are arranged in the layout shown in the figure on the left (bayer arrangement). gr and gb denote the g signals on the same line as the r signal and the b signal, respectively. for three frames readout, the a1 and a2 lines are output as signals in the a field, the b1 and b2 lines in the b field, and the c1 and c2 lines in the c field. gb b gb b rgrrgr gb b gb b rgrrgr b2 b1 a2 a1 horizontal register color coding diagram gb b gb b rgrrgr c2 c1
? 11 ? ICX432DQ 2. frame readout mode, high frame rate readout mode readout modes 1. readout modes list the following readout modes are possible by driving the image sensor at the timing specifications noted in this data sheet. 1. frame readout mode in this mode, all pixel signals are divided into three fields and output. all pixel signals are read out independently, making this mode suitable for high resolution image capturing. 2. high frame rate readout mode output is performed at 30 frames per second by reading out 4 pixels for every 12 vertical pixels and adding 2 pixels in the horizontal ccd. the number of output lines is 258 lines. this readout mode emphasizes processing speed over vertical resolution. mode name frame rate number of effective output lines frame readout mode high frame rate readout mode af mode ntsc mode pal mode ntsc mode pal mode ntsc mode pal mode 5.0 frame/s 5.0 frame/s 30 frame/s 25 frame/s 60 frame/s 50 frame/s 1550 (1st 517, 2nd 516, 3nd 517) 1550 (1st 517, 2nd 516, 3nd 517) 258 258 96 123 frame readout mode high frame rate readout mode 1st field note) blacked out portions in the diagram indicate pixels which are not read out. 2nd field 3rd field 13 12 11 10 9 8 7 6 5 4 3 1 2 v out r gb r gb r gb r gb r gb r r gb gr b gr b gr b gr b gr b gr gr b 13 12 11 10 9 8 7 6 5 4 3 1 2 v out r gb r gb r gb r gb r gb r r gb gr b gr b gr b gr b gr b gr gr b 13 12 11 10 9 8 7 6 5 4 3 1 2 v out r gb r gb r gb r gb r gb r r gb gr b gr b gr b gr b gr b gr gr b 13 12 11 10 9 8 7 6 5 4 3 1 2 v out r gb r gb r r gb gb r r gb gr b gr b gb b gr gr b b gr gr b rgr
? 12 ? ICX432DQ 3. af the af mode increases the frame rate by cutting out a portion of the picture through high-speed elimination of the top and bottom of the picture in high frame rate readout mode. this mode allows 1/60s and 1/50s output, so it is effective for raising the auto focus (af) speed. in addition, the output line position and number of output lines are fixed. see the timing specifications for the cut-out region. number of effective lines in high frame rate readout mode 258 top frame shift region cut-out region bottom high-speed sweep region
? 13 ? ICX432DQ definition of standard imaging conditions (1) standard imaging condition i : use a pattern box (luminance: 706cd/m 2 , color temperature of 3200k halogen source) as a subject. (pattern for evaluation is not applicable.) use a testing standard lens with cm500s (t = 1.0mm) as an ir cut filter and image at f5.6. the luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. (2) standard imaging condition ii : image a light source (color temperature of 3200k) with a uniformity of brightness within 2% at all angles. use a testing standard lens with cm500s (t = 1.0mm) as an ir cut filter. the luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. (3) standard imaging condition iii : image a light source (color temperature of 3200k) with a uniformity of brightness within 2% at all angles. use a testing standard lens (exit pupil distance ? 33mm) with cm500s (t = 1.0mm) as an ir cut filter. the luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. g sensitivity, sensitivity comparison set to the standard imaging condition i . after setting the electronic shutter mode with a shutter speed of 1/100s, measure the signal outputs (v gr , v gb , v r and v b ) at the center of each gr, gb, r and b channel screen, and substitute the values into the following formulas. v g = (v gr + v gb )/2 sg = v g [mv] rr = v r /v g rb = v b /v g 2. saturation signal set to the standard imaging condition ii . after adjusting the luminous intensity to 20 times the intensity with the average value of the gr signal output, 150mv, measure the minimum values of the gr, gb, r and b signal outputs. 3. smear set to the standard imaging condition iii . with the lens diaphragm at f5.6 to f8, first adjust the average value of the gr signal output to 150mv. measure the average values of the gr signal output, gb signal output, r signal output and b signal output (gra, gba, ra, ba), and then adjust the luminous intensity to 500 times the intensity with the average value of the gr signal output, 150mv. after the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective h blankings, measure the maximum value (vsm [mv]) independent of the gr, gb, r and b signal outputs, and substitute the values into the following formula. sm = 20 log ( vsm ? ) [db] (1/10v method conversion value) 1 10 1 500 gra + gba + ra + ba 4 100 30
? 14 ? ICX432DQ 4. video signal shading set to the standard imaging condition iii . with the lens diaphragm at f5.6 to f8, adjusting the luminous intensity so that the average value of the gr signal output is 150mv. then measure the maximum value (grmax [mv]) and minimum value (grmin [mv]) of the gr signal output and substitute the values into the following formula. shg = (grmax ? grmin)/150 100 [%] 5. dark signal measure the average value of the signal output (vdt [mv]) with the device ambient temperature of 60 c and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 6. dark signal shading after measuring 5, measure the maximum (vdmax [mv]) and minimum (vdmin [mv]) values of the dark signal output and substitute the values into the following formula. ? vdt = vdmax ? vdmin [mv] 7. line crawl set to the standard imaging condition ii . adjusting the luminous intensity so that the average value of the gr signal output is 150mv, and then insert r, g and b filters and measure the difference between g signal lines ( ? glr, ? glg, ? glb [mv]) as well as the average value of the g signal output (gar, gag, gab). substitute the values into the following formula. lci = 100 [%] (i = r, g, b) 8. lag adjust the gr signal output value generated by the strobe light to 150mv. after setting the strobe light so that it strobes with the following timing, measure the residual signal amount (vlag). substitute the value into the following formula. lag = (vlag/150) 100 [%] ? gli gai light vd v3a/v3b strobe light timing output vlag (lag) gr signal output 150mv
? 15 ? ICX432DQ drive circuit notes) substrate bias control 1. the saturation signal level decreases when exposure is performed using the mechanical shutter, so control the substrate bias. 2. a saturation signal level equivalent to that for continuous exposure can be assured by connecting a vr1 grounding registor to the ccd c sub pin. drive timing precautions 1. blooming occurs in modes (high frame rate readout, etc.) that do not use the mechanical shutter, so do not ground the connected vr1 resistor. 2. tf is slow, so the internally generated voltage v sub may not drop to a sufficiently low level if the substrate bias control signal is not set to high level 30ms before entering the exposure period and the vr1 resistor connected to the c sub pin is not grounded. 3. the blooming signal generated during exposure in mechanical shutter mode is swept by providing two fields or more of idle transfer through vertical register high-speed sweep transfer from the time the mechanical shutter closes until sensor readout is performed. however, note that the v l potential and the sub pin dc voltage sag at this time. substrate bias control signal v sub cont. mechanical shutter mode substrate bias sub pin voltage gnd tr 2ms tf 17ms internally generated value v sub xsub xv3 xsg3b xsg3a xv5 xsg5b xsg5a xv4 xv1 xsg1 xv6 xv2 v sub cont. h 2 h 1 rg 0.1 0.1 0.1 0.1 0.1 0.1 1m 0.1 0.01 3.3/20v 0.1 4.7k 100k ccd out vr1 ( 3.9k ? ) 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 cxd3400n 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 cxd3400n 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 ICX432DQ (bottom view) 3.3/16v 1/35v 3.3v 0.1 3.3v ? 7.5v 15v v dd v out gnd h 2 h 1 v l c sub sub rg v 1 gnd v 6 v 5b v 5a v 4 v 3b v 2 v 3a 2sc4250
? 16 ? ICX432DQ drive timing chart (vertical sequence) high frame rate readout mode frame readout mode/electronic shutter normal operation note) high frame rate readout mode out signals of v sub cont. high period contain a blooming component and should therefore not be used. apply 20 or more electronic shutter pulses at the start of exposure for the recording image. if less than 20 pulses are applied, the electronic shutter may occur a discharge error. b open vd v1 v2 v3a v3b v4 v5a v5b v6 sub trg close bc e high frame rate readout mode high frame rate readout mode a signal output frame readout mode exposure operation mechanical shutter v sub cont. ccd out b signal output b signal output e signal output output after frame readout c signal output (1st) c signal output (2nd) c signal output (3rd)
? 17 ? ICX432DQ drive timing chart (vertical sync) ntsc/pal frame readout mode ntsc: 5.0 frame/s, pal: 5.0 frame/s note) 2760fh, however, 588h, 1176h and 1764h in ntsc mode are 1500clk, 705h, 1410h and 2115h in pal mode are 960clk. 1548 1545 2 5 8 3 6 9 1549 1546 3 6 1 4 vd exposure period "a" "b" "c" hd pa l v1 v2 v3a v3b v4 v5a v5b v6 sub open close 1550 1547 1 4 7 2 5 8 trg mechanical shutter ccd out ntsc 11 99 41 41 44 44 564 564 705 588 746 629 749 632 1269 1152 1410 1176 1451 1217 1454 1220 1975 1741 2115 1764 v sub cont.
? 18 ? ICX432DQ drive timing chart (readout) ntsc/pal frame readout mode "a" enlarged "b" enlarged 1296 2760 h1 v1 v2 v3a/v3b ntsc 44h pal 44h ntsc 632h pal 749h v4 v5a/v5b v6 2760 1 52 644 1 52 644 308 1420 392 434 560 1380 1460 350 476 1338 602 1254 518 2760 h1 v1 v2 v3a/v3b v4 v5a/v5b v6 2760 1 52 644 1 644 266 392 434 560 350 476 1338 1420 602 224 1502 518 1380 1460 1546 308
? 19 ? ICX432DQ drive timing chart (readout) ntsc/pal frame readout mode "c" enlarged 1128 2760 h1 v1 v2 v3a/v3b v4 v5a/v5b v6 2760 1 52 644 1 52 644 1254 1212 1338 1296 476 1420 560 1380 1460 518 1086 1170 602 ntsc 1220h pal 1454h
? 20 ? ICX432DQ drive timing chart (high-speed sweep operation) ntsc/pal frame readout mode note) in the period of high-speed sweep operation, the rising of input clocks xv1, xv2, xv3, xv4, xv5 and xv6 to vertical transfer cl ock driver cd3400n should be delayed by 1 clock against the above timing chart. 18 18 18 18 18 #1040 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 #3 #2 #1 140 52 1 52 1 18 hd v1 v2 v3a/v3b v4 v5a/v5b v6
? 21 ? ICX432DQ drive timing chart (horizontal sync) ntsc/pal frame readout mode clk 2760 1 5 183 52 48 1 1 644 592 1 28 4 4 rg shp shd v1 v2 v3a/v3b v4 v5a/v5b v6 h1 h2 sub 1 126 1 1 382 84 1 126 1 1 298 168 1 126 1 1 214 252 1 126 1 1 130 336 88 1 1 378 1126 172 1 1 1 42 378 88 ignored pixel 4 bits ignored pixel 4 bits
? 22 ? ICX432DQ drive timing chart (vertical sync) ntsc/pal high frame rate readout mode ntsc: 30 frame/s, pal: 25 frame/s note) 3004fh, however, 270h in ntsc mode is 2734fh, 324h in pal mode is 1708fh. ntsc vd hd v1 v2 v3a v3b v4 v5a v5b ccd out v6 263 263 270 324 1 1 9 9 263 263 270 324 1 1 4 4 9 9 pa l 6 4 5 1 10 8 17 13 22 20 29 25 34 32 6 4 5 1 10 8 17 13 22 20 29 25 34 32 1534 1541 1546 1532 1537 1544 1549 1534 1541 1546 1532 1529 1525 1537 1544 1549
? 23 ? ICX432DQ drive timing chart (readout portion) ntsc/pal high frame rate readout mode/af mode h1 v1 v2 v3a v3b v4 v5a v5b v6 1 1438 1611 888 52 888 52 1 3004 1 1540 1673 1500 1580 1704 1784 1 1642 1815 1 1 1744 1877 1642 1815 1 1407 1846 1 1407 1846 1 1469 1908 1
? 24 ? ICX432DQ drive timing chart (horizontal sync) ntsc/pal high frame rate readout mode/af mode clk 3004 1 5 3004 183 1 5 52 48 1 1 888 836 1 28 4 4 rg shp shd v1 v2 v3a/v3b v4 v5a/v5b v6 h1 h2 sub 193 1 1 119 193 1 279 252 193 1 1 181 193 1 279 190 193 1 1 243 193 1 279 128 193 1 1 305 193 1 279 66 193 88 1 1 1 279 197 279 193 150 1 1 1 279 35 279 88 ignored pixel 4 bits ignored pixel 4 bits 52
? 25 ? ICX432DQ drive timing chart (vertical sync) af mode ntsc: 60 frame/s, pal: 50 frame/s note) 3004fh, however, 135h in ntsc mode is 2869clk, and 162h in pal mode is 2356clk. vd hd v1 v2 v3a v3b v4 v5a v5b ccd out v6 6 4 6 4 485 481 490 488 af mode output signal ntsc 96 lines pal 123 lines ntsc 123 150 135 162 1 1 4 4 9 9 25 25 28 28 123 150 135 162 1 1 4 4 9 9 25 25 pa l high-speed sweep period high-speed sweep period frame shift period frame shift period
? 26 ? ICX432DQ drive timing chart (high-speed frame shift operation) ntsc/pal af mode 93 279 1 93 248 93 279 93 186 155 93 93 279 217 93 93 279 279 93 93 279 279 #1 af: #78 #2 93 279 140 1 140 31 93 af mode 20h hd v1 v2 v3a/v3b v4 v5a/v5b v6 124 62 31 62
? 27 ? ICX432DQ drive timing chart (high-speed frame sweep operation) ntsc/pal af mode 36 108 1 36 96 36 108 36 72 60 36 36 108 84 36 36 108 108 36 36 108 108 #1 af: #114 #2 36 108 140 1 140 12 36 af mode 11h hd v1 v2 v3a/v3b v4 v5a/v5b v6 48 24 12 24
? 28 ? ICX432DQ notes on handling 1) static charge prevention ccd image sensors are easily damaged by static discharge. before handling be sure to take the following protective measures. a) either handle bare handed or use non-chargeable gloves, clothes or material. also use conductive shoes. b) when handling directly use an earth band. c) install a conductive mat on the floor or working table to prevent the generation of static electricity. d) ionized air is recommended for discharge when handling ccd image sensors. e) for the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) soldering a) make sure the package temperature does not exceed 80 c. b) solder dipping in a mounting furnace causes damage to the glass and other defects. use a 30w soldering iron with a ground wire and solder each pin in less than 2 seconds. for repairs and remount, cool sufficiently. c) to dismount an image sensor, do not use a solder suction equipment. when using an electric desoldering tool, use a thermal controller of the zero-cross on/off type and connect it to ground. 3) dust and dirt protection image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. clean glass plates with the following operations as required, and use them. a) perform all assembly operations in a clean room (class 1000 or less). b) do not either touch glass plates by hand or have any object come in contact with glass surfaces. should dirt stick to a glass surface, blow it off with an air blower. (for dirt stuck through static electricity ionized air is recommended.) c) clean with a cotton bud and ethyl alcohol if grease stained. be careful not to scratch the glass. d) keep in a case to protect from dust and dirt. to prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) when a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. do not reuse the tape. 4) installing (attaching) a) remain within the following limits when applying a static load to the package. do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (this may cause cracks in the package.) b) if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. plactic package cover glass compressive strength 50n 50n 1.2nm torsional strength
? 29 ? ICX432DQ c) the adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. therefore, the adhesive should not be applied to this area, and indicated values should be transferred to other locations as a precaution. d) the notch of the package is used for directional index, and that can not be used for reference of fixing. in addition, the cover glass and seal resin may overlap with the notch of the package. e) if the leads are bent repeatedly and metal, etc., clash or rub against the package, the dust may be generated by the fragments of resin. f) acrylate anaerobic adhesives are generally used to attach ccd image sensors. in addition, cyano- acrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) others a) do not expose to strong light (sun rays) for long periods, as color filters will be discolored. when high luminous objects are imaged with the exposure level controlled by the electronic iris, the luminance of the image-plane may become excessive and discoloring of the color filter will possibly be accelerated. in such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-off mode should be properly arranged. for continuous using under cruel condition exceeding the normal using condition, consult our company. b) exposure to high temperature or humidity will affect the characteristics. accordingly avoid storage or usage in such conditions. c) brown stains may be seen on the bottom or side of the package. but this does not affect the ccd characteristics.
? 30 ? ICX432DQ sony corporation package outline unit: mm package material lead treatment lead material package mass drawing number plastic gold plating 0.5g 42 alloy as-c14-02(e) 8.9 8.9 10.16 10.0 ?0.10 10.0 ?0.10 0.38 0.46 1.11 5.0 0.6 2.5 7.0 1.7 1.7 0.25 0.6 2.5 7.0 2.5 2.3 2.0 5.0 b' d c a b 10 18 v h 9 10 9 1 1 18 m 0.3 0 ?to 9? 2.50 ?0.15 3.50 ?0.3 0.30 ?0.15 18 pin dip (400mil) 1. ? is the center of the effective image area. 2. the two points ? of the package are the horizontal reference. the point ?' of the package is the vertical reference. 3. the bottom ? of the package, and the top of the cover glass ? are the height reference. 4. the center of the effective image area relative to ? and ?' is (h, v) = (5.0, 5.0) ?0.07mm. 5. the rotation angle of the effective image area relative to h and v is ?0.8? 6. the height from the bottom ? to the effective image area is 1.20 ?0.10mm. the height from the top of the cover glass ? to the effective image area is 1.30 ?0.15mm. 7. the tilt of the effective image area relative to the bottom ? is less than 25?. the tilt of the effective image area relative to the top ? of the cover glass is less than 25?. 8. the thickness of the cover glass is 0.5mm, and the refractive index is 1.5. 9. the notch of the package is used only for directional index, that must not be used for reference of fixing.

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