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ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 1 G768D global mixed-mode technology inc. two remote temperature sensors and one fan con- troller with smbus serial interface and system reset circuit features ? measures two remote temperatures ? no calibration required ? smbus 2-wire serial interface ? programmable under/over-temperature alarms ? programmable thermal shutdown signal ? supports smbus alert response ? accuracy: 5c (-40c to + 125c, remote) 3c (+60c to + 100c, remote) ? +4.5v to +5.5v supply range ? fan speed control range: 3,000 to 30,000 rpm ? fan speed accuracy: 2% ? built-in mosfet switch ? internal current-limit and over-temperature protection for fan control ? watchdog for fan control ? alarm for fan failure ? precision monitoring of 5v power-supply voltage ? 340ms typical power-on reset pulse width reset output ? guaranteed reset valid to v cc =1v ? power supply transient immunity ? no external components needed for reset function ? small, 16-pin ssop package applications ? desktop and notebook ? central office computers ? telecom equipment ? smart battery packs ? test and measurement ? lan servers ? multi-chip modules ? industrial controls pin configuration general description the G768D contains a precise digital thermometer, a fan controller, and a system-reset circuit. except for one less fan controller, G768D is backward compatible with g768b. G768D has 2 more functions, fan-failure detection and programmable thermal shut- down signal. the thermometer reports the temperature of 2 remote sensors. the remote sensors are diode-connected transistors typically a low-cost, easily mounted 2n3904 npn type that replace conventional thermis- tors or thermocouples. remote accuracy is 5c for multiple transistor manufacturers, with no calibration needed. the remote channel can also measure the die temperature of other ics, such as microprocessors, that contain an on-chip, diode-connected transistor. the 2-wire serial interface accepts standard system management bus (smbus tm ) write byte, read byte, send byte, and receive byte commands to program the alarm thresholds and to read temperature data. the data format is 7 bits plus sign, with each bit cor- responding to 1c, in two?s-complement format. measurements can be done automatically and autonomously, with the conversion rate programmed by the user or programmed to operate in a single-shot mode. the adjustable rate allows the user to control the supply-current drain. G768D also contains a fan speed controller. it connects directly to the fans and performs closed-loop control of the fan speed independently. the only external compo- nent required is a 10f capacitor per channel. it deter- mines the current fan speed based on the fan rotation pulses and an externally supplied 32.768khz clock. ordering information order number temp. range package G768D -55c to +125c ssop-16l reset smbdata 1 2 3 4 5 6 7 8 fanvcc vcc dxp1 dxn dxp2 dgnd agnd 16 15 14 13 12 11 10 9 th_shut smbclk nc alert fg clk ssop-16l vcc G768D reset smbdata 1 2 3 4 5 6 7 8 fanvcc vcc dxp1 dxn dxp2 dgnd agnd 16 15 14 13 12 11 10 9 th_shut smbclk nc alert fg clk ssop-16l vcc G768D
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 2 G768D global mixed-mode technology inc. it uses ldo method and an on-chip mosfet to con- trol the fan speed to 2% of the programmed speed. the desired fan speed is also programmed via smbus tm . the actual fan speed and fan status can be read via the smbus tm . short-circuit protection is im- plemented to prevent damages to the fan and this ic itself. the accepted frequency of fan rotation pulses is 100~1000hz, which corresponds to 3,000 to 30,000 rpm for a typical fan that produces two pulses per revolution. the G768D also turns on the fans by hard- ware watchdog system. the fan controller would fully turn on the fan when any of the following conditions happens. 1. when either of the remote temperature is higher than its own t max . 2.when either of these two remote diodes is open. 3.when both remote diodes are short. the G768D also contains a microprocessor (p) su- pervisory circuit used to monitor the power supplies in p and digital systems. they provide excellent circuit reliability and low cost by eliminating external compo- nents and adjustments when used with 5v-powered circuits. this circuit asserts a reset signal whenever the v cc supply voltage declines below a preset threshold, keeping it asserted for at least 140ms after v cc has risen above the reset threshold. the G768D has an active-low reset output. the reset com- parator is designed to ignore fast transients on v cc . reset threshold of this circuit is set to 4.4v typical. the G768D is available in a small, 16-pin ssop sur- face-mount package. typical operating circuit interrupt to c 1f fanvcc fg dxp1 dxn dxp2 reset gnd 2200pf 2200pf 2n3904 2n3904 10k each smbclk smbdata clock 32.768khz in fan1 fg th_shut smbclk smbdata alert clk G768D reset p 10f vcc interrupt to c 1f fanvcc fg dxp1 dxn dxp2 reset gnd 2200pf 2200pf 2n3904 2n3904 10k each smbclk smbdata clock 32.768khz in fan1 fg th_shut smbclk smbdata alert clk G768D reset p 10f vcc
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 3 G768D global mixed-mode technology inc. absolute maximum ratings v cc to gnd??????. ????.??.-0.3v to +6v dxp1, dxp2 to gnd?????0.3v to (v cc + 0.3v) dxn to gnd???????????...-0.3v to +0.8v clk, fg, smbclk, smbdata, alert to gnd.?????????.??.???...-0.3v to +6v smbdata, alert current????...-1ma to +50ma dxn current???????????????1ma esd protection (smbclk, smbdata, alert , hu- man body model)?.???.????.??..?.?.2000v esd protection (other pins, human body model)?2000v continuous power dissipation (t a = +70c) ssop (de-rate 8.30mw/c above +70c)????667mw operating temperature range?-55c to +125c junction temperature??????....+150c storage temperature range???-65c to +165c lead temperature (soldering, 10sec) ???.+260c stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the oper a- tional sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics (v cc = + 5v, t a = 60c, unless otherwise noted.) parameter conditions min typ max units temperature sensor temperature resolution (note 1) monotonicity guaranteed 8 - - bits t r = 0c to +125c -5 - 5 temperature error, remote diode (notes 2 and 3) t r = 60c to +100c -3 - 3 c temperature error, local diode (notes 1 and 2) including long-term drift t a = +60c to +100c -3 - 3 c supply-voltage range 4.5 5 5.5 v under-voltage lockout threshold v cc input, disables a/d conversion, rising edge 2.6 2.8 2.95 v under-voltage lockout hysteresis 50 - mv power-on reset threshold v cc , falling edge 1.0 1.7 2.5 v por threshold hysteresis - 50 - mv smbus static - 3 10 standby supply current logic inputs forced to v cc or gnd hardware or software standby, smbclk at 10khz - 200 - a 0.25 conv/sec - 250 300 average operating supply current auto-convert mode, average measured over 4sec. logic inputs forced to v cc or gnd 2.0 conv/sec - 300 350 a conversion time from stop bit to conversion complete (all channels) 94 125 156 ms conversion rate timing error auto-convert mode -25 - 25 % high level 120 160 200 remote-diode source current dxp forced to 1.5v low level 15 20 25 a fan controller supply voltage v cc 4.5 5 5.5 v shutdown current fan speed = 0rpm - 2 5 a mosfet on resistance - 0.2 0.25 ? short-circuit current limit - 0.5 - a input logic low vil - - 0.7. v input logic high vih 1.0 - - v clock frequency clk - 32. 768 - k h z fanvcc over-current trig 600 - - ma fanvcc current limit 500 - - ma fg input positive-going threshold voltage v cc =5v - 1 - v fg input negative-going threshold voltage v cc =5v - 0.7 - v fg input hysteresis voltage v cc =5v - 0.3 - v
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 4 G768D global mixed-mode technology inc. electrical characteristics (continued) (v cc = + 5v, t a = 60c, unless otherwise noted.) parameter conditions min typ max units smbus interface logic input high voltage smbclk, smbdata; v cc = 4.5v to 5.5v 2.4 - - v logic input low voltage smbclk, smbdata; v cc = 4.5v to 5.5v - - 0.8 v logic output low sink current alert , smbdata forced to 0.4v 6 - - ma alert output high leakage current alert forced to 5.5v - - 1 a logic input current logic inputs forced to v cc or gnd -2 - 2 a smbus input capacitance smbclk, smbdata - 5 - pf smbus clock frequency (note 4) dc - 100 khz smbclk clock low time t low , 10% to 10% points 4.7 - - s smbclk clock high time t high , 90% to 90% points 4 - - s smbus start-condition setup time 4.7 - - s smbus repeated start-condition setup time t su : sta , 90% to 90% points 500 - - ns smbus start-condition hold time t hd: sta , 10% of smbdata to 90% of smbclk 4 - - s smbus start-condition setup time t sd: sto , 90% of smbdata to 10% of smbdata 4 - - s smbus data valid to smbclk rising- edge time t su: dat , 10% or 90% of smbdata to 10% of smbclk 800 - - ns smbus data-hold time t hd : dat (note 5) 0 - - s smbclk falling edge to smbus data-valid time master clocking in data - - 1 s electrical characteristics (continued) (v cc =full range, t a = 60c, unless otherwise noted.) parameter symbol conditions min typ max units reset threshold v th 4.2 4.4 4.5 v reset active timeout period - 340 - ms reset output voltage low v ol v cc =v th min, i sink =3.2ma - - 0.4 v reset output voltage high v oh v cc >v th max, i source =5.0ma v cc -1.5 - - v note 1: guaranteed but not 100% tested. note 2: quantization error is not included in specifications for temperature accuracy. for example, if the G768D device temperature is exactly +66.7c, or +68c (due to the quantization error plus the +1/2c offset used for rounding up) and still be within the guaranteed 3c error limits for the +60c to +100c tem- perature range. see table3. note 3: a remote diode is any diode-connected transistor from table1. t r is the junction temperature of the re- mote diode. see remote diode selection for remote diode forward voltage requirements. note 4: the smbus logic block is a static design that works with clock frequencies down to dc. while slow op- eration is possible, it violates the 10khz minimum clock frequency and smbus specifications, and may monopolize the bus. note 5: note that a transition must internally provide at least a hold time in order to bridge the undefined region (300ns max) of smbclk's falling edge.
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 5 G768D global mixed-mode technology inc. pin description pin name function 1 fanvcc output connected to v cc of fan. 2,15 v cc supply voltage input, 4.5v to 5.5v. bypass to gnd with a 0.1f capacitor. 3 dxp1 combined current source and a/d positive input for remote-diode channel 1. do not leave dxp1 floating; tie dxp1 to dxn if no remote diode on channel 1 is used. place a 2200pf capacitor between dxp1 and dxn for noise filtering. 4 dxn combined current sink and a/d negative input. dxn is common negative node of both remote diodes on channel 1 and 2. the traces of dxp1-dxn and dxp2-dxn pairs should be routed independently. the common dxn should be connected together as close as possible to the ic. dxn is internally connected to the gnd pin for signal ground use. 5 dxp2 combined current source and a/d positive input for remote-diode channel 2. do not leave dxp2 floating; tie dxp2 to dxn if no remote diode on channel 2 is used. place a 2200pf capacitor between dxp2 and dxn for noise filtering. 6 reset reset output remains low while v cc is below the reset threshold, and for 340ms after v cc rises above the reset threshold. 7 dgnd digital ground. 8 agnd analog ground. 9 clk 32.768khz clock input for fan controller. 10 fg fan pulse input. 11 alert smbus alert (interrupt) output, open drain. 12 smbdata smbus serial-data input / output, open drain. 13 nc 14 smbclk smbus serial-clock input. 16 th_shut thermal shutdown output, push-pull output. detailed description the G768D is a 3-in-1 ic. it consists of one tempera- ture sensor, 1 fan speed controller and provides sys- tem-reset function. the temperature sensor is designed to work in con- junction with an external micro-controller (c) or other intelligence in thermostatic, process-control, or moni- toring applications. the c is typically a powerman- agement or keyboard controller, generating smbus se- rial commands by "bit-banging" general-purpose in- put-output (gpio) pins or via a dedicated smbus inter- face block. essentially a 12-bit serial analog-to-digital converter (adc) with a sophisticated front end, the G768D con- tains a switched current source, a multiplexer, an adc, an smbus interface, one fan controller, a reset circuit and associated control logic (figure 1). temperature data from the adc is loaded into two data registers, where it is automatically compared with data previously stored in four over/under-temperature alarm registers. adc and multiplexer the adc is an averaging type that integrates over a 60ms period (each channel, typical). the multiplexer automatically steers bias currents through two remote diodes, measures their forward voltages, and computes their temperatures. all chan- nels are converted automatically once the conversion process has started, either in free-running or sin- gle-shot mode. if one of the two channels is not used, the device still performs all measurements, and the user can simply ignore the results of the unused channel. if the remote diode channel is unused, tie dxpx to dxn rather than leaving the pins open. the dxn input is internally connected to the ground node inside the chip to set up the analog to digital (a/d) inputs for a differential measurement. the worst-case dxp-dxn differential input voltage range is 0.25v to 0.95v. excess resistance in series with the remote diode causes about +1/2c error per ohm. likewise, 200v of offset voltage forced on dxp-dxn causes about 1c error.
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 6 G768D global mixed-mode technology inc. fig 1. functional diagram a/d conversion sequence if a start command is written (or generated automati- cally in the free-running auto-convert mode), both two channels are converted, and the results of both meas- urements are available after the end of conversion. a busy status bit in the status byte shows that the de- vice is actually performing a new conversion; however, even if the adc is busy, the results of the previous conversion are always available. remote-diode selection temperature accuracy depends on having a good-quality, diode-connected small-signal transistor. accuracy has been experimentally verified for all of the devices listed in table 1. the G768D can also directly measure the die temperature of cpus and other integrated circuits having on-board tempera- ture-sensing diodes. the transistor must be a small-signal type with a relatively high forward voltage; otherwise, the a/d input voltage range can be violated. the forward voltage must be greater than 0.25v at 10a; check to ensure this is true at the highest ex- pected temperature. the forward voltage must be less than 0.95v at 200a; check to ensure this is true at the lowest expected temperature. large power transistors don't work at all. also, ensure that the base resistance is less than 100 ? . tight specifications for forward current gain (+50 to +150, for example) indicate that the manufacturer has good process controls and that the devices have consistent vbe characteristics. thermal mass and self-heating thermal mass can seriously degrade the G768D's effective accuracy. the thermal time constant of the ssop-16 package is about 140sec in still air. for the G768D junction temperature to settle to within +1c after a sudden +100c change requires about five time constants or 12 minutes. the use of smaller packages for remote sensors, such as sot23s, im- proves the situation. take care to account for thermal gradients between the heat source and the sen- sor ,and ensure that stray air current across the sen- sor package do not interfere with measurement accu- racy. table 1. remote-sensor transistor manufacturers manufacturer model number philips pmbs 3904 motorola (usa) mmbt3904 national semiconductor (usa) mmbt3904 note:transistors must be diode-connected (base short -ed to collector). dxp2 fan control thermal shutdown logic control logic smbus registers mux adc reset circuit fanvcc fg th_shut smbclk smbdata alert reset v cc + + dxp1 dxn + internal ground clk v cc dxp2 fan control thermal shutdown logic control logic smbus registers mux adc reset circuit fanvcc fg th_shut smbclk smbdata alert reset v cc + + dxp1 dxn + internal ground clk v cc
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 7 G768D global mixed-mode technology inc. adc noise filtering the adc is an integrating type with inherently good noise rejection, especially of low-frequency signals such as 60hz/120hz power-supply hum. micro-power operation places constraints on high-frequency noise rejection; therefore, careful pc board layout and proper external noise filtering are required for high- accuracy remote measurements in electrically noisy environments. high-frequency emi is best filtered at dxp and dxn with an external 2200pf capacitor. this value can be increased to about 3300pf(max), including cable ca- pacitance. higher capacitance than 3300pf introduces errors due to the rise time of the switched current source. nearly all noise sources tested cause the adc meas- urements to be higher than the actual temperature, typically by +1c to 10c, depending on the frequency and amplitude (see typical operating characteristics). pc board layout place the G768D as close as practical to the remote diode. in a noisy environment, such as a computer motherboard, this distance can be 4 in. to 8 in. (typical) or more as long as the worst noise sources (such as crts, clock generators, memory buses, and isa/pci buses) are avoided. do not route the dxp-dxn lines next to the deflection coils of a crt. also, do not route the traces across a fast memory bus, which can easily introduce +30c error, even with good filtering, otherwise, most noise sources are fairly benign. route the dxp and dxn traces in parallel and in close proximity to each other, away from any high-voltage traces such as +12vdc. leakage currents from pc board contamination must be dealt with carefully, since a 20m ? leakage path from dxp to ground causes about +1c error. route the 2 pairs of dxp1-dxn and dxp2-dxn traces independently (figure 2a). connect the com- mon dxn as close as possible to the dxn pin on ic (figure 2a). connect guard traces to gnd on either side of the dxp-dxn traces (figure 2b). with guard traces in place, routing near high-voltage traces is no longer an issue. route through as few vias and crossunders as possi- ble to minimize copper/solder thermocouple effects. when introducing a thermocouple, make sure that both the dxp and the dxn paths have matching thermocouples. in general, pc board- induced ther- mocouples are not a serious problem, a copper-solder thermocouple exhibits 3v/c, and it takes about 200v of voltage error at dxp-dxn to cause a +1c measurement error. so, most parasitic thermocouple errors are swamped out. use wide traces. narrow ones are more inductive and tend to pick up radiated noise. the 10 mil widths and spacing recommended on figure 2 aren't absolutely necessary (as they offer only a minor improvement in leakage and noise), but try to use them where practi- cal. keep in mind that copper can't be used as an emi shield, and only ferrous materials such as steelwork will. placing a copper ground plane between the dxp-dxn traces and traces carrying high-frequency noise signals do not help reduce emi. pc board layout checklist ? place the G768D close to a remote diode. ? keep traces away from high voltages (+12v bus). ? keep traces away from fast data buses and crts. ? use recommended trace widths and spacing. ? place a ground plane under the traces ? use guard traces flanking dxp and dxn and con- necting to gnd. ? route two dxpx-dxn pairs independently ? connect the common dxn as close as possible to the dxn pin on ic. ? place the noise filter and the 0.1f v cc bypass capacitors close to the G768D. ? fig 2(a) connect the common dxn as close as possible to the dxn pin on ic. fig 2 (b) recommended dxp/dxn pc gnd dxp dxn gnd 10 mils minimum 10 mils 10 mils 10 mils dxp1 dxn dxn dxp2 dxp1 dxn G768D dxp2 gnd chip boundary gnd
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 8 G768D global mixed-mode technology inc. twisted pair and shielded cables for remote-sensor distances longer than 8 in., or in particularly noisy environments, a twisted pair is rec- ommended. its practical length is 6 feet to 12feet (typi- cal) before noise becomes a problem, as tested in a noisy electronics laboratory. for longer distances, the best solution is a shielded twisted pair like that used for audio microphones. connect the twisted pair to dxp and dxn and the shield to gnd, and leave the shield's remote end unterminated. excess capacitance at dx_limits practical remote sensor distances (see typical operating characteris- tics), for very long cable runs, the cable's parasitic capacitance often provides noise filtering, so the 2200pf capacitor can often be removed or reduced in value. cable resistance also affects remote-sensor accuracy; 1 ? series resistance introduces about + 1c error. low-power standby mode standby mode disables the adc and reduces the supply-current drain to less than 10a. enter standby mode via the run/stop bit in the configuration byte register. in standby mode, all data is retained in mem- ory, and the smb interface is alive and listening for reads and writes. this is valid for temperature sensor only. standby mode is not a shutdown mode. with activity on the smbus, extra supply current is drawn (see typical operating characteristics). in software standby mode, the G768D can be forced to perform temperature measurement via the one-shot command, despite the run/stop bit being high. supply-current drain during the 125ms conversion period is always about 500a. slowing down the con- version rate reduces the average supply current (see typical operating characteristics). in between con- versions, the instantaneous supply current is about 200a due to the current consumed by the system resetting circuit. fan controller since the fan speed is measured by counting the num- ber of 32.768khz cycles between the rising edges of two fan speed pulses. in this way, we are actually measuring the period of the fan speed. to avoid the cost of doing division to obtain the speed, this count number, n, is used in the pwm control algorithm, thus, the desired fan speed should be programmed by writ- ing the corresponding count number. the count num- ber is given by: n: count number p: fg pulses number per revolution p=1 ? n = 983040 / rpm p=2 ? n = 491520 / rpm p=4 ? n = 245762 / rpm some selected count number for p=2 are listed below . table 2. rpm n 3000 164 4000 123 5000 98 6000 82 7000 70 8000 61 9000 55 10000 49 20000 25 30000 16 to stop the fan, program the fan speed register to 255. this also makes the fan controller enter power saving mode. controlling fan at lower speed for stably controlling fans at lower rotation speed, three schemes are recommended as below: 1.use larger decoupling capacitors between fanvcc and gnd. 2.shunt a capacitor of 1f-2f on fg pin to gnd. 3.use fans with open-collector fg outputs. when controlling fans under lower rotation speed, the output voltage of fanvcc would be too low for fan to generate recognizable fg signals. using decouple capacitors on fanvcc and fg is to increase the snr on fg pins. while using fans with open-collector fg outputs can thoroughly solve the problem, because the logic high level of fg would be fixed to 5v. reset immunity negative-going v cc transients in addition to issuing a reset to the microprocessor (p) during power-up, power-down, and brownout condi- tions, the G768D is relatively immune to short duration negative-going v cc transients (glitches). typically, for the G768D, a v cc transient that goes 100mv below the reset threshold and lasts 20s or less will not cause a reset pulse. a 0.1f bypass ca- pacitor mounted as close as possible to the v cc pin provides additional transient immunity.
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 9 G768D global mixed-mode technology inc. ensuring a valid reset output down to v cc = 0v when v cc falls below 1v, the G768D reset output no longer sinks current-it becomes an open circuit. therefore, high-impedance cmos logic inputs con- nected to reset can drift to undetermined voltages. this presents no problem in most applications, since most p and other circuitry is inoperative with v cc be- low 1v. however, in applications where reset must be valid down to 0v, adding a pull-down resistor to reset causes any stray leakage currents to flow to ground, holding reset low (figure 3). r1's value is not critical; 100k ? is large enough not to load reset and small enough to pull reset to ground. interfacing to ps with bi-directional reset pins a p with bi-directional reset pins (such as the mo- torola 68hc11 series) can connect to the G768D reset output. if, for example, the G768D reset output is asserted high and the p wants to pull it low, indeter- minate logic levels may result. to correct this, connect a 4.7k ? resistor between the G768D reset output and the p reset i/o (figure 4). buffer the G768D reset output to other system components. fig 3 reset valid to v cc = ground circuit smbus digital interface from a software perspective, the G768D appears as a set of byte-wide registers that contain temperature data, alarm threshold values, fan speed data, or con- trol bits, a standard smbus 2-wire serial interface is used to read temperature data and write control bits and alarm threshold data. each a/d and fan control channel within the device responds to the same smbus slave address for normal reads and writes. the G768D employs four standard smbus protocols: write byte, read byte, send byte, and receive byte (figure 5). the shorter receive byte protocol allows quicker transfers, provided that the correct data regis- ter was previously selected by a read byte instruction. use caution with the shorter protocols in multi-master systems, since a second master could over-write the command byte without informing the first master. the temperature data format is 7bits plus sign in twos-complement form for each channel, with each data bit representing 1c (table3), transmitted msb first. measurements are offset by +1/2c to minimize internal rounding errors; for example, +99.6c is re- ported as +100c. fig 4. interfacing to ps with bi-directional reset i/o v cc G768D reset gnd r1 100k v cc G768D reset gnd buffer reset gnd v cc p 4.7k buffered reset to other system components v cc G768D reset gnd buffer reset gnd v cc p 4.7k buffered reset to other system components
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 10 G768D global mixed-mode technology inc. write byte format s address wr ack command ack data ack p 7 bits 8 bits 8 bits 1 slave address: equivalent to chip-select line of a 3-wire interface command byte: selects, which register you, are writing to data byte: data goes into the register set by the command byte (to set thresholds, configuration masks, and sampling rate) read byte format s address wr ack command ack s address rd ack data /// p 7 bits 8 bits 7 bits 8 bits slave address: equivalent to chip- select line command byte: selects, which register you, are reading from slave address: repeated due to change in data-flow direction data byte: reads from the register set by the command byte send byte format s address wr ack command ack p 7 bits 8 bits command byte: sends command with no data usually used for one-shot command receive byte format s address rd ack data /// p 7 bits 8 bits data byte: reads data from the register commanded by the last read byte or write byte transmission; also used for smbus alert response return address s = start condition shaded = slave transmission p = stop condition /// = not acknowledged fig 5. smbus protocols table 3. data format (twos-complement) digital output data bits temp. ( c) round temp. ( c) sign msb lsb +130.00 +127 0 111 1111 +127.00 +127 0 111 1111 +126.50 +127 0 111 1111 +126.00 +126 0 111 1110 +25.25 +25 0 001 1001 +0.50 +1 0 000 0001 +0.25 +0 0 000 0000 +0.00 +0 0 000 0000 -0.25 +0 0 000 0000 -0.50 +0 0 000 0000 -0.75 -1 1 111 1111 -1.00 -1 1 111 1111 -25.00 -25 1 110 0111 -25.50 -25 1 110 0110 -54.75 -55 1 100 1001 -55.00 -55 1 100 1001 -65.00 -65 1 011 1111 -70.00 -65 1 011 1111 alarm threshold registers four registers store alarm threshold data, with high-temperature (thigh) and low-temperature (tlow) registers for each a/d channel. if either measured temperature equals or exceeds the corre- sponding alarm threshold value, an alert interrupt is asserted. the power-on-reset (por) state of both thigh regis- ters is full scale (0111 1111, or +127c). the por state of both tlow registers is 1100 1001 or -55c. diode fault alarm there is a continuity fault detector at dxp that detects whether the remote diode has an open-circuit condi- tion. at the beginning of each conversion, the diode fault is checked, and the status byte is updated. this fault detector is a simple voltage detector; if dxp rises above v cc -1v (typical) due to the diode current source, a fault is detected. note that the diode fault isn't checked until a conversion is initiated, so immediately after power-on reset the status byte indicates no fault is present, even if the diode path is broken.
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 11 G768D global mixed-mode technology inc. if the remote channel is shorted (dxp to dxn or dxp to gnd), the adc reads 0000 0000 so as not to trip either the thigh or tlow alarms at their por set- tings. in applications that are never subjected to 0c in normal operation, a 0000 0000 result can be checked to indicate a fault condition in which dxp is acciden- tally short circuited. similarly, if dxp is short circuited to v cc , the adc reads +127c for both channels, and the device alarms. alert interrupts the alert interrupt output signal is latched and can only be cleared by reading the alert response ad- dress. interrupts are generated in response to thigh and tlow comparisons and when the remote diode is disconnected (for continuity fault detection). the in- terrupt does not halt automatic conversions; new tem- perature data continues to be available over the smbus interface after alert is asserted. the interrupt output rupt output pin is open-drain so that device can share a common interrupt line. the interrupt rate can never exceed the conversion rate. the interface responds to the smbus alert response address, an interrupt pointer return-address feature (see alert response address section). prior to taking corrective action, always check to ensure that an in- terrupt is valid by reading the current temperature. alert response address the smbus alert response interrupt pointer provides quick fault identification for simple slave devices that lack the complex, expensive logic needed to be a bus master. upon receiving an alert interrupt signal, the host master can broadcast a receive byte transmission to the alert response slave address (0001 100). then any slave device that generated an interrupt attempts to identify itself by putting its own address on the bus. table 4. command-byte bit assignments register command por state function rrte2 00h 0000 0000b r ead 2nd remote temperature: returns latest temperature rrte1 01h 0000 0000b read 1st remote temperature: returns latest temperature rsl 02h n/a read status byte (flags, busy signal) rcl 03h 0000 0000b read configuration byte rcra 04h 0000 0010b read conversion rate byte rrhi2 05h 0111 1111b (127) read 2nd remote thigh limit rrls2 06h 1100 1001b(-55) read 2nd remote tlow limit rrhi1 07h 0111 1111b (127) read 1st remote thigh limit rrls1 08h 1100 1001b (-55) read 1st remote tlow limit wca 09h n/a write configuration byte wcrw 0ah n/a write conversion rate byte wrha2 0bh n/a write 2nd remote thigh limit wrln2 0ch n/a write 2nd remote tlow limit wrha1 0dh n/a write 1st remote thigh limit wrln1 0eh n/a write 1st remote tlow limit osht 0fh n/a one-shot command (use send-byte format) set_cnt1 10h 1111 1111b write 1st fan programmed speed register act_cnt1 11h 1111 1111b read 1st fan actual speed register fan_sta1 12h 10b read 1st fan status register tmax1 31h 0100 0110b (70) 1st remote tmax thyst1 32h 0011 1100b (60) 1st remote thyst tmax2 33h 0100 0110b (70) 2nd remote tmax thyst2 34h 0011 1100b (60) 2nd remote thyst tcrit1 35h 0110 1100b (108) critical temperature for 1 st remote temperaure sensor tcrit2 36h 0101 1000b (88) critical temperature for 2 nd remote temperaure sensor
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 12 G768D global mixed-mode technology inc. the alert response can activate several different slave devices simultaneously, similar to the smbus general call. if more than one slave attempts to respond, bus arbitration rules apply, and the device with the lower address code wins. the losing device does not generate an acknowledge and continues to hold the alert line low until serviced (implies that the host interrupt input is level sensitive). successful reading of the alert re- sponse address clears the interrupt latch. command byte functions the 8-bit command byte register (table 4) is the mas- ter index that points to the various other registers within the G768D. the register's por state is 0000 0000, so that a receive byte transmission (a protocol that lacks the command byte) that occurs immediately after por returns the current local temperature data. the one-shot command immediately forces a new conversion cycle to begin. in software standby mode ( run /stop bit = high), a new conversion is begun, after which the device returns to standby mode. if a conversion is in progress when a one-shot command is received in auto-convert mode (run/stop bit = low) between conversions, a new conversion begins, the conversion rate timer is reset, and the next automatic conversion takes place after a full delay elapses. configuration byte functions the configuration byte register contents are listed in table 5. bit 7(mask) is used to mask alert interrupt. bit 6 ( run /stop) is to put the device in software standby mode. setting bit 5 (det_fan) with logic 1 can activate the detection of fan failure. logic 1 in bit 4 (en_th_shut) makes thermal shutdown function valid and logic 0 disables this function and keep th_shut pin low. bit 3~0 forms thermal shutdown fault queue. the number of faults these bits decided are listed in table 6. thermal status byte functions the thermal status byte register (02h) (table 6) indi- cates which (if any) temperature thresholds have been exceeded. this byte also indicates whether or not the adc is converting and whether there is an open circuit in the remote diode dxpx-dxn path. after por, the normal state of all the flag bits is zero, assuming none of the alarm conditions are present. the status byte is cleared by any successful read of the status, unless the fault persists. note that the alert interrupt latch is not automatically cleared when the status flag bit is cleared. when reading the status byte, you must check for in- ternal bus collisions caused by asynchronous adc timing, or else disable the adc prior to reading the status byte (via the run /stop bit in the configura- tion byte). in one-shot mode, read the status byte only after the conversion is complete, which is 150ms max after the one-shot conversion is commanded. table 5. configuration-byte bit assignments bit name por state function 7 (msb) mask 0 masks all alert interrupts when high. 6 run / stop 0 standby mode control bit. if high, the device immediately stops converting and en- ters standby mode. if low, the device converts in either one-shot or timer m ode. 5 det_fan 0 validation of the fan failure detection. if high, activated. if low, disable. 4 en_th_shut 1 validation of the fault queue function of thermal shutdown. 3-0 fq_th_shut 0010b fault queue. number of faults necessary to detect before setting th_shut output to avoid false tripping due to noise. table 6. number of faults assigned by fq_th_shut fq_th_shut number of faults fq_th_shut number of faults 0000b 1 1000b 9 0001b 2 1001b 10 0010b 3(power-up default) 1010b 11 0011b 4 1011b 12 0100b 5 1100b 13 0101b 6 1101b 14 0110b 7 1110b 15 0111b 8 1111b 16
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 13 G768D global mixed-mode technology inc. table 7. status-byte bit assignments bit name function 7(msb) busy a high indicates that the adc is busy converting. 6 rhigh2* a high indicates that the 2 nd diode high-temperature alarm has activated. 5 rlow2* a high indicates that the 2 nd diode low-temperature alarm has activated. 4 rhigh1* a high indicates that the 1 st diode high-temperature alarm has activated. 3 rlow1* a high indicates that the 1 st diode low-temperature alarm has activated. 2 open* a high indicates a remote-diode continuity (open-circuit) fault. 1 rfu reserved for future use (returns 0) 0(lsb) fan_fail* a high indicates that the fan failure alarm has activated. *these flags stay high until cleared by por, or until the status byte register is read. table 8. conversion-rate control byte data conversion rate (hz) temperature sensor average supply current (a typ, at v cc = 5v) 00h 0.0625 30 01h 0.125 33 02h 0.25 35 03h 0.5 48 04h 1 70 05h 2 128 06h 4 225 07h 8 425 08h to ffh rfu - table 9. rrte2 and rrte1 temp register update timing chart operating mode conversion initiated by: new conversion rate (changed via write to crw) time until rrte2 and rrte1 are updated auto-convert power-on reset n/a (0.25hz) 156ms max auto-convert 1-shot command, while idling between automatic conversions n/a 156ms max auto-convert 1-shot command that occurs during a conversion n/a when current conversion is complete (1-shot is ignored) auto-convert rate timer 0.0625hz 20sec auto-convert rate timer 0.125hz 10sec auto-convert rate timer 0.25hz 5sec auto-convert rate timer 0.5hz 2.5sec auto-convert rate timer 1hz 1.25sec auto-convert rate timer 2hz 625ms auto-convert rate timer 4hz 312.5ms auto-convert rate timer 8hz 237.5ms software standby run/stop bit n/a 156ms software standby 1-shot command n/a 156ms
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 14 G768D global mixed-mode technology inc. to check for internal bus collisions, read the status byte. if the least significant seven bits are ones, dis- card the data and read the status byte again. the status bits lhigh, llow, rhigh, and rlow are refreshed on the smbus clock edge immediately fol- lowing the stop condition, so there is no danger of losing temperature-related status data as a result of an internal bus collision. the open status bit (diode continuity fault) is only refreshed at the beginning of a conversion, so open data is lost. the alert inter- rupt latch is independent of the status byte register, so no false alerts are generated by an internal bus colli- sion. when auto-converting, if the thigh and tlow limits are close together, it's possible for both high-temp and low-temp status bits to be set, depending on the amount of time between status read operations (espe- cially when converting at the fastest rate). in these circumstances, it's best not to rely on the status bits to indicate reversals in long-term temperature changes and instead use a current temperature reading to es- tablish the trend direction. temperature conversion rate byte the conversion rate register (table 7) programs the time interval between conversions in free running auto-convert mode. this variable rate control reduces the supply current in portable-equipment applications. the conversion rate byte's por state is 02h (0.25hz). the G768D looks only at the 3 lsb bits of this register, so the upper 5 bits are "don't care" bits, which should be set to zero. the conversion rate tolerance is 25% at any rate setting. valid a/d conversion results for all channels are avail- able one total conversion time (125ms nominal, 156ms maximum) after initiating a conversion, whether con- version is initiated via the run/stop bit, one-shot command, or initial power-up. changing the conver- sion rate can also affect the delay until new results are available. see table 8. programmed fan speed register the programmed fan speed register 10h is read / write register. they contain the count number of the desired fan speed. power up default is ffh. actual fan speed register the actual fan speed register 11h is read only. they contain the count number of the actual fan speed. power up default is ffh. fan status register the fan status registers 12h is read only. its bit 0 is set to 1 when the actual fan speed is 20% outside the desired speed. its bit 1 is set to 1 when fan speed is below 1920 rpm. power up default is 0000_0010b. watchdog for fan control four temperature threshold registers intervene the control of fan. pin fanvcc go high when one of the remote temperature, dx1 and dx2, rises above the respective tmax. the control is not released until both temperature values drop below their thyst be- sides, the fan controller also fully turns on the fan when either of the two remote diodes is open or both are short. the power-up default values for tmax and thyst are +70c and +60c, respectively. this allows the G768D to be used in the occasion when system fails and loses the fan control of G768D. slave addresses the G768D appears to the smbus as one device hav- ing a common address for all the adc and fan control channels. the device address is fixed to be 7ah for write and 7bh for read. the G768D also responds to the smbus alert re- sponse slave address (see the alert response ad- dress section). por and uvlo the G768D has a volatile memory. to prevent am- biguous power-supply conditions from corrupting the data in memory and causing erratic behavior, a por voltage detector monitors v cc and clears the memory if v cc falls below 1.7v (typical, see electrical charac- teristics table). when power is first applied and v cc rises above 1.75v (typical), the logic blocks begin op- erating, although reads and writes at v cc levels below 3v are not recommended. a second v cc comparator, the adc uvlo comparator, prevents the adc from converting until there is sufficient headroom (v cc = 2.8v typical). power-up defaults: ? interrupt latch is cleared. ? adc begins auto /converting at a 0.25hz rate. ? command byte is set to 00h to facilitate quick re- mote receive byte queries. ? thigh and tlow registers are set to max and min limits, respectively detection on fan failure setting bit 5 (det_fan) of configuration-byte register with logic 1 activates the detection of fan fail- ure. G768D detects fan failure via fg pin. G768D de- fines fan failure as no transition on fg pin for about 0.5sec or the fan measurement result is 255 counts for consecutive 8 times, it takes about 0.25sec. once fan failure is detected the alert# will be set to logic low and the bit 0 (fan_fail) of status-byte will be set to logic high. to clear the alert# signal caused by fan failure, the det_fan bit should be set to 0 then issue an ara command on serial bus.
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 15 G768D global mixed-mode technology inc. thermal shutdown signal when the temperature of dx1 reaches or exceeds the tcrit1 threshold consecutively for the times equal to the number of faults of the fq_th_shut registers, th_shut pin becomes logic high. the same mechanism is duplicated for dx2. there fore, either one of dx1, dx2 continuously over their re- spective tcrit, the th_shut will assert logic high to indicate a thermal shutdown event. figure 6. smbus write timing diagram a = start condition h = lsb of data clocked into slave b = msb of address clocked into slave i = slave pulls smbdata line low c = lsb of address clocked into slave j = acknowledge clocked into master d = r / w bit clocked into slave k = acknowledge clocked pulse e = slave pulls smb data line low l = stop condition data executed by slave f = acknowledge bit clocked into master m = new start condition g = msb of data clocked into slave figure 7. smbus read timing diagram a = start condition g = msb of data clocked into master b = msb of address clocked into slave h = lsb of data clocked into master c = lsb of address clocked into slave i = acknowledge clocked pulse d = r / w bit clocked into slave j = stop condition e = slave pulls smbdata line low k= new start condition f =acknowledge bit clocked into master smbclk smbdata ab c de f g hij k l m t su:sta t hd:sta t su:dat t hd:dat t su:sto t buf t low t high smbclk smbdata ab cdef g hi jk t su:sta t hd :sta t su:dat t su:sto t buf t low t high smbclk smbdata ab cdef g hi jk t su:sta t hd :sta t su:dat t su:sto t buf t low t high
ver: 1.4 may 23, 2003 tel: 886-3-5788833 http://www.gmt.com.tw 16 G768D global mixed-mode technology inc. package information note: 1. package body sizes exclude mold flash and gate burrs 2. dimension l is measured in gage plane 3. tolerance 0.10mm unless other wise specified 4. controlling dimension is millimeter converted inch dimensions are not necessarily exact. dimension in mm dimension in inch symbols min nom max min nom max a 1.35 1.60 1.75 0.053 0.064 0.069 a1 0.10 ----- 0.25 0. 004 ----- 0. 010 a2 ----- 1.45 ----- ----- 0. 057 ----- b 0.20 0.25 0.30 0.008 0.010 0.012 c 0.19 ----- 0.25 0. 007 ----- 0. 010 d 4.80 ----- 5.00 0. 189 ----- 0. 197 e 5.80 ----- 6.20 0. 228 ----- 0. 244 e1 3.80 ----- 4.00 0. 150 ----- 0. 157 e ----- 0.64 ----- ----- 0. 025 ----- l 0.40 ----- 1.27 0. 016 ----- 0. 050 y ----- ----- 0.10 ----- ----- 0. 004 0o ----- 8o 0o ----- 8o taping specification gmt inc. does not assume any res ponsibility for use of any circuitry described, no circuit patent licenses are implied and gmt inc. reserves the right at any t ime without notice to change said circuitry and specifications. d e1 e 7 (4x) a1 a2 a e b y c l feed direction typical ssop package orientation feed direction typical ssop package orientation

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