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l8583d line card access switch document id# 080990 date: oct 31, 2002 rev: a version: 1 distribution: public features small size/surface-mount packaging monolithic ic reliability low impulse noise make-before-break, break-before-make operation clean, bounce-free switching low, matched on-resistance built-in current limiting, thermal shutdown, and slic protection 5 v only operation, very low power consumption battery monitor, all-off state upon loss of battery no emi latched logic level inputs, no driver circuitry only one external protector required applications central office dlc pbx daml hfc/fitl description the legerity l8583d line card access switch is a monolithic solid-state device providing the equivalent switching functionality of three 2-form c switches. the l8583d is designed to provide power ringing access, line test access (test out), and slic test access (test in) to tip and ring in central office, digital loop carrier, private branch exchange, digitally added main line, and hybrid fiber coax/fiber- in-the-loop analog line card applications. an addi- tional pair of solid-state contacts are also available to provide access for testing of the ringing generator. the l8583d has eight states: the idle talk state (line break switches closed, all other switches open), the power ringing state (ringing access switches closed, all other switches open), loop access state (loop access switches closed, all switches open), slic test state (test in switches closed, all other switches open), simultaneous loop and slic access state (loop and test in switches closed, all others open), ringing generator test state (ring test switches closed, all others open), simultaneous test-out and ring-test state (ring and test out switches closed), and an all- off state. the l8583d is appropriate for central office, access, digital loop carrier, and other telcordia tech- nologies ? tr-57 applications. the l8583d offers break-before-make or make- before-break switching, with simple logic-level input control. because of the solid-state construction, volt- age transients generated when switching into an inductive ringing lead during ring cadence or ring trip are minimized, possibly eliminating the need for external zero cross switching circuitry. state control is via logic level inputs, so no additional driver circuitry is required. the line break switch is a linear switch that has exceptionally low on-resistance and an excellent on-resistance matching characteristic. the ringing access switch has a breakdown voltage rating >480 v which is sufficiently high, with proper protec- tion, to prevent breakdown in the presence of a tran- sient fault condition (i.e., passing the transient on to the ringing generator). the l8583d provides an integrated diode bridge along with current limiting and thermal shutdown for protection of the device itself and the subsequent subscriber line integrated circuit (slic). for lcas protection, power cross is reduced by the current- limiting and thermal shutdown circuits and lightning reduced by the current-limit circuit. residue faults are shunted from the slic by the diode bridge.
2 2 data sheet october 2002 l8583d line card access switch description (continued) to protect the l8583d from an overvoltage fault condi- tion, use of a secondary protector is required. the secondary protector must limit the voltage seen at the tip/ring terminals to prevent the breakdown voltage of the switches from being exceeded. to minimize stress on the solid-state contacts, use of a foldback-type or crowbar-type secondary protector is recommended. please contact your legerity account representative for a choice of recommended secondary protection device. with proper choice of secondary protection, a line card using the l8583d will meet all relevant itu-t, lssgr, fcc, or ul ? protection requirements. the l8583d operates off of a 5 v supply only. this gives the device extremely low idle and active power dissipation and allows use with virtually any range of battery voltage. this makes the l8583d especially appropriate for remote power applications such as daml or foc/fitl or other telcordia technologies gr 909 applications where power dissipation is partic- ularly critical. a battery voltage is also used by the l8583d, only as a reference for the integrated protection circuit. the l8583d will enter an all-off state upon loss of battery. during power ringing, to turn on and maintain the on state, the ring access switch and ring test switch will draw a nominal 2 ma from the ring generator. the l8583d device is packaged in a 20-pin plastic sog (l8583dey) and a 28-pin plastic sog (l8583dae). see figure 1 for an illustration of the 20-pin package and figure 2 for an illustration of the 28-pin package. pin information figure 1. 20-pin plastic sog figure 2. 28-pin plastic sog 20 19 18 17 14 13 12 11 1 2 3 4 5 v bat r bat r line f gnd t line v dd sw1 7 8 latch r ringing sw2 sw3 sw4 sw5 sw7 sw8 sw10 sw6 t testin t bat t ringing t testout in testin r testout r testin 9 10 in ring d gnd t sd in testout nc control logic 16 sw9 615 1670 28 27 26 25 24 23 22 20 19 18 17 21 16 15 1 2 3 4 5 6 7 8 v bat r bat r line nc f gnd nc nc t line v dd sw1 9 10 11 12 latch r ringing nc sw2 sw3 sw4 sw5 sw7 sw9 sw8 sw10 sw6 t testin t bat t ringing t testout in testin r testout r testin nc 13 14 in ring d gnd t sd in testout nc nc nc nc control logic 12-2365 (f).d
3 data sheet october 2002 l8583d line card access switch pin information (continued) * u = 75k typical pull-up resistor. d = 75k typical pull-down resistor. table 1. pin descriptions 20-pin sog 28-pin sog symbol * description 11f gnd fault ground. 25t testin test (in) access on tip. 36t bat connect to tip on slic side. 47t line connect to tip on line side. 58t ringing connect to return ground for ringing generator. 610t testout test (out) access on tip. 7 2, 3, 4, 9, 11, 21, 25, 26, 27 nc no connection. 812v dd 5 v supply. 913t sd temperature shutdown pin. can be used as a logic level input or an output. see table 16 and the switching behavior section of this data sheet for input pin description. as an output flag, this pin will read 5 v when the device is in its operational mode and 0 v in the thermal shutdown mode. to disable the thermal shutdown mechanism, tie this pin to 5 v (not recommended). 10 14 d gnd digital ground. 11 15 in testout u logic level switch input control. 12 16 in ring u logic level switch input control. 13 17 in testin d logic level switch input control. 14 18 latch d data input control, active-high, transparent low. 15 19 r testout test (out) access on ring. 16 20 r ringing connect to ringing generator. 17 22 r line connect to ring on line side. 18 23 r bat connect to ring on slic side. 19 24 r testin test (in) access on ring. 20 28 v bat battery voltage. used as a reference for protection circuit.
4 4 data sheet october 2002 l8583d line card access switch absolute maximum ratings stresses in excess of the absolute maximum ratings can cause permanent damage to the device. these are abso- lute stress ratings only. functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. exposure to absolute maximum ratings for extended periods can adversely affect device reliability. handling precautions although electrostatic discharge (esd) protection circuitry has been designed into this device, proper precautions must be taken to avoid exposure to esd and electrical overstress (eos) during all handling, assembly, and test operations. legerity employs both a human-body model (hbm) and a charged-device model (cdm) qualification requirement in order to determine esd-susceptibility limits and protection design evaluation. esd voltage thresh- olds are dependent on the circuit parameters used in each of the models, as defined by jedec's jesd22-a114 (hbm) and jesd22-c101 (cdm) standards. table 2. absolute maximum ratings parameter min max unit operating temperature range ?40 110 c storage temperature range ?40 150 c relative humidity range 5 95 % pin soldering temperature (t = 10 s max) ? 260 c 5 v power supply ? 7 v battery supply ? ?85 v logic input voltage ? 7 v input-to-output isolation ? 330 v pole-to-pole isolation ? 330 v table 3. hbm esd threshold voltage device rating l8583d 1000 v
5 data sheet october 2002 l8583d line card access switch electrical characteristics t a = ?40 c to +85 c, unless otherwise specified. minimum and maximum values are testing requirements. typical values are characteristics of the device and are the result of engineering evaluations. typical values are for information purposes only and are not part of the test- ing requirements. *v bat is used only as a reference for internal protection circuitry. if v bat rises above ?10 v, the device will enter an all-off state and remain in this state until the battery voltage drops below ?15 v. * applied voltage is 100 vp-p square wave at 100 hz. table 4. power supply specifications supply min typ max unit supply min typ max unit v dd 4.5 5 5.5 v v bat * ?19 ? ?72 v table 5. test in switches, 1 and 2 parameter test condition measure min typ max unit off-state leakage current: +25 c +85 c ?40 c vswitch (differential) = ?320 v to gnd vswitch (differential) = ?60 v to +260 v vswitch (differential) = ?330 v to gnd vswitch (differential) = ?60 v to +270 v vswitch (differential) = ?310 v to gnd vswitch (differential) = ?60 v to +250 v iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a on-resistance: +25 c +85 c ?40 c iswitch (on) = 5 ma, 10 ma iswitch (on) = 5 ma, 10 ma iswitch (on) = 5 ma, 10 ma ? v on ? v on ? v on ? ? ? 49 ? 37 ? 77 ? ? ? ? isolation: +25 c +85 c ?40 c vswitch (both poles) = 320 v, logic inputs = gnd vswitch (both poles) = 330 v, logic inputs = gnd vswitch (both poles) = 310 v, logic inputs = gnd iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a dv/dt sensitivity* ? ? ? 200 ? v/s
6 6 data sheet october 2002 l8583d line card access switch electrical characteristics (continued) * this parameter is not tested in production. choice of secondary protector should ensure this rating is not exceeded. ? applied voltage is 100 vp-p square wave at 100 hz. table 6. break switches, 3 and 4 parameter test condition measure min typ max unit off-state leakage current: +25 c +85 c ?40 c vswitch (differential) = ?320 v to gnd vswitch (differential) = ?60 v to +260 v vswitch (differential) = ?330 v to gnd vswitch (differential) = ?60 v to +270 v vswitch (differential) = ?310 v to gnd vswitch (differential) = ?60 v to +250 v iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a on-resistance: +25 c +85 c ?40 c t line = 10 ma, 40 ma, t bat = ?2 v t line = 10 ma, 40 ma, t bat = ?2 v t line = 10 ma, 40 ma, t bat = ?2 v ? v on ? v on ? v on ? ? ? 21.5 ? 16 ? 31 ? ? ? ? on-resistance match per on-resistance test condition of sw3, sw4 magnitude r on sw3 ? r on sw4 ?0.21.0 ? on-state voltage* iswitch = i limit at 50 hz/60 hz v on ??220v dc current limit: +85 c ?40 c vswitch (on) = 10 v vswitch (on) = 10 v iswitch iswitch 80 ? ? ? ? 250 ma ma dynamic current limit (t = <0.5 s) break switches in on state; ringing access switches off; apply 1000 v at 10/1000 s pulse; appropriate secondary protection in place iswitch ? 2.5 ? a isolation: +25 c +85 c ?40 c vswitch (both poles) = 320 v, logic inputs = gnd vswitch (both poles) = 330 v, logic inputs = gnd vswitch (both poles) = 310 v, logic inputs = gnd iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a dv/dt sensitivity ? ? ? ? 200 ? v/s
7 data sheet october 2002 l8583d line card access switch electrical characteristics (continued) * applied voltage is 100 vp-p square wave at 100 hz. * choice of secondary protector and series current-limit resistor should ensure these ratings are not exceeded. ? applied voltage is 100 vp-p square wave at 100 hz. table 7. ring test return switch, 5 parameter test condition measure min typ max unit off-state leakage current: +25 c +85 c ?40 c vswitch (differential) = ?320 v to gnd vswitch (differential) = ?60 v to +260 v vswitch (differential) = ?330 v to gnd vswitch (differential) = ?60 v to +270 v vswitch (differential) = ?310 v to gnd vswitch (differential) = ?60 v to +250 v iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a on-resistance iswitch (on) = 0 ma, 10 ma ? v on ?55110 ? isolation: +25 c +85 c ?40 c vswitch (both poles) = 320 v, logic inputs = gnd vswitch (both poles) = 330 v, logic inputs = gnd vswitch (both poles) = 310 v, logic inputs = gnd iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a dv/dt sensitivity* ? ? ? 200 ? v/s table 8. ringing test switch, 6 parameter test condition measure min typ max unit off-state leakage current: +25 c +85 c ?40 c vswitch (differential) = ?60 v to +190 v vswitch (differential) = +60 v to ?190 v vswitch (differential) = ?60 v to +200 v vswitch (differential) = +60 v to ?200 v vswitch (differential) = ?60 v to +180 v vswitch (differential) = +60 v to ?180 v iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a on-resistance iswitch (on) = 70 ma, 80 ma ? v on ??20 ? on voltage iswitch (on) = 1 ma ? ? ? 1.5 v steady-state current* ? ? ? ? 100 ma release current ? ? ? 500 ? a isolation: +25 c +85 c ?40 c vswitch (both poles) = 320 v, logic inputs = gnd vswitch (both poles) = 330 v, logic inputs = gnd vswitch (both poles) = 310 v, logic inputs = gnd iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a dv/dt sensitivity ? ???200?v/s
8 8 data sheet october 2002 l8583d line card access switch electrical characteristics (continued) * this parameter is not tested in production. choice of secondary protector should ensure this rating is not exceeded. ? applied voltage is 100 vp-p square wave at 100 hz. * choice of secondary protector and series current-limit resistor should ensure these ratings are not exceeded. ? applied voltage is 100 vp-p square wave at 100 hz. table 9. ring return switch, 7 parameter test condition measure min typ max unit off-state leakage current: +25 c +85 c ?40 c vswitch (differential) = ?320 v to gnd vswitch (differential) = ?60 v to +260 v vswitch (differential) = ?330 v to gnd vswitch (differential) = ?60 v to +270 v vswitch (differential) = ?310 v to gnd vswitch (differential) = ?60 v to +250 v iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a dc current limit vswitch (on) = 10 v iswitch ? 200 ? ma dynamic current limit (t = <0.5 s) break and loop switches in off state; ring return switch on; apply 1000 v at 10/1000 s pulse; appropriate sec- ondary protection in place iswitch?2.5?a on-resistance iswitch (on) = 0 ma, 10 ma ? v on ??110 ? on-state voltage* iswitch = i limit at 50 hz/60 hz v on ??130v isolation: +25 c +85 c ?40 c vswitch (both poles) = 320 v, logic inputs = gnd vswitch (both poles) = 330 v, logic inputs = gnd vswitch (both poles) = 310 v, logic inputs = gnd iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a dv/dt sensitivity ? ???200?v/s table 10. ringing access switch, 8 parameter test condition measure min typ max unit off-state leakage current: +25 c +85 c ?40 c vswitch (differential) = ?255 v to +210 v vswitch (differential) = +255 v to ?210 v vswitch (differential) = ?270 v to +210 v vswitch (differential) = +270 v to ?210 v vswitch (differential) = ?245 v to +210 v vswitch (differential) = +245 v to ?210 v iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a on voltage iswitch (on) = 1 ma ? ? ? 3 v ring generator current dur- ing ring v cc = 5 v in ring = 1 in testin = 0 in testout = 0 i ring- source ?2?ma steady-state current* ? ? ? ? 150 ma surge current* ? ? ? ? 2 a release current ? ? ? 500 ? a on-resistance iswitch (on) = 70 ma, 80 ma ? v on ??12 ? isolation: +25 c +85 c ?40 c vswitch (both poles) = 320 v, logic inputs = gnd vswitch (both poles) = 330 v, logic inputs = gnd vswitch (both poles) = 310 v, logic inputs = gnd iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a dv/dt sensitivity ? ???200?v/s
9 data sheet october 2002 l8583d line card access switch electrical characteristics (continued) * this parameter is not tested in production. choice of secondary protector should ensure this rating is not exceeded. ? applied voltage is 100 vp-p square wave at 100 hz. table 11. loop access switches, 9 and 10 parameter test condition measure min typ max unit off-state leakage current: +25 c +85 c ?40 c vswitch (differential) = ?320 v to gnd vswitch (differential) = ?60 v to +260 v vswitch (differential) = ?330 v to gnd vswitch (differential) = ?60 v to +270 v vswitch (differential) = ?310 v to gnd vswitch (differential) = ?60 v to +250 v iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a on-resistance: +25 c +85 c ?40 c iswitch (on) = 5 ma, 10 ma iswitch (on) = 5 ma, 10 ma iswitch (on) = 5 ma, 10 ma ? vo n ? vo n ? vo n ? ? ? 49 ? 37 ? 77 ? ? ? ? on-state voltage* iswitch = i limit at 50 hz/60 hz v on ??130 v dc current limit: +85 c ?40 c vswitch (on) = 10 v vswitch (on) = 10 v iswitch iswitch 80 ? ? ? ? 250 ma ma dynamic current limit (t = <0.5 s) break switches in on state; ringing access switches off; apply 1000 v at 10/1000 s pulse; appropriate second- ary protection in place iswitch ? 2.5 ? a isolation: +25 c +85 c ?40 c vswitch (both poles) = 320 v, logic inputs = gnd vswitch (both poles) = 330 v, logic inputs = gnd vswitch (both poles) = 310 v, logic inputs = gnd iswitch iswitch iswitch ? ? ? ? ? ? 1 1 1 a a a dv/dt sensitivity ? ???200?v/s
10 10 data sheet october 2002 l8583d line card access switch electrical characteristics (continued) * temperature shutdown flag (t sd ) will be high during normal operation and low during temperature shutdown state. zero cross current turn off the ring access switch (sw8) is designed to turn off on the next zero current crossing after application of the appropriate logic input control. this switch requires a current zero cross to turn off. switch 8, once on, will remain in the on state (regardless of logic input) until a current zero cross. therefore, to ensure proper operation of switch 8, this switch should be connected, via proper impedance, to the ringing generator or some other ac source. do not attempt to switch pure dc with switch 8. the ringing test access switch, sw6, also has similar characteristics to switch 8 and should also only be used to switch signals with zero current crossings. for a detailed explanation of the operation of switches 6 and 8, please refer to the an introduction to l758x series of line card access switches application note. table 12. additional electrical characteristics parameter test condition measure min typ max unit digital input characteristics: input low voltage ? ? ? ? 1.5 v input high voltage ? ? 3.5 ? ? v input leakage current (high) v dd = 5.5 v, v bat = ?75 v, vlogicin = 5 v llogicin ? ? 500 a input leakage current (low) v dd = 5.5 v, v bat = ?75 v, vlogicin = 0 v llogicin ? ? 500 a power requirements: power dissipation v dd = 5 v, v bat = ?48 v, idle/talk state all-off state, ringing state or access state i dd , i bat i dd , i bat i dd , i bat ? ? ? 4.5 3.8 4.4 7 6 11 mw mw mw v dd current v dd = 5 v, idle/talk state all-off state, ringing state i dd i dd i dd ? ? ? 0.860 0.760 0.850 1.3 1.1 2.1 ma ma ma v bat current v bat = ?48 v, idle/talk state all-off state, ringing state or access state i bat i bat i bat ? ? ? 4 4 4 10 10 10 a a a digital input characteristics: input low voltage ? ? ? ? 1.5 v input high voltage ? ? 3.5 ? ? v input leakage current (high) in testout , in ring v dd = 5.5 v, v bat = ?58 v, vlogicin = 5 v llogicin ? 0.5 ? a input leakage current (low) in testout , in ring v dd = 5.5 v, v bat = ?58 v, vlogicin = 0 v llogicin ? 100 ? a input leakage current (high) in testin , latch v dd = 5.5 v, v bat = ?58 v, vlogicin = 5 v llogicin ? 100 ? a input leakage current (low) in testin , latch v dd = 5.5 v, v bat = ?58 v, vlogicin = 0 v llogicin ? 0.5 ? a temperature shutdown requirements*: shutdown activation temperature ? ? 110 125 150 c shutdown circuit hysteresis ? ? 10 ? 25 c
11 data sheet october 2002 l8583d line card access switch switching behavior when switching from the power ringing state to the idle/talk state, via simple logic level input control, the l8583d is able to provide control with respect to the timing when the ringing access contacts are released relative to the state of the line break contacts. make-before-break operation occurs when the line break switch contacts are closed (or made) before the ringing access switch contact is opened (or broken). break-before-make operation occurs when the ringing access contact is opened before the line break switch contacts are closed. using the logic level input pins ring, testin, and testout, either make-before-break or break-before-make oper- ation of the l8583d is easily achieved. the logic sequences for either mode of operation are given in table 13 and table 14. see the truth table (table 16) for an explanation of logic states. when using an l8583d in the make-before-break mode, during the ring-to-idle transition, for a period of up to one- half cycle at the ringing frequency, the ring break switch and the pnpn-type ring access switch can both be in the on state. this is the maximum time after the logic signal at in ring has transitioned that the ring access switch is wait- ing for the next zero current cross, so it can close. during this interval, current that is limited to the dc break switch current-limit value will be sourced from the ring node of the slic. table 13. make-before-break operation?part i rin g testin testout t sd state timing break switches 3 and 4 ring return switch 7 ring access switch 8 all other access switches 5 v 0 v 0 v float power ringing ? open closed closed open 0 v 0 v 0 v float make- before- break sw8 waiting for next zero cur- rent crossing to turn off maxi- mum time?one-half of ringing. in this transition state, current that is limited to the dc break switch current-limit value will be sourced from the ring node of the slic. closed open closed open 0 v 0 v 0 v float idle/talk zero cross current has occurred. closed open open open
12 12 data sheet october 2002 l8583d line card access switch switching behavior (continued) notes: break-before-make operation can be achieved using t sd as an input. in lines two and three of table 14, instead of using the logic input pins to force the all-off state, force t sd to ground. this will override the logic inputs and also force the all-off state. hold this state for 25 ms. during this 25 ms all-off state, toggle the inputs from 100 (ringing state) to 000 (idle/talk state). after 25 ms, release t sd to return switch control to the input pins which will set the idle talk state. when using the l8583d in this mode, forcing t sd to ground will override the input pins and force an all-off state. setting t sd to 5 v will allow switch control via the logic input pins. however, setting t sd to 5 v will also disable the thermal shutdown mechanism. this is not recom- mended. therefore, to allow switch control via the logic input pins, allow t sd to float. thus, when using t sd as an input, the two recommended states are 0 (overrides logic input pins and forces all-off state) and float (allows switch control via logic input pins and thermal shutdown mechanism is active). this may require use of an open-collector buffer. also note that t sd operation in l8583d is different than t sd operation of the l7581, where application of 5 v does not disable the thermal shut- down mechanism. power supplies both the 5 v and battery supply are brought onto the l8583d. the l8583d requires only the 5 v supply for switch operation; that is, state control is powered exclusively off of the 5 v supply. because of this, the l8583d offers extremely low power dissipation, both in the idle and active states. the battery voltage is not used for switch state control and is only used by the battery monitor circuit. loss of battery voltage as an additional protection feature, the l8583d monitors the battery voltage. upon loss of battery voltage, the l8583d will automatically enter an all-off state and remain in that state until the battery voltage is restored. the l8583d is designed such that the device will enter the all-off state if the battery rises above ?10 v and will remain off until the battery drops below ?15 v. monitoring the battery for the automatic shutdown feature will draw a small current from the battery, typically 4 a. this will add slightly to the overall power dissipation of the device. impulse noise using the l8583d will minimize and possibly eliminate the contribution to the overall system impulse noise that is associated with ringing access switches. because of this characteristic of the l8583d, it may not be necessary to incorporate a zero cross switching scheme. this ultimately depends upon the characteristics of the individual sys- tem and is best evaluated at the board level. table 14. break-before-make operation?part ii input testin testout t sd state timing break switches 3 and 4 ring return switch 7 ring access switch 8 all other switches 5 v 0 v 0 v float power ringing ? open closed closed open 5 v 0 v 5 v float all off hold this state for 25 ms. sw8 waiting for zero current to turn off. open open closed open 5 v 0 v 5 v float all off zero current has occurred and sw8 has opened. open open open open 0 v 0 v 0 v float idle/talk release break switches. closed open open open
13 data sheet october 2002 l8583d line card access switch protection integrated slic protection diode bridge in the l8583d, protection to the slic device or other subsequent circuitry is provided by a combination of current-limited break switches, a diode bridge clamping circuit, and a thermal shutdown mechanism. during a positive lightning event, fault current is reduced by the dynamic current-limit circuit and directed to ground via the diode bridge. voltage is clamped to a diode drop above ground. negative light- ning is again reduced by the dynamic current limit and directed to battery via the diode bridge. for power cross and power induction faults, the posi- tive cycle of the fault is clamped a diode drop above ground and fault currents steered to ground and the negative cycle of the power cross is steered to battery. fault currents are limited by the current-limit circuit. current limiting during a lightning event, the current that is passed through the break switches and presented to the inte- grated protection circuit and subsequent circuitry is lim- ited by the dynamic current-limit response of the break switches (assuming idle/talk state). when the voltage seen at the t line /r line nodes is properly clamped by an external secondary protector, upon application of a 1000 v, 10 x 1000 pulse (lssgr lightning), the current seen at the t bat /r bat nodes will typically be a pulse of magnitude 2.5 a and duration less than 0.5 s. during a power-cross event, the current that is passed through the break switches and presented to the inte- grated protection circuit and subsequent circuitry is lim- ited by the dc current-limit response of the break switches (assuming idle/talk state). the dc current limit is specified over temperature between 80 ma and 250 ma. note that the current-limit circuitry has a nega- tive temperature coefficient. thus, if the device is sub- jected to an extended power cross, the value of current seen at t bat /r bat will decrease as the device heats due to the fault current. if sufficient heating occurs, the temperature shutdown mechanism will activate and the device will enter an all-off mode. temperature shutdown mechanism when the device temperature reaches a minimum of 110 c, the thermal shutdown mechanism will activate and force the device into an all-off state, regardless of the logic input pins. pin t sd , when used as an output, will read 0 v when the device is in the thermal shut- down mode and +v dd during normal operation. during a lightning event, due to the relatively short duration, the thermal shutdown will not typically acti- vate. during an extended power cross, the device tempera- ture will rise and cause the device to enter the thermal shutdown mode. this forces an all-off mode, and the current seen at t bat /r bat drops to zero. once in the thermal shutdown mode, the device will cool and exit the thermal shutdown mode, thus re-entering the state it was in prior to thermal shutdown. current, limited to the dc current-limit value, will again begin to flow and device heating will begin again. this cycle of entering and exiting thermal shutdown will last as long as the power-cross fault is present. the frequency of entering and exiting thermal shutdown will depend on the mag- nitude of the power cross. if the magnitude of the power cross is great enough, the external secondary protector may trigger shunting all current to ground. in the l8583d, the thermal shutdown mechanism can be disabled by forcing the t sd pin to +v dd . this func- tionality is different from the l7581, whose thermal shutdown mechanism cannot be disabled. electrical specifications relating to the integrated over- voltage clamping circuit are outlined in table 15.
14 14 data sheet october 2002 l8583d line card access switch protection (continued) integrated slic protection (continued) external secondary protector with the above integrated protection features, only one overvoltage secondary protection device on the loop side of the l8583d is required. the purpose of this device is to limit fault voltages seen by the l8583d so as not to exceed the breakdown voltage or input-output isolation rating of the device. to minimize stress on the l8583d, use of a foldback-type or crowbar-type device is recommended. a detailed explanation and design equations on the choice of the external secondary pro- tection device are given in the an introduction to l758x series of line card access switches application note. basic design equations governing the choice of exter- nal secondary protector are given below: |vbatmax| + |vbreakovermax| < |vbreakdownmin(break)|. |vringingpeakmax| + |vbatmax| + |vbreakovermax| < |vbreakdownmin(ring)|. |vringingpeakmax| + |vbatmax| < |vbreakovermin|. where: vbatmax?maximum magnitude of battery voltage. vbreakovermax?maximum magnitude breakover voltage of external secondary protector. vbreakovermin?minimum magnitude breakover voltage of external secondary protector. vbreakdownmin(break)?minimum magnitude breakdown voltage of l8583d break switch. vbreakdownmin(ring)?minimum magnitude break- down voltage of l8583d ring access switch. vringingpeakmax?maximum magnitude peak volt- age of ringing signal. series current-limiting fused resistors or ptcs should be chosen so as not to exceed the current rating of the external secondary protector. refer to the manufac- turer?s data sheet for requirements. table 15. electrical specifications, protection circuitry parameters related to diodes (in diode bridge) parameter test condition measure min typ max unit voltage drop at continuous current (50 hz/60 hz) apply dc current limit of break switches forward vo l t a g e ??3.5v voltage drop at surge current apply dynamic current limit of break switches forward vo l t a g e ?5?v
15 data sheet october 2002 l8583d line card access switch typical performance characteristics figure 3. protection circuit version figure 4. switches 1?5, 7, 9, 10 figure 5. switches 6, 8 v bat <1 a 3 v dc current-limit break switches dc current limit (of break switches) v bat ? 3 12-2309 (f).b +i +v ?1.5 v 2/3 r on current limiting ?i ?v current limiting i limit i limit r on 1.5 v 2/3 r on r on 12-2311 (f) +i +v os +v r on ?v os ?i ?v 12-2312 (f)
16 16 data sheet october 2002 l8583d line card access switch application figure 6. typical lcas application, idle, or talk state shown crowbar protection r1 r2 tip ring sw9 sw8 sw3 break break sw4 ring tip battery feed ring generator battery battery v bat (reference) ringing sw1 sw7 test out ringing return test return sw5 test in sw10 test out ringing access ringing test sw6 sw2 test in monitor 12-2366 (f).g
17 data sheet october 2002 l8583d line card access switch application (continued) 1. if t sd = 5 v, the thermal shutdown mechanism is disabled. if t sd is floating, the thermal shutdown mechanism is active. 2. forcing t sd to ground overrides the logic input pins and forces an all-off state. 3. idle/talk state. 4. testout state. 5. testin state. 6. power ringing state. 7. ringing generator test state. 8. simultaneous testout and testin state. 9. all-off state. 10. device will power up in this state. 11. simultaneous testout?ring test state. a parallel in/parallel out data latch is integrated into the l8583d. operation of the data latch is controlled by the logic-level input pin latch. the data input to the latch is the input pin of the l8583d and the output of the data latch is an internal node used for state control. when the latch control pin is at logic 0, the data latch is transparent and data control signals flow directly from input, through the data latch to state control. any changes in input will be reflected in the state of the switches. when the latch control pin is at logic 1, the data latch is active; the l8583d will no longer react to changes at the input control pin. the state of the switches is now latched; that is, the state of the switches will remain as they were when the latch input transitioned from logic 0 to logic 1. the switches will not respond to changes in input as long as latch is held high. note that the t sd input is not tied to the data latch. t sd is not affected by the latch input. t sd input will override state control via input and latch. the input logic pins in ring and in testout have internal pull-up resistors. input logic pins in testin and latch have internal pull-down resistors. thus, the device will power up into the disconnect state. table 16. truth table for l8583d in ring in testin in testout t sd testin switches break switches ring test switches ring switches testout switches 0 v 0 v 0 v 5 v/float 1 off on off off off 3 0 v 0 v 5 v 5 v/float 1 off off off off on 4 0 v 5 v 0 v 5 v/float 1 on off off off off 5 5 v 0 v 0 v 5 v/float 1 off off off on off 6 5 v 5 v 0 v 5 v/float 1 off off on off off 7 0 v 5 v 5 v 5 v/float 1 on off off off on 8 5 v 0 v 5 v 5 v/float 1 off off off off off 9,10 5 v 5 v 5 v 5 v/float 1 off off on off on 11 don?t care don?t care don?t care 0 v 2 off off off off off 9
18 18 data sheet october 2002 l8583d line card access switch outline diagrams 20-pin sog dimensions are in millimeters. note: the dimensions in this outline diagram are intended for informational purposes only. for detailed schemat- ics to assist your design efforts, please contact your legerity sales representative. package description number of pins (n) maximum length (l) maximum width without leads (b) maximum width including leads (w) maximum height above board (h) sog (small outline gull-wing) 20 13.00 7.62 10.64 2.67 w 0.61 0.51 max h 0.28 max 0.10 seating plane 1.27 typ n l b 1 pin #1 identifier zone 5-4414 (f)
19 data sheet october 2002 l8583d line card access switch outline diagrams (continued) 28-pin sog dimensions are in millimeters. note: the dimensions in this outline diagram are intended for informational purposes only. for detailed schemat- ics to assist your design efforts, please contact your legerity sales representative. package description number of pins (n) maximum length (l) maximum width without leads (b) maximum width including leads (w) maximum height above board (h) sog (small outline gull-wing) 28 18.11 7.62 10.64 2.67 w 0.61 0.51 max h 0.28 max 0.10 seating plane 1.27 typ n l b 1 pin #1 identifier zone 5-4414 (f)
legerity, inc. reserves the right to make changes to the product(s) or information contained herein without notice. no liabilit y is assumed as a result of their use or application. copyright ? 2002 legerity, inc. all rights reserved l8583d line card access switch ordering information * devices on tape and reel must be ordered in 1000-piece increments. telcordia technologies is a trademark of telcordia technologies, inc. ul is a registered trademark of underwriters laboratories, inc. device part number description package comcode LULC8583DEY-D line card access switch 20-pin sog, dry-bagged 109058099 LULC8583DEY-Dt line card access switch 20-pin sog, dry-bagged, tape and reel* 109058115 agrl8583daj-d line card access switch 28-pin sog, dry-bagged 700024229 agrl8583daj-dt line card access switch 28-pin sog, dry-bagged, tape and reel* 700024230
p.o. box 18200 austin, texas 78760-8200 telephone: (512) 228-5400 fax: (512) 228-5508 north america toll free: (800) 432-4009 to contact the legerity sales office nearest you, or to download or order product literature, visit our website at www.legerity.com . to order literature in north america, call: (800) 432-4009, ext. 75592 or email: americalit@legerity.com to order literature in europe or asia, call: 44-0-1179-341607 or email: europe ? eurolit@legerity.com asia ? asialit@legerity.com tm

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