f-mod - 300 mhz 1 to 4000 mhz quadrature modulator family preliminary technical data adl5373/adl5374 rev. pr features output frequency range: 300 mhz 1 to 4000 mhz modulation bandwidth: >500 mhz (3 db) 1 db output compression: 12 dbm @ 2140 mhz noise floor: -158 dbm/hz sideband suppression: < -40 dbc lo leakage: < - 40 dbm single supply: 4.75 v to 5.5 v 24-lead lfcsp package applications cellular/pcs communication systems infrastructure wcdma/cdma2000/gsm/edge, wimax wi-max/broadband wireless access systems j 1/17/2007 information furnished by analog devices is believed to be a ccurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to chan ge without notice. no license is granted by implication or otherwise under any patent or patent ri ghts of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.326.8703 ? 2006 analog devices, inc. all rights reserved. 1 300 mhz to 1000 mhz, 600 mhz to 1300 mhz, and 1500 mhz to 2500 mhz coverage provided by the already-released ad l5370, adl5371 and adl5372 members of the family respectively. refer to the rev0 datasheets available at www.analog.com fo r more information. functional block diagram quadrature phase splitter vou t ibbp ibbn qbbp q bbn loip loin figure 1. product description the f-mod family of monolithic, rf quadrature modulators is designed for use from 300 mhz to 4000 mhz. excellent phase accuracy and amplitude balance enable high performance direct rf modulation for communication systems.. the f-mod family can be used as direct-to-rf modulators in digital communication systems such as gsm, cdma, and wcdma base stations, and qpsk or qam broadband wireless access transmitters. a 3 db baseband bandwidth in excess of 500 mhz makes it ideal in broadband zero-if or low-if-to-rf applications and in broadband digital pre-distortion transmitters. the f-mod family is fabricated using analog devices advanced silicon-germanium bipolar process, and are available in a 24-lead exposed-paddle lfcsp package. performance is specified over a C40c to +85c temperature range.
adl5373 / adl5374 pre liminary technical data rev. prj | page 2 of 7 specifications table 1. v s = 5 v; t a = 25c; lo = 0 dbm 1 single-ended; baseband i/q amplitude = 1.4 v p-p differential sine waves in quadrature with a 500 mv dc bias; baseband i/q frequency (f bb ) = 1 mhz, unless otherwise noted. parameter conditions min typ max unit operating frequency range frequency range covered by f-mod family mhz low frequency 300 high frequency 4000 mhz adl5373 lo = 2500 mhz operating frequency range low frequency (3db bandwidth) 2300 mhz high frequency 3000 mhz output power v iq =1.4vpp differential 6.5 dbm output p1 db 13 dbm carrier feedthrough -34.5 dbm sideband suppression -33.3 dbc second harmonic p out C (f lo + (2 f bb )), p out = 7 dbm -48.8 dbc third harmonic p out C (f lo + (3 f bb )), p out = 7 dbm -45.4 dbc output ip3 f1 bb = 3 mhz, f2 bb = 4 mhz, p out = -3 dbm per tone 25 dbm noise floor baseband inp uts biased to 500 mv, p lo = +6 dbm -156 dbm/hz adl5374 lo = 3500 mhz operating frequency range low frequency (3 db bandwidth) 2800 mhz high frequency 4000 mhz output power v iq =1.4vpp differential 4.8 dbm output p1 db 11 dbm carrier feedthrough -32.1 dbm sideband suppression -35.9 dbc second harmonic p out C (f lo + (2 f bb )), p out = 7 dbm -36.9 dbc third harmonic p out C (f lo + (3 f bb )), p out = 7 dbm -43.1 dbc output ip3 f1 bb = 3 mhz, f2 bb = 4 mhz, p out = -3 dbm per tone 21.5 dbm noise floor baseband inp uts biased to 500 mv, p lo = +6 dbm -155 dbm/hz lo inputs lo drive level 1 characterization performed at typical level -3 0 3 dbm nominal impedance 50 input return loss -10 db baseband inputs pins ibbp, ibbn, qbbp, qbbn i and q input bias level 400 500 600 mv bandwidth (3 db) >500 mhz power supplies pins vps1 and vps2 voltage 4.75 5.5 v supply current adl5371, adl5372, adl5373, adl5374 175 ma notes 1 lo drive in excess of +3 dbm can be provided to further reduce noise at 6 mhz and 20 mhz carrier offsets in gsm and wcdma app lications respectively.
preliminary technical da ta adl5373 / adl5374 rev. prj | page 3 of 7 absolute maximum ratings table 2. f-mod absolute maximum ratings parameter rating supply voltage vpos 5.5 v ibbp, ibbn, qbbp, qbbn 0 v to 2 v loip and loin 13 dbm internal power dissipation 1155 mw ja (exposed paddle soldered down) 54c/w maximum junction temperature 147c operating temperature range ?40c to +85c storage temperature range ?65c to +150c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
adl5373 / adl5374 pre liminary technical data rev. prj | page 4 of 7 pin configuration and fu nctional descriptions com m 7 loip 8 loin 9 com m 1 0 com m 1 1 com m 1 2 6vps1 5 vps1 4 vps1 3 vps1 2comm 1comm ibbp 19 ibbn 20 comm 21 comm 22 qbbn 23 qbbp 24 fmod exposed paddle vout 13 vps2 14 vps2 15 vps3 16 vps4 17 vps5 18 figure 2. table 3. pin function descriptions pin o. mnemonic description 1, 2, 7, 10 to 12, 21, 22 com1, com2, com3, com4 input common pins. connect to ground plane via a low impedance path. 3 to 6, 14 to 18 vps1, vps2, vps3, vps4, vps5 positive supply voltage pins. all pins should be connected to the same supply (v s ). to ensure adequate external bypassing, connect 0.1 f capa citors between each pin and ground. adjacent power supply pins of the same name can share one capacitor (see figure 3 ). 19, 20, 23, 24 ibbp, ibbn, qbbn, qbbp differential in-phase and quadrature baseband inp uts. these high impedance inputs must be dc- biased to 500 mv dc, and must be driven from a low-impedance source. nominal characterized ac signal swing is 700 mv p-p on each pin. this results in a differential drive of 1.4 v p-p with a 500 mv dc bias. these inputs are not self-biased and must be externally biased. 8, 9 loip, loin 50 single-ended local oscillator input. internally dc-biased. pins must be ac-coupled. ac-couple loin to ground and drive lo through loip. 13 vout single-ended device rf output. pin should be ac-coupled to the load. exposed paddle the device package has an exposed paddle on th e underside. this exposed paddle must be soldered to a low impdeance ground pad on the board . if the pcb has multiple ground planes, these should be stitched together with vias to optimize thermal conduc tivity (see drawing of evalution board top layer in figure 16).
preliminary technical da ta adl5373 / adl5374 rev. prj | page 5 of 7 basic connections figure 3 shows the basic connections for the f-mod. vps5 vps3 vps4 vps2 vps2 vout com2 loin loip com2 com3 com3 qbbp com4 qbbn com4 ibbn ibbp com1 vps1 com1 vps1 vps1 vps1 1 2 3 4 5 6 18 17 16 15 14 13 vout c13 0.1f c12 0.1f clon 100pf c14 0.1f c15 0.1f c16 0.1f 24 23 22 21 20 19 7 8 9 10 11 12 cout 100pf l12 0 ? l11 0 ? vpos rfnq 0 ? rfpq 0 ? q bbp q bbn ibbn ibbp rfni 0 ? rfpi 0 ? cfnq open cfpq open cfpi open cfni open rti open rtq open exposed paddle clop 100pf lo gnd z1 fmod vpos figure 3. basic connections for the f-mod power supply and grounding all the vps pins must be connected to the same 5 v source. adjacent pins of the same name can be tied together and decoupled with a 0.1 f capacitor. these capacitors should be located as close as possible to the device. the power supply can range between 4.75 v and 5.25 v. the com1 pin, com2 pin, and com3 pin should be tied to the same ground plane through low impedance paths. the exposed paddle on the underside of the package should also be soldered to a low thermal and electrical impedance ground plane. if the ground plane spans multiple layers on the circuit board, they should be stitched together with nine vias under the exposed paddle. the analog devices an-772 application note discusses the thermal and electrical grounding of the lfcsp_vq in greater detail. baseband inputs the baseband inputs qbbp, qbbn, ibbp, and ibbn must be driven from a differential source. the nominal drive level of 1.4 v p-p differential (700 mv p-p on each pin) should be biased to a common-mode level of 500 mv dc. the dc common-mode bias level for the baseband inputs may range from 400 mv to 600 mv. this results in a reduction in the usable input ac swing range. the nominal dc bias of 500 mv allows for the largest ac swing, limited on the bottom end by the f-mod input range and on the top end by the output compliance range on most digital-to-analog converters (dac) from analog devices. lo input a single-ended lo signal should be applied to the loip pin through an ac-coupling capacitor. the recommended lo drive power is 0 dbm. the lo return pin, loin, should be ac-coupled to ground through a low impedance path. the nominal lo drive of 0 dbm can be increased to up to 7 dbm. rf output the ground-referenced rf output is available at the vout pin (pin 13). this pin should be ac-coupled to the load.
adl5373 / adl5374 pre liminary technical data rev. prj | page 6 of 7 evaluation board populated rohs-compliant evaluation boards are available for evaluation of the f-mod. the f-mod package has an exposed paddle on the underside. this exposed paddle must be soldered to the board.the evaluation board is designed without any components on the underside so heat can be applied to the underside for easy removal and replacement of the f-mod. vps5 vps3 vps4 vps2 vps2 vout com2 loin loip com2 com3 com3 qbbp com4 qbbn com4 ibbn ibbp com1 vps1 com1 vps1 vps1 vps1 1 2 3 4 5 6 18 17 16 15 14 13 vout c13 0.1f c12 0.1f clon 100pf c14 0.1f c15 0.1f c16 0.1f 24 23 22 21 20 19 7 8 9 10 11 12 cout 100pf l12 0 ? l11 0 ? vpos rfnq 0 ? rfpq 0 ? q bbp q bbn ibbn ibbp rfni 0 ? rfpi 0 ? cfnq open cfpq open cfpi open cfni open rti open rtq open exposed paddle clop 100pf lo gnd z1 fmod vpos figure 4. f-mod evaluation board schematic 11-22 figure 5. evaluation board layout, top layer. table 4. evaluation board configuration options component description default condition vpos, gnd power supply and ground clip leads. not applicable rfpi, rfni, rfpq, rfnq, cfpi, cfni, cfpq, cfnq, rtq, rti baseband input filters. these components can be used to implement a low-pass filter for the baseband signals. rfnq, rfpq, rfni, rfpi = 0 (0402) cfnq, cfpq, cfni, cfpi = open (0402) rtq, rti = open (0402)
preliminary technical da ta adl5373 / adl5374 rev. prj | page 7 of 7 outline dimensions * compliant to jedec standards mo-220-vggd-2 except for exposed pad dimension 1 24 6 7 13 19 18 12 * 2.45 2.30 sq 2.15 0.60 max 0.50 0.40 0.30 0.30 0.23 0.18 2.50 ref 0.50 bsc 12 max 0.80 max 0.65 typ 0.05 max 0.02 nom 1.00 0.85 0.80 seating plane pin 1 indicator top view 3.75 bsc sq 4.00 bsc sq pin 1 indicator 0.60 max coplanarity 0.08 0.20 ref 0.23 min exposed pa d (bottomview) figure 6. 24-lead lead frame chip scale package [lfcsp_vq] 4 mm 4 mm body, very thin quad (cp-24-2) dimensions shown in millimeters ordering guide model temperature range (c) package description package option adl5370acpz-r7 1 C40 to +85 24-lead lfcsp_vq, 7" tape and reel cp-24-2 adl5370acpz-wp 1 C40 to +85 24-lead lfcsp_vq, waffle pack cp-24-2 adl5370-evalz 1 evaluation board adl5371acpz-r7 1 C40 to +85 24-lead lfcsp_vq, 7" tape and reel cp-24-2 adl5371acpz-wp 1 C40 to +85 24-lead lfcsp_vq, waffle pack cp-24-2 adl537-evalz 1 evaluation board adl5372acpz-r7 1 C40 to +85 24-lead lfcsp_vq, 7" tape and reel cp-24-2 adl5372acpz-wp 1 C40 to +85 24-lead lfcsp_vq, waffle pack cp-24-2 adl5372-evalz 1 evaluation board adl5373acpz-r7 1 C40 to +85 24-lead lfcsp_vq, 7" tape and reel cp-24-2 adl5373acpz-wp 1 C40 to +85 24-lead lfcsp_vq, waffle pack cp-24-2 adl5373-evalz 1 evaluation board adl5374acpz-r7 1 C40 to +85 24-lead lfcsp_vq, 7" tape and reel cp-24-2 adl5374acpz-wp 1 C40 to +85 24-lead lfcsp_vq, waffle pack cp-24-2 adl5374-evalz 1 evaluation board 1 z indicates pb-free t ?2006 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. pr06627-0-1/07(prj) ttt
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