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| msp 3400d, msp 3410d multistandard sou nd processors edition may 14, 1999 6251-482-2p d preliminary data sheet micr onas micronas
msp 34x0d preliminary data sheet 2 micronas contents page section title 5 1. introduction 5 1.1. common features of msp 34x0d 5 1.2. specific features of msp 3410d 6 2. basic features of the msp 34x0d 6 2.1. demodulator and nicam decoder section 6 2.2. dsp section (audio baseband processing) 6 2.3. analog section 7 3. application fields of the msp 34x0d 7 3.1. nicam plus fm/am-mono 7 3.2. german 2-carrier system (dual-fm system) 10 4. architecture of the msp 34x0d 10 4.1. demodulator and nicam decoder section 10 4.1.1. analog sound if ? input section 11 4.1.2. quadrature mixers 11 4.1.3. low-pass filtering block for mixed sound if signals 12 4.1.4. phase and am discrimination 12 4.1.5. differentiators 12 4.1.6. low-pass filter block for demodulated signals 12 4.1.7. high-deviation fm mode 12 4.1.8. fm carrier mute function in the dual-carrier fm mode 12 4.1.9. dqpsk decoder 12 4.1.10. nicam decoder 13 4.2. analog section 13 4.2.1. scart switching facilities 13 4.2.2. stand-by mode 13 4.3. dsp section (audio baseband processing) 13 4.3.1. dual-carrier fm stereo/bilingual detection 15 4.4. audio pll and crystal specifications 15 4.5. adr bus interface 15 4.6. digital control output pins 16 4.7. i 2 s bus interface 17 5. i 2 c bus interface: device and subaddresses 18 5.1. protocol description 19 5.2. proposal for msp 34x0d i 2 c telegrams 19 5.2.1. symbols 19 5.2.2. write telegrams 19 5.2.3. read telegrams 19 5.2.4. examples 20 5.3. start-up sequence: power-up and i 2 c-controlling contents, continued page section title preliminary data sheet msp 34x0d micronas 3 21 6. programming the demodulator and nicam decoder section 21 6.1. short-programming and general programming of the demodulator part 22 6.2. demodulator write registers: table and addresses 22 6.3. demodulator read registers: table and addresses 23 6.4. demodulator write registers for short-programming: functions and values 23 6.4.1. demodulator short-programming 24 6.4.2. auto_fm/am: automatic switching between nicam and fm/am-mono 25 6.5. demodulator write registers for the general programming mode: functions and values 25 6.5.1. register ? ad_cv ? 27 6.5.2. register ? mode_reg ? 28 6.5.3. fir parameter 30 6.5.4. dco registers 31 6.6. demodulator read registers: functions and values 32 6.6.1. autodetection of terrestrial tv audio standards 32 6.6.2. c_ad_bits 32 6.6.3. add_bits [10...3] 0038 hex 32 6.6.4. cib_bits 33 6.6.5. error_rate 0057 hex 33 6.6.6. conc_ct (for compatibility with msp 3410b) 33 6.6.7. fawct_ist (for compatibility with msp 3410b) 33 6.6.8. pll_caps 33 6.6.9. agc_gain 33 6.7. sequences to transmit parameters and to start processing 35 6.8. software proposals for multistandard tv sets 35 6.8.1. multistandard including system b/g with nicam/fm-mono only 35 6.8.2. multistandard including system i with nicam/fm-mono only 35 6.8.3. multistandard including system b/g with nicam/fm-mono and german dual-fm 35 6.8.4. satellite mode 35 6.8.5. automatic search function for fm carrier detection 37 7. programming the dsp section (audio baseband processing) 37 7.1. dsp write registers: table and addresses 39 7.2. dsp read registers: table and addresses 40 7.3. dsp write registers: functions and values 40 7.3.1. volume ? loudspeaker and headphone channel 41 7.3.2. balance ? loudspeaker and headphone channel 41 7.3.3. bass ? loudspeaker and headphone channel 42 7.3.4. treble ? loudspeaker and headphone channel 42 7.3.5. loudness ? loudspeaker and headphone channel 43 7.3.6. spatial effects ? loudspeaker channel 44 7.3.7. volume ? scart1 and scart2 channel 44 7.3.8. channel source modes 45 7.3.9. channel matrix modes 45 7.3.10. scart prescale 46 7.3.11. fm/am prescale 46 7.3.12. fm matrix modes (see also table 4 ? 1) 46 7.3.13. fm fixed deemphasis msp 34x0d preliminary data sheet 4 micronas contents, continued page section title 46 7.3.14. fm adaptive deemphasis 47 7.3.15. nicam prescale 47 7.3.16. nicam deemphasis 47 7.3.17. i 2 s1 and i 2 s2 prescale 47 7.3.18. acb register 48 7.3.19. beeper 48 7.3.20. identification mode 48 7.3.21. fm dc notch 48 7.3.22. mode tone control 48 7.3.23. automatic volume correction (avc) 49 7.3.24. subwoofer channel 50 7.3.25. equalizer loudspeaker channel 50 7.4. exclusions for the audio baseband features 50 7.5. phase relationship of analog outputs 50 7.6. dsp read registers: functions and values 50 7.6.1. stereo detection register 51 7.6.2. quasi-peak detector 51 7.6.3. dc level register 51 7.6.4. msp hardware version code 51 7.6.5. msp major revision code 51 7.6.6. msp product code 51 7.6.7. msp rom version code 52 8. differences between msp 3400c, msp 3400d, msp 3410b, and msp 3410d 55 9. specifications 55 9.1. outline dimensions 57 9.2. pin connections and short descriptions 60 9.3. pin configurations 64 9.4. pin circuits (pin numbers refer to plcc68 package) 66 9.5. electrical characteristics 66 9.5.1. absolute maximum ratings 67 9.5.2. recommended operating conditions 71 9.5.3. characteristics 77 10. application circuit 79 11. appendix a: msp 34x0d version history 80 12. data sheet history preliminary data sheet msp 34x0d micronas 5 multistandard sound processors release notes: the hardware description in this document is valid for the msp 34x0d version b3 and following versions. revision bars indicate sig- nificant changes to the previous edition. 1. introduction the msp 34x0d is designed as a single-chip multi- standard sound processor for applications in analog and digital tv sets, satellite receivers, video recorders, and pc cards. the msp 34x0d, again, improves function integration: the full tv sound processing, starting with analog sound if signal-in, down to processed analog af-out, is performed in a single chip. it covers all european tv standards (some examples are shown in table 3 ? 1). the msp 3400d is fully pin and software-compatible to the msp 3410d, but is not able to decode nicam. it is also compatible to the msp 3400c. the ic is produced in submicron cmos technology, combined with high-performance digital signal pro- cessing. the msp 34x0d is available in the following packages: plcc68, psdip64, psdip52, pqfp80, and plqfp64. note: the msp 3410d version is fully downward-com- patible to the msp 3410b, the msp 3400b, and the msp 3400c. to achieve full software-compatibility with these types, the demodulator part must be programmed as described in the data sheet of the msp 3410b. 1.1. common features of msp 34x0d ? avc: automatic volume correction ? subwoofer output ? 5-band graphic equalizer (as in msp 3400c) ? enhanced spatial effect (pseudostereo/basewidth enlargement as in msp 3400c) ? headphone channel with balance, bass, treble, loud- ness ? balance for loudspeaker and headphone channels in db units (optional) ? d/a converters for scart2 out ? improved oversampling filters (as in msp 3400c) ? four scart inputs ? full scart in/out matrix without restrictions ? scart volume in db units (optional) ? additional i 2 s input (as in msp 3400c) ? new fm identification (as in msp 3400c) ? demodulator short programming ? autodetection for terrestrial tv sound standards ? improved carrier mute algorithm ? improved am demodulation ? adr together with drp 3510a ? dolby pro logic together with dpl 351xa ? reduction of necessary controlling ? less external components ? significant reduction of radiation 1.2. specific features of msp 3410d ? all nicam standards ? precise bit-error rate indication ? automatic switching from nicam to fm/am or vice- versa ? improved nicam synchronization algorithm msp 34x0d preliminary data sheet 6 micronas 2. basic features of the msp 34x0d 2.1. demodulator and nicam decoder section the msp 34x0d is designed to perform demodulation of fm or am-mono tv sound. alternatively, two-carrier fm systems according to the german or korean terres- trial specs or the satellite specs can be processed with the msp 34x0d. digital demodulation and decoding of nicam-coded tv stereo sound, is done only by the msp 3410. the msp 34x0d offers a powerful feature to calculate the carrier field strength which can be used for auto- matic standard detection (terrestrial) and search algo- rithms (satellite). the ic may be used in tv sets, as well as in satellite tuners and video recorders. it offers profitable multistandard capability, including the follow- ing advantages: ? two selectable analog inputs (tv and sat-if sources) ? automatic gain control (agc) for analog if input. input range: 0.10 ? 3v pp ? integrated a/d converter for sound-if inputs ? all demodulation and filtering is performed on chip and is individually programmable ? easy realization of all digital nicam standards (b/g, i, l, and d/k) with msp 3410. ? fm demodulation of all terrestrial standards (incl. identification decoding) ? fm demodulation of all satellite standards ? no external filter hardware is required ? only one crystal clock (18.432 mhz) is necessary ? fm carrier level calculation for automatic search algorithms and carrier mute function ? high-deviation fm-mono mode (max. deviation: approx. 360 khz) fig. 2?1: main i/o signals of the msp 34x0d 2.2. dsp section (audio baseband processing) ? flexible selection of audio sources to be processed ? two digital input and one output interface via i 2 sbus for external dsp processors, featuring surround sound, adr etc. ? digital interface to process adr (astra digital radio) together with drp 3510a ? performance of all deemphasis systems including adaptive wegener panda 1 without external compo- nents or controlling ? digitally performed fm identification decoding and dematrixing ? digital baseband processing: volume, bass, treble, 5-band equalizer, loudness, pseudostereo, and basewidth enlargement ? simple controlling of volume, bass, treble, equalizer etc. 2.3. analog section ? four selectable analog pairs of audio baseband inputs (= four scart inputs) input level: 2v rms , input impedance: 25 k ? one selectable analog mono input (i.e. am sound): input level: 2v rms , input impedance: 15 k ? two high-quality a/d converters, s/n-ratio: 85 db ? 20 hz to 20 khz bandwidth for scart-to-scart copy facilities ? main (loudspeaker) and aux (headphones): two pairs of fourfold oversampled d/a-converters output level per channel: max. 1.4 v rms output resistance: max. 5 k ? s/n-ratio: 85 db at maximum volume max. noise voltage in mute mode: 10 v (bw: 20 hz ...16 khz) ? two pairs of fourfold oversampled d/a converters supplying two selectable pairs of scart outputs. output level per channel: max. 2 v rms , output resistance: max. 0.5 k ? , s/n-ratio: 85 db (20 hz ... 16 khz) loudspeaker out subwoofer out headphones out scart1 out scart2 out msp 34x0d 2 2 2 2 1 2 35 adr i 2 si 2 c sound if 1 sound if 2 mono in scart1 in scart2 in scart3 in scart4 in 2 2 2 2 preliminary data sheet msp 34x0d micronas 7 3. application fields of the msp 34x0d in the following sections, a brief overview of the two main tv sound standards, nicam 728 and german fm-stereo, demonstrates the complex requirements of a multistandard audio ic. 3.1. nicam plus fm/am-mono according to the british, scandinavian, spanish, and french tv standards, high-quality stereo sound is transmitted digitally. the systems allow two high-qual- ity digital sound channels to be added to the already existing fm/am channel. the sound coding follows the format of the so-called near instantaneous compand- ing system (nicam 728). transmission is performed using differential quadrature phase shift keying (dqpsk). table 3 ? 2 provides some specifications of the sound coding (nicam); table 3 ? 3 offers an over- view of the modulation parameters. in the case of nicam/fm (am) mode, there are three different audio channels available: nicam a, nicam b, and fm/am-mono. nicam a and b may belong either to a stereo or to a dual-language trans- mission. information about operation mode and the quality of the nicam signal can be read by the ccu via the control bus. in the case of low quality (high bit- error rate), the ccu may decide to switch to the ana- log fm/am-mono sound. alternatively, an automatic nicam-fm/am switching may be applied. 3.2. german 2-carrier system (dual-fm system) since september 1981, stereo and dual-sound pro- grams have been transmitted in germany using the 2-carrier system. sound transmission consists of the already existing first sound carrier and a second sound carrier additionally containing an identification signal. more details of this standard are given in tables 3 ? 1 and 3 ? 4. for d/k and m-korea, very similar systems are used. note: nicam demodulation cannot be done with the msp 3400d table 3 ? 1: tv standards tv system position of sound carrier /mhz sound modulation color system country b/g 5.5/5.7421875 fm-stereo pal germany b/g 5.5/5.85 fm-mono/nicam pal scandinavia, spain l 6.5/5.85 am-mono/nicam secam-l france i 6.0/6.552 fm-mono/nicam pal uk d/k 6.5/6.2578125 d/k1 6.5/6.7421875 d/k2 6.5/5.85 d/k-nicam fm-stereo fm-mono/nicam secam-east ussr hungary m m-korea 4.5 4.5/4.724212 fm-mono fm-stereo ntsc usa korea satellite satellite 6.5 7.02/7.2 fm-mono fm-stereo pa l pa l europe (astra) europe (astra) msp 34x0d preliminary data sheet 8 micronas table 3 ? 2: summary of nicam 728 sound coding characteristics characteristics values audio sampling frequency 32 khz number of channels 2 initial resolution 14 bits/sample companding characteristics near instantaneous, with compression to 10 bits/sample in 32-sample (1 ms) blocks coding for compressed samples 2 ? s complement preemphasis ccitt recommendation j.17 (6.5 db attenuation at 800 hz) audio overload level +12 dbm measured at the unity gain frequency of the preemphasis network (2 khz) table 3 ? 3: summary of nicam 728 sound modulation parameters specification i b/g l d/k carrier frequency of digital sound 6.552 mhz 5.85 mhz 5.85 mhz 5.85 mhz transmission rate 728 kbit/s type of modulation differentially encoded quadrature phase shift keying (dqpsk) spectrum shaping roll-off factor by means of roll-off filters 1.0 1.0 0.4 0.4 0.4 carrier frequency of analog sound component 6.0 mhz fm mono 5.5 mhz fm mono 6.5 mhz am mono 6.5 mhz fm-mono terrestrial cable power ratio between vision carrier and analog sound carrier 10 db 13 db 10 db 16 db 13 db power ratio between analog and modulated digital sound carrier 10 db 7 db 17 db 11 db hungary poland 12 db 7 db preliminary data sheet msp 34x0d micronas 9 fig. 3 ? 1: typical msp 34x0d application table 3 ? 4: key parameters for b/g, d/k, and m 2-carrier sound system sound carriers carrier fm1 carrier fm2 b/g d/k m b/g d/k m vision/sound power ratio 13 db 20 db sound bandwidth 40 hz to 15 khz preemphasis 50 s75 s50 s75 s frequency deviation 50 khz 25 khz 50 khz 25 khz sound signal components mono transmission mono mono stereo transmission (l+r)/2 (l+r)/2 r (l ? r)/2 dual-sound transmission language a language b identification of transmission mode on carrier fm2 pilot carrier frequency in khz 54.6875 55.0699 type of modulation am modulation depth 50 % modulation frequency mono: unmodulated stereo: 117.5 hz dual: 274.1 hz 149.9 hz 276.0 hz 33 34 39 mhz 59mhz according to the mixing characteristics of the sound if mixer, the sound if filter may be omitted. loudspeaker subwoofer headphone scart outputs 2 2 scart2 scart1 msp 34x0d i 2 s2 adr i 2 s1 adr decoder drp3510a dolby pro logic processor dpl35xxa 2 2 2 2 scart1 scart2 scart3 scart4 1 mono saw filter sound if filter sound if mixer vision demo- dulator tuner scart inputs composite video msp 34x0d preliminary data sheet 10 micronas 4. architecture of the msp 34x0d fig. 4 ? 1 shows a simplified block diagram of the ic. its architecture is split into three main functional blocks: 1. demodulator and nicam decoder section 2. digital signal processing (dsp) section performing audio baseband processing 3. analog section containing two a/d-converters, nine d/a-converters, and scart switching facili- ties. 4.1. demodulator and nicam decoder section 4.1.1. analog sound if ? input section the input pins ana_in1+, ana_in2+, and ana_in ? offer the possibility to connect two different sound if (sif) sources to the msp 34x0d. by means of bit [8] of ad_cv (see table 6 ? 5 on page 25), either terrestrial or satellite sound if signals can be selected. the ana- log-to-digital conversion of the preselected sound if signal is done by an a/d converter whose output is used to control an analog automatic gain circuit (agc) providing an optimal level for a wide range of input lev- els. it is possible to switch between automatic gain control and a fixed (setable) input gain. in the optimal case, the input range of the a/d converter is com- pletely covered by the sound if source. some combi- nations of saw filters and sound if mixer ics, how- ever, show large picture components on their outputs. in this case, filtering is recommended. it was found, that the high-pass filters formed by the coupling capac- itors at pins ana_in1+ and ana_in2+ and the if impedance (as shown in the application diagram) are sufficient in most cases. fig. 4 ? 1: architecture of the msp 34x0d sound if ana_in1+ ana_in2+ mono mono_in sc1_in_l scart1 sc1_in_r sc2_in_l scart2 sc2_in_r sc3_in_l scart3 sc3_in_r sc4_in_l sc4_in_r scart4 demodulator & nicam decoder scart switching facilities a/d a/d d/a d/a d/a d/a d/a d/a d/a d/a d/a 2 ident scartl scartr nicam b nicam a fm2 i2s1/2l/r fm1/am i2s_l/r loud- speaker l loud- speaker r scart1_l scart1_r scart2_l scart2_r dsp headphone r headphone l subwoofer i 2 s interface crystal pll adr-bus i2s_da_in1 i2s_da_out i2s_da_in2 i2s_ws i2s_cl xtal_out aud_cl_out xtal_in d_ctr_out0/1 dacm_l loudspeaker dacm_r dacm_sub subwoofer headphone daca_l daca_r sc1_out_l sc1_out_r sc2_out_l sc2_out_r scart 2 scart 1 preliminary data sheet msp 34x0d micronas 11 4.1.2. quadrature mixers the digital input coming from the integrated a/d con- verter may contain audio information at a frequency range of theoretically 0 to 9 mhz corresponding to the selected standards. by means of two programmable quadrature mixers, two different audio sources, for example nicam and fm-mono, may be shifted into baseband position. in the following, the two main channels are provided to process either: ? nicam (msp-ch1) and fm/am mono (msp-ch2) simultaneously or, alternatively: ? fm-mono (ch2) ? fm2 (msp-ch1) and fm1 (msp-ch2). two programmable registers, to be divided up into a low and a high part, determine frequency of the oscilla- tor, which corresponds to the frequency of the desired audio carrier. 4.1.3. low-pass filtering block for mixed sound if signals data shaping and/or fm bandwidth limitation is per- formed by a linear phase finite impulse response (fir) filter. just like the oscillators ? frequency, the filter coeffi- cients are programmable and are written into the ic by the ccu via the control bus. thus, for example, differ- ent nicam versions can easily be implemented. two not necessarily different sets of coefficients are required, one for msp-ch1 (nicam or fm2) and one for msp-ch2 (fm1 = fm-mono). in a corresponding table several coefficient sets are proposed. fig. 4 ? 2: architecture of demodulator and nicam decoder section phase and am dis- crimination msp sound if channel 1 (msp-ch1: fm2, nicam) msp sound if channel 2 (msp-ch2: fm1, am) vreftop ana_in1+ ana_in2+ ana_in- ad_cv[8] ad_cv[7:1] agc ad dco1 oscillator mixer fir1 lowpass mode_reg[6] amplitude dqpsk decoder phase differen- tiator carrier detect ad_cv[9] mute nicam decoder mixer lowpass adr nicama nicamb fm2 ident carrier detect mute lowpass fm1/am mode_reg[8] differen- tiator phase fir2 lowpass phase and am dis- crimination amplitude mixer oscillator dco2 pins demodulator write registers frame nicama dco2 internal signal lines (see fig. 4?2) msp3410d only msp 34x0d preliminary data sheet 12 micronas 4.1.4. phase and am discrimination the filtered sound if signals are demodulated by means of the phase and amplitude discriminator block. on the output, the phase and amplitude is available for further processing. am signals are derived from the amplitude information, whereas the phase information serves for fm and nicam (dqpsk) demodulation. 4.1.5. differentiators fm demodulation is completed by differentiating the phase information output. 4.1.6. low-pass filter block for demodulated signals the demodulated fm and am signals are further low- pass filtered and decimated to a final sampling fre- quency of 32 khz. the usable bandwidth of the final baseband signals is about 15 khz. 4.1.7. high-deviation fm mode by means of mode_reg [9], the maximum fm devi- ation can be extended to approximately 360 khz. since this mode can be applied only for the msp sound if channel 2, the corresponding matrices in the baseband processing must be set to sound a. apart from this, the coefficient sets 380 khz fir2 or 500 khz fir2 must be chosen for the fir2. in relation to the normal fm mode, the audio level of the high-deviation mode is reduced by 6 db. the fm prescaler should be adjusted accordingly. in high-deviation fm mode, nei- ther fm-stereo nor fm identification nor nicam pro- cessing is possible simultaneously. 4.1.8. fm carrier mute function in the dual-carrier fm mode to prevent noise effects or fm identification problems in the absence of one of the two fm carriers, the msp 34x0d offers a carrier detection feature, which must be activated by means of ad_cv[9]. if no fm carrier is available at the mspd channel 1, the corre- sponding channel fm2 is muted. if no fm carrier is available at the mspd channel 2, the corresponding channel fm1 is muted. 4.1.9. dqpsk decoder in case of nicam mode, the phase samples are decoded according the dqpsk-coding scheme. the output of this block contains the original nicam bit- stream. 4.1.10. nicam decoder before any nicam decoding can start, the msp must lock to the nicam frame structure by searching and synchronizing to the so-called frame alignment words (faw). to reconstruct the original digital sound samples, the nicam bitstream has to be descrambled, deinter- leaved, and rescaled. also, bit-error detection and cor- rection (concealment) is performed in this block. to facilitate the central control unit ccu to switch the (e.g.) tv set to the actual sound mode, control infor- mation on the nicam mode and bit error rate are sup- plied by the nicam decoder. it can be read out via the i 2 c bus. an automatic switching facility (auto_fm) between nicam and fm/am reduces the amount of ccu instructions in case of bad nicam reception. preliminary data sheet msp 34x0d micronas 13 4.2. analog section 4.2.1. scart switching facilities the analog input and output sections include full matrix switching facilities, which are shown in fig. 4 ? 3. to design a tv set with four pairs of scart inputs and two pairs of scart outputs, no external switching hardware is required. the switches are controlled by the acb bits defined in the audio processing interface (see section 7.3.18. on page 47). fig. 4 ? 3: scart switching facilities (see 7.3.18.). switching positions show the default configuration after power-on reset 4.2.2. stand-by mode if the msp 34x0d is switched off by first pulling standbyq low, and then disconnecting the 5 v, but keeping the 8 v power supply ( ? stand-by ? -mode ), the switches s1, s2, and s3 (see fig. 4 ? 3) maintain their position and function. this facilitates the copying from selected scart inputs to scart outputs in the tv set ? s stand-by mode. in case of power-on start or starting from stand-by, the ic switches automatically to the default configuration, shown in fig. 4 ? 3. this action takes place after the first i 2 c transmission into the dsp part. by transmitting the acb register first, the individual default setting mode of the tv set can be defined. 4.3. dsp section (audio baseband processing) all audio baseband functions are performed by digital signal processing (dsp). the dsp functions are grouped into three processing parts: input preprocess- ing, channel source selection, and channel postpro- cessing (see fig. 4 ? 5 and section 7.). the input preprocessing is intended to prepare the various signals of all input sources in order to form a standardized signal at the input to the channel selec- tor. the signals can be adjusted in volume, are pro- cessed with the appropriate deemphasis, and are dematrixed if necessary. having prepared the signals that way, the channel selector makes it possible to distribute all possible source signals to the desired output channels. the ability to route in an external coprocessor for spe- cial effects, like surround processing and sound field processing, is of special importance. routing can be done with each input source and output channel via the i 2 s inputs and outputs. all input and output signals can be processed simulta- neously with the exception that fm2 cannot be pro- cessed at the same time as nicam. fm identification and adaptive deemphasis are also not possible simul- taneously. note, that the nicam input signals are only available in the msp 3410d version. 4.3.1. dual-carrier fm stereo/bilingual detection for the terrestrial dual-fm carrier systems, audio infor- mation can be transmitted in three modes: mono, ste- reo, or bilingual. to obtain information about the current audio operation mode, the msp 34x0d detects the so- called identification signal. information is supplied via the stereo detection register to an external ccu. fig. 4 ? 4: stereo/bilingual detection a d d a a d scart_in sc1_in_l/r sc2_in_l/r sc3_in_l/r sc4_in_l/r mono_in acb[5,9,8] mute s1 scartl/r to audio baseband processing (dsp_in) acb [6,11,10] scart_out sc1_out_l/r s2 acb [7,13,12] mute sc2_out_l/r from audio baseband processing (dsp_out) scart1_l/r scart2_l/r mute s3 scart_out ident am demodu- lation stereo detection filter bilingual detection filter level detect level detect ? stereo detection register msp 34x0d preliminary data sheet 14 micronas channel source select fig. 4 ? 5: audio baseband processing (dsp firmware) analog inputs scartl scartr demodulated if inputs i 2 s bus inputs prescale scart dc level readout fm1 fm1/am fm2 adaptive deemphasis deemphasis 50/75 s j17 prescale fm/am fm-matrix dc level readout fm2 loudspeaker channel matrix prescale prescale i 2 s1 deemphasis j17 nicamb nicama i 2 s1l i 2 s1r prescale i 2 s2 i 2 s2l i 2 s2r i 2 s channel matrix nicam nicama quasi-peak channel matrix scart2 channel matrix scart1 channel matrix headphone channel matrix avc bass/ treble or equalizer beeper bass/ treble loudness loudness quasi-peak detector quasi peak readout l quasi peak readout r comple- mentary highpass lowpass spatial effects balance level adjust balance volume volume volume loudspeaker l loudspeaker r subwoofer volume loudspeaker outputs headphone outputs scart outputs i 2 s outputs i 2 sr i 2 sl scart2_r scart2_l scart1_r scart1_l headphone r headphone l internal signal lines (see fig. 4? 2 and fig. 4 ? 3) preliminary data sheet msp 34x0d micronas 15 4.4. audio pll and crystal specifications the msp 34x0d requires a 18.432 mhz (12 pf, paral- lel) crystal. the clock supply of the whole system depends on the msp 34x0d operation mode: 1. fm-stereo, fm-mono: the system clock runs free on the crystal ? s 18.432 mhz. 2. nicam: an integrated clock pll uses the 364 khz baud rate, accomplished in the nicam demodulator block to lock the system clock to the bit rate, respectively, 32-khz sampling rate of the nicam transmitter. as a result, the whole audio system is supplied with a controlled 18.432 mhz clock. 3. i 2 s slave operation: in this case, the system clock is locked to a synchro- nizing signal (i2s_cl, i2s_ws) supplied by the coprocessor chip. remark on using the crystal: external capacitors at each crystal pin to ground are required (see general crystal recommendations on page 69). 4.5. adr bus interface for the astra digital radio system (adr), the msp 34x0d performs preprocessing, as there are car- rier selection and filtering. via the 3-line adr bus, the resulting signals are transferred to the drp 3510a, where the source decoding is performed. to be pre- pared for an upgrade to adr with an additional drp board, the following lines of msp 34x0d should be provided on a feature connector: ? aud_cl_out ? i2s_da_in1 or i2s_da_in2 ? i2s_da_out ? i2s_ws ? i2s_clk ? adr_cl ? adr_ws ? adr_da 4.6. digital control output pins the static level of two output pins of the msp 34x0d (d_ctr_out0/1) is switchable between high and low by means of the i 2 c bus. this enables the con- trolling of external hardware-controlled switches or other devices via i 2 c bus (see section 7.3.18. on page 47). table 4 ? 1: some examples for recommended channel assignments for demodulator and audio processing part mode msp sound if- channel 1 msp sound if- channel 2 fm- matrix channel- select channel matrix b/g-stereo fm2 (5.74 mhz): r fm1 (5.5 mhz): (l+r)/2 b/g stereo speakers: fm stereo b/g-bilingual fm2 (5.74 mhz): sound b fm1 (5.5 mhz): sound a no matrix speakers: fm h. phone: fm speakers: sound a h. phone: sound b nicam-i-st/ fm-mono nicam (6.552 mhz) fm (6.0 mhz): mono no matrix speakers: nicam h. phone: fm speakers: stereo h. phone: sound a sat-mono not used fm (6.5 mhz): mono no matrix speakers: fm sound a sat-stereo 7.2 mhz: r 7.02 mhz: l no matrix speakers: fm stereo sat-bilingual 7.38 mhz: sound c 7.02 mhz: sound a no matrix speakers: fm h. phone: fm speakers: sound a h. phone: sound b=c sat-high dev. mode don ? t care 6.552 mhz no matrix speakers: fm h. phone: fm speakers: sound a h. phone: sound a msp 34x0d preliminary data sheet 16 micronas 4.7. i 2 s bus interface by means of this standardized interface, additional feature processors can be connected to the msp 34x0d. two possible formats are supported: the standard mode (mode_reg[4]=0) selects the sony format, where the i2s_ws signal changes at the word boundaries. the so-called philips format, which is characterized by a change of the i2s_ws signal one i2s_cl period before the word boundaries, is selected by setting mode_reg[4]=1. the msp 34x0d normally serves as the master on the i 2 s interface. here, the clock and word strobe lines are driven by the msp 34x0d. by setting mode_reg[3]=1, the msp 34x0d is switched to a slave mode. now, these lines are input to the msp 34x0d and the master clock is synchronized to 576 times the i2s_ws rate (32 khz). nicam operation is not possible in this mode. the i 2 s bus interface consists of five pins: 1. i2s_da_in1, i2s_da_in2: for input, four channels (two channels per line, 2*16 bits) per sampling cycle (32 khz) are transmit- ted. 2. i2s_da_out: for output, two channels (2*16 bits) per sampling cycle (32 khz) are transmitted. 3. i2s_cl: gives the timing for the transmission of i 2 s serial data (1.024 mhz). 4. i2s_ws: the i2s_ws word strobe line defines the left and right sample. a precise i 2 s timing diagram is shown in fig. 4 ? 6. fig. 4 ? 6: i 2 s bus timing diagram (data: msb first) r lsb l lsb r lsb l lsb 16 bit right channel l lsb l lsb r msb r msb detail c philips mode sony mode i2s_ws i2s_cl i2s_dain detail a philips mode sony mode detail b philips/sony mode programmable by mode_reg[4] r lsb r lsb l msb l msb i2s_daout 16 bit right channel 16 bit left channel 16 bit left channel f i2sws i2s_cl detail c i2s_ws as input i2s_ws as output 1/f i2scl t i2sws1 t i2sws2 t i2s5 t i2s6 detail a,b i2s_cl i2s_da_in i2s_da_out t i2s1 t i2s2 t i2s3 t i2s4 preliminary data sheet msp 34x0d micronas 17 5. i 2 c bus interface: device and subaddresses as a slave receiver, the msp 34x0d can be controlled via i 2 c bus. access to internal memory locations is achieved by subaddressing. the demodulator and the dsp processor parts have two separate subaddress- ing register banks. in order to allow for more msp 34x0d ics to be con- nected to the control bus, an adr_sel pin has been implemented. with adr_sel pulled to high, low, or left open, the msp 34x0d responds to changed device addresses. thus, three identical devices can be selected. by means of the reset bit in the control register, all devices with the same device address are reset. the ic is selected by asserting a special device address in the address part of an i 2 c transmission. a device address pair is defined as a write address (80, 84, or 88 hex ) and a read address (81, 85, or 89 hex ) (see table 5 ? 1). writing is done by sending the device write address, followed by the subaddress byte, two address bytes, and two data bytes. reading is done by sending the device write address, followed by the sub- address byte and two address bytes. without sending a stop condition, reading of the addressed data is com- pleted by sending the device read address (81, 85, or 89 hex ) and reading two bytes of data (see fig. 5 ? 1: ? i 2 c bus protocol ? and section 5.2. ? proposal for msp 34x0d i 2 c telegrams ? ). due to the internal architecture of the msp 34x0d, the ic cannot react immediately to an i 2 c request. the typ- ical response time is about 0.3 ms for the dsp proces- sor part and 1 ms for the demodulator part if nicam processing is active. if the receiver (msp) can ? t receive another complete byte of data until it has performed some other function; for example, servicing an internal interrupt, it can hold the clock line i2c_cl low to force the transmitter into a wait state. the positions within a transmission where this may happen are indi- cated by ? wait ? in section 5.1. the maximum wait period of the msp during normal operation mode is less than 1 ms. i 2 c bus error caused by msp hardware problems: in case of any internal error, the msps wait period is extended to 1.8 ms. afterwards, the msp does not acknowledge (nak) the device address. the data line will be left high by the msp and the clock line will be released. the master can then generate a stop con- dition to abort the transfer. by means of nak, the master is able to recognize the error state and to reset the ic via i 2 c bus. while trans- mitting the reset protocol (see section 5.2.4. on page 19) to ? control ? , the master must ignore the not- acknowledge bits (nak) of the msp. a general timing diagram of the i 2 c bus is shown in fig. 5 ? 2 on page 19. table 5 ? 1: i 2 c bus device addresses adr_sel low high left open mode write read write read write read msp device address 80 hex 81 hex 84 hex 85 hex 88 hex 89 hex table 5 ? 2: i 2 c bus subaddresses name binary value hex value mode function control 0000 0000 00 w software reset test 0000 0001 01 w only for internal use wr_dem 0001 0000 10 w write address demodulator rd_dem 0001 0001 11 w read address demodulator wr_dsp 0001 0010 12 w write address dsp rd_dsp 0001 0011 13 w read address dsp msp 34x0d preliminary data sheet 18 micronas 5.1. protocol description write to dsp or demodulator read from dsp or demodulator write to control or test registers note: s = i 2 c bus start condition from master p = i 2 c bus stop condition from master ack = acknowledge-bit: low on i2c_da from slave ( = msp, gray) or master ( = ccu, hatched) nak = not-acknowledge bit: high on i2c_da from master ( = ccu, hatched) to indicate ? end of read ? or from msp indicating internal error state wait = i 2 c clock line held low by the slave ( = msp) while interrupt is serviced ( < 1.8 ms) fig. 5 ? 1: i 2 c bus protocol (msb first; data must be stable while clock is high) table 5 ? 3: control register (subaddress: 00 hex) name subaddress msb 14 13..1 lsb control 00 hex 1 : reset 0 : normal 000 swrite device address wait ack subaddr ack addr byte high ack addr byte low ack data byte high ack data byte low ack p swrite device address wait ack subaddr ack addr byte high ack addr byte low ack s read device address wait ack data byte high ack data byte low nak p swrite device address wait ack subaddr ack data byte high ack data byte low ack p 1 0 s p i2c_da i2c_cl preliminary data sheet msp 34x0d micronas 19 (data: msb first) fig. 5 ? 2: i 2 c bus timing diagram 5.2. proposal for msp 34x0d i 2 c telegrams 5.2.1. symbols daw write device address dar read device address < start condition > stop condition aa address byte dd data byte 5.2.2. write telegrams msp 34x0d preliminary data sheet 20 micronas 5.3. start-up sequence: power-up and i 2 c-controlling after power-on or reset (see fig. 5 ? 3), the ic is in an inactive state. the ccu has to transmit the required coefficient set for a given operation via the i 2 c bus. initialization should start with the demodulator part. if required for any reason, the audio processing part can be loaded before the demodulator part. fig. 5 ? 3: power-up sequence 4.5 v internal reset t/ms power-up reset: threshold and timing reset delay low-to-high threshold high-to-low threshold >2 ms resetq avsup 0.7 dvsup 0.45...0.55 dvsup (note: 0.7 dvsup means 3.5 volt with dvsup=5.0 volt) high low t/ms t/ms dvsup note: the reset should not reach high level be- fore the oscillator has started. this requires a reset delay of >2 ms preliminary data sheet msp 34x0d micronas 21 6. programming the demodulator and nicam decoder section 6.1. short-programming and general programming of the demodulator part the demodulator part of the msp 34x0d can be pro- grammed in two different modes: 1. demodulator short-programming provides a com- fortable way to set up the demodulator for many terres- trial tv sound standards with one single i 2 c bus trans- mission. the coding is listed in section 6.4.1. if a parameter does not coincide with the individual pro- gramming concept, it simply can be overwritten by using the general programming mode. some bits of the registers ad_cv (see section 6.5.1. on page 25) and mode_reg (see section 6.5.2. on page 27) are not affected by the short-programming. they must be transmitted once if their reset status does not fit. the demodulator short-programming is not compatible to msp 3410b and msp 3400c. autodetection for terrestrial tv standards is part of the demodulator short-programming. this feature enables the detection and set-up of the actual tv sound standard within 0.5 s. since the detected stan- dard is readable by the control processor, the autode- tection feature is mainly recommended for the primary set-up of a tv set: after having once determined the corresponding tv channels, their sound standards can be stored and later on programmed by the demodula- tor short-programming (see section 6.4.1. on page 23 and section 6.6.1. on page 32). 2. general programming ensures the software-com- patibility to other msps. it offers a very flexible way to apply all of the msp 34x0d demodulator facilities. all registers except 0020 hex (demodulator short-pro- gramming) have to be written with values correspond- ing to the individual requirements. for satellite applica- tions, with their many variations, this mode must be selected. all transmissions on the control bus are 16 bits wide. however, data for the demodulator part have only 8 or 12 significant bits. these data have to be inserted lsb-bound and filled with zero bits into the 16-bit transmission word. table 4 ? 1 explains how to assign fm carriers to the msp sound if channels and the corresponding matrix modes in the audio processing part. msp 34x0d preliminary data sheet 22 micronas 6.2. demodulator write registers: table and addresses 6.3. demodulator read registers: table and addresses table 6 ? 1: demodulator write registers; subaddress: 10 hex ; these registers are not readable! demodulator write registers address (hex) function demodulator short- programming 0020 write into this register to apply demodulator short programming (see sec- tion 6.4.1. on page 23). if the internal setting coincidences with the individ- ual requirements no more of the remaining demodulator write registers have to be transferred. auto_fm/am 0021 only for nicam: automatic switching between nicam and fm/am in case of bad nicam reception (see section 6.4.2. on page 24) write registers necessary for general programming mode only ad_cv 00bb input selection, configuration of agc, mute function and selection of a/d converter, fm carrier mute on/off mode_reg 0083 mode register fir1 fir2 0001 0005 filter coefficients channel 1 (6 8 bit) filter coefficients channel 2 (6 8 bit), + 3 8 bit offset (total 72 bits) dco1_lo dco1_hi dco2_lo dco2_hi 0093 009b 00a3 00ab increment channel 1 low part increment channel 1 high part increment channel 2 low part increment channel 2 high part pll_caps 001f switchable pll capacitors to tune open-loop frequency; to use only if nicam of mode_reg = 0 ; normally not of interest for the customer table 6 ? 2: demodulator read registers; subaddress: 11 hex ; these registers are not writable! demodulator read registers address (hex) function result of autodetection 007e (see table 6 ? 13) c_ad_bits 0023 nicam sync bit, nicam c bits, and three lsbs of additional data bits add_bits 0038 nicam: bit [10:3] of additional data bits cib_bits 003e nicam: cib1 and cib2 control bits error_rate 0057 nicam error rate, updated with 182 ms conc_ct 0058 only to be used in mspb compatibility mode fawct_ist 0025 only to be used in mspb compatibility mode pll_caps 021f not for customer use. agc_gain 021e not for customer use. preliminary data sheet msp 34x0d micronas 23 6.4. demodulator write registers for short-programming: functions and values in the following, the functions of some registers are explained and their (default) values are defined: 6.4.1. demodulator short-programming table 6 ? 3: msp 34x0d demodulator short-programming demodulator short-programming 0020 hex tv sound standard internal setting description code (hex) ad_cv 2) (see table 6 ? 5) mode_ reg 2) (see table 6 ? 8) dco1 (mhz) dco2 (mhz) fir1/2 coefficients identifica- tion mode autodetection 0001 detects and sets one of the standards listed below, if available. results are to be read out of the demodulator read register ? result of autodetection ? (section 6.6.1.) m dual-fm 0002 ad_cv- fm m1 4.72421 4.5 see table 6 ? 11: te r r e s t r i a l t v standards reset, then standard m b/g dual-fm 0003 ad_cv-fm m1 5.74218 5.5 reset, then standard b/g d/k1 dual-fm 0004 ad_cv-fm m1 6.25781 6.5 d/k2 dual-fm 0005 ad_cv-fm m1 6.74218 6.5 0006/ 0007 reserved for future dual-fm standards auto_ fm/am b/g nicam fm 0008 ad_cv-fm m2 5.85 5.5 see table 6 ? 11: te r r e s t r i a l t v standards 1) l nicam am 0009 ad_cv-am m3 5.85 6.5 i nicam fm 000a ad_cv-fm m2 6.552 6.0 d/k nicam fm 000b ad_cv-fm m2 5.85 6.5 >000b reserved for future nicam standards 1) corresponds to the actual setting of auto_fm (address = 0021 hex ) 2) bits of ad_cv or mode_reg, which are not affected by the short-programming, must be transmitted separately if their reset status does not fit. note: all parameters in the dsp section (audio baseband processing), except the identification mode register, are not affected by the demodulator short-programming. they still have to be defined by the control pro- cessor. msp 34x0d preliminary data sheet 24 micronas 6.4.2. auto_fm/am: automatic switching between nicam and fm/am-mono in case of bad nicam transmission or loss of the nicam carrier, the mspd offers a comfortable mode to switch back to the fm/am-mono signal. if automatic switching is active, the msp internally evaluates the error_rate. all output channels which are assigned to the nicam source are switched back to the fm/am-mono source without any further ccu instruc- tion, if the nicam carrier fails or the error_rate exceeds the definable threshold. note, that the channel matrix of the corresponding out- put channels must be set according to the nicam mode and need not be changed in the fm/am fall-back case. an appropriate hysteresis algorithm avoids oscil- lating effects. the msb of the register c_ad_bits (addr: 0023 hex ) informs about the actual nicam fm/am status (see section 6.6.2. on page 32). there are two possibilities to define the threshold deciding for nicam or fm/am-mono (see table 6 ? 4): 1. default value of the mspd (internal threshold = 700, i.e. switch to fm/am if error_rate > 700) 2. definable by the customer (recommendable range: threshold = 50...2000, i.e. bits [10...1] = 25...1000). note: the auto_fm feature is only active if the nicam bit of mode_reg is set. table 6 ? 4: coding of automatic nicam fm/am switching (reset status: mode 0) mode auto_fm [11...0] addr. = 0021 hex selected sound at the nicam channel select threshold comment 0 default bit [0] = 0 bits [11...1] = 0 always nicam none compatible to msp 3410b, i.e. automatic switching is disabled 1 bit [0] = 1 bit [11...1] = 0 nicam or fm/am, depending on error_rate 700 dec automatic switching with internal threshold 2 bit [0] = 1 bit [10...1] = 25..1000 int = threshold/2 bit [11] = 0 nicam or fm/am, depending on error_rate set by customer automatic switching with external threshold 3 bit [11] = [0] = 1 bit [10...1] = 0 always fm/am none forced fm-mono mode, i.e. automatic switching is disabled preliminary data sheet msp 34x0d micronas 25 6.5. demodulator write registers for the general programming mode: functions and values 6.5.1. register ? ad_cv ? table 6 ? 5: ad_cv register (reset status: all bits are ? 0 ? ) ad_cv 00bb hex set by short-programming bit meaning settings ad_cv-fm ad_cv-am ad_cv [0] not used must be set to 0 0 0 ad_cv [6...1] reference level in case of auto- matic gain control = on (see table 6 ? 6). constant gain factor when automatic gain control = off (see table 6 ? 7) 101000 100011 ad_cv [7] determination of automatic gain or constant gain 0 = constant gain 1 = automatic gain 11 ad_cv [8] selection of sound if source 0 = ana_in1+ 1 = ana_in2+ not affected not affected ad_cv [9] msp carrier mute function (must be switched off in high deviation mode) 0 = off: no mute 1 = on: mute as de- scribed in section 4.1.8. on page 12 10 ad_cv [15 ... 10] not used must be set to 0 000000 000000 table 6 ? 6: reference values for active agc (ad_cv[7] = 1) application input signal contains ad_cv [6...1] ref. value ad_cv [6...1] (dec) range of input signal at pin ana_in1+ and ana_in2+ terrestrial tv dual-carr. fm nicam/fm nicam/am nicam only 2 fm carriers 1 fm and 1 nicam carrier 1 am and 1 nicam carrier 1 nicam carrier only 101000 101000 100011 010100 40 40 35 20 0.10 ? 3v pp 1) 0.10 ? 3v pp 1) 0.10 ? 1.4 v pp recommended: 0.10 ? 0.8 v pp 0.05 ? 1.0 v pp sat 1 or more fm carriers 100011 35 0.10 ? 3v pp 1) adr fm a. adr carriers see drp 3510a data sheet 1) for signals above 1.4 v pp , the minimum gain of 3 db is switched and overflow of the a/d converter may result. due to the robustness of the internal processing, the ic works up to and even more than 3 v pp , if norm conditions of fm/nicam or fm1/fm2 ratio are supposed. in this overflow case, a loss of fm s/n ratio of about 10 db may appear. msp 34x0d preliminary data sheet 26 micronas table 6 ? 7: ad_cv parameters for constant input gain (ad_cv[7]=0) step ad_cv [6...1] constant gain gain input level at pin ana_in1+ and ana_in2+ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 000000 000001 000010 000011 000100 000101 000110 000111 001000 001001 001010 001011 001100 001101 001110 001111 010000 010001 010010 010011 010100 3.00 db 3.85 db 4.70 db 5.55 db 6.40 db 7.25 db 8.10 db 8.95 db 9.80 db 10.65 db 11.50 db 12.35 db 13.20 db 14.05 db 14.90 db 15.75 db 16.60 db 17.45 db 18.30 db 19.15 db 20.00 db maximum input level: 3 v pp (fm) or 1 v pp (nicam) 1) maximum input level: 0.14 v pp 1) for signals above 1.4 v pp , the minimum gain of 3 db is switched and overflow of the a/d converter may result. due to the robustness of the internal processing, the ic works up to and even more than 3 v pp , if norm conditions of fm/nicam or fm1/fm2 ratio are supposed. in this overflow case, a loss of fm s/n ratio of about 10 db may appear. preliminary data sheet msp 34x0d micronas 27 6.5.2. register ? mode_reg ? the register ? mode_reg ? contains the control bits determining the operation mode of the msp 34x0d; ta b l e 6 ? 8 explains all bit positions. table 6 ? 8: control word ? mode_reg ? ; reset status: all bits are ? 0 ? mode_reg 0083 hex set by short-programming bit function comment definition m1 m2 m3 [0] not used 0 : strongly recommended 0 0 0 [1] dctr_tri digital control out 0/1 tri-state 0 : active 1 : tri-state xxx [2] i2s_tri i 2 s outputs tri-state (i2s_cl, i2s_ws, i2s_da_out) 0 : active 1 : tri-state xxx [3] i 2 s mode 1) master/slave mode of the i 2 s bus 0 : master 1 : slave xxx [4] i2s_ws mode ws due to the sony or philips format 0 : sony 1 : philips xxx [5] aud_cl_out switch audio_clock_output to tri-state 0 : on 1 : tri-state xxx [6] nicam 1) mode of msp-ch1 0 : fm 1 : nicam 011 [7] not used 0 : strongly recommended 0 0 0 [8] fm am mode of msp ch2 0 : fm 1 : am 001 [9] hdev high deviation mode (channel matrix must be sound a) 0 : normal 1 : high deviation mode 000 [11...10] not used 0 : strongly recommended 00 00 00 [12] msp ch1 gain see also table 6 ? 11 0 : gain = 6 db 1 : gain = 0 db 000 [13] fir1 filter coeff. set see also table 6 ? 11 0 : use fir1 1 : use fir2 100 [14] adr mode of msp ch1/ adr interface 0 : normal mode/tri-state 1 : adr mode/active 000 [15] am gain gain for am demodulation 0 : 0 db (default. of mspb) 1 : 12 db (recommended) 111 1) in case of nicam operation, i 2 s slave mode is not possible. in case of i 2 s slave mode, no synchronization to nicam is allowed. x: not affected by short-programming msp 34x0d preliminary data sheet 28 micronas 6.5.3. fir parameter the following data values (see table 6 ? 10) are to be transferred 8 bits at a time embedded lsb-bound in a 16-bit word . the loading sequences must be obeyed. to change a coefficient set, the complete block fir1 or fir2 must be transmitted. note: for compatibility with msp 3410b, imreg1 and imreg2 have to be transmitted. the value for imreg1 and imreg2 is 004. due to the partitioning to 8-bit units, the values 04 hex , 40 hex , and 00 hex arise. table 6 ? 9: channel modes ? mode_reg [6, 8, 9] ? nicam bit[6] fm am bit[8] hdev bit[9] msp ch1 msp ch2 100nicam fm1 110nicam am 000fm2 fm1 001 ? : ? high-deviation fm table 6 ? 10: loading sequence for fir coefficients fir1 0001 hex (msp ch1: nicam/fm2) no. symbol name bits value 1 nicam/fm2_coeff. (5) 8 see table 6 ? 11 2 nicam/fm2_coeff. (4) 8 3 nicam/fm2_coeff. (3) 8 4 nicam/fm2_coeff. (2) 8 5 nicam/fm2_coeff. (1) 8 6 nicam/fm2_coeff. (0) 8 fir2 0005 hex (msp ch2: fm1/am ) no. symbol name bits value 1imreg1 8 04 hex 2 imreg1 / imreg2 8 40 hex 3imreg2 8 00 hex 4 fm/am_coef (5) 8 see table 6 ? 11 5 fm/am_coef (4) 8 6 fm/am_coef (3) 8 7 fm/am_coef (2) 8 8 fm/am_coef (1) 8 9 fm/am_coef (0) 8 preliminary data sheet msp 34x0d micronas 29 table 6 ? 11: 8-bit fir coefficients (decimal integer) for msp 34x0d (reset status: all coefficients are ? 0 ? ) coefficients for fir1 0001 hex and fir2 0005 hex terrestrial tv standards b/g-, d/k- nicam-fm i- nicam-fm l- nicam-am b/g-, d/k-, m-dual fm 130 khz 180 khz 200 khz 280 khz 380 khz 500 khz auto- search coef(i) fir1 fir2 fir1 fir2 fir1 fir2 fir2 fir2 fir2 fir2 fir2 fir2 fir2 fir2 0 ? 2323 ? 2 ? 43 7393 ? 8 ? 1 ? 1 ? 1 1 ? 818 418 ? 8 ? 12 18 53 18 18 ? 8 ? 9 ? 1 ? 1 2 ? 10 27 ? 627 ? 10 ? 927 6428274 ? 16 ? 8 ? 8 3 10 48 ? 4 48 10 23 48 119 47 48 36 5 2 2 4 50 66 40 66 50 79 66 101 55 66 78 65 59 59 5 86 72 94 72 86 126 72 127 64 72 107 123 126 126 mode- reg[12] 0 0 0 0 111111 0 mode- reg[13] 0 0 0 1 111111 0 for compatibility, except for the fir2 am and the autosearch sets, the fir filter programming as used for the msp 3410b is also possible. adr coefficients are listed in the drp data sheet. b fm satellite fir filter corresponds to a band-pass with a band- width of b = 130 to 500 khz f c frequency msp 34x0d preliminary data sheet 30 micronas 6.5.4. dco registers for a chosen tv standard, a corresponding set of 24-bit registers determining the mixing frequencies of the quadrature mixers, has to be written into the ic. in ta b l e 6 ? 12, some examples of dco registers are listed. it is necessary to divide them up into low part and high part. the formula for the calculation of the registers for any chosen if frequency is as follows: incr dec = int(f / fs ? 2 24 ) with: int = integer function f = if frequency in mhz f s = sampling frequency (18.432 mhz) conversion of incr into hex format and separation of the 12-bit low and high parts lead to the required regis- ter values (dco1_hi or _lo for msp ch1, dco2_hi or lo for msp ch2). table 6 ? 12: dco registers for the msp 34x0d (reset status: dco_hi/lo = ? 0000 ? ) dco1_lo 0093 hex , dco1_hi 009b hex ; dco2_lo 00a3 hex , dco2_hi 00ab hex freq. [mhz] dco_hi hex dco_lo hex freq. [mhz] dco_hi hex dco_lo hex 4.5 03e8 0000 5.04 5.5 5.58 5.7421875 0460 04c6 04d8 04fc 0000 038e 0000 00aa 5.76 5.85 5.94 0500 0514 0528 0000 0000 0000 6.0 6.2 6.5 6.552 0535 0561 05a4 05b0 0555 0c71 071c 0000 6.6 6.65 6.8 05ba 05c5 05e7 0aaa 0c71 01c7 7.02 0618 0000 7.2 0640 0000 7.38 0668 0000 7.56 0690 0000 preliminary data sheet msp 34x0d micronas 31 6.6. demodulator read registers: functions and values all registers except c_ad_bits are 8 bits wide. they can be read out of the ram of the msp 34x0d. all transmissions take place in 16-bit words. the valid 8 bit data are the 8 lsbs of the received data word. to enable appropriate switching of the channel select matrix of the baseband processing part, the nicam or fm identification parameters must be read and evalu- ated by the ccu. the fm identification registers are described in section 7.2. on page 39. to handle the nicam sound and to observe the nicam quality, at least the registers c_ad_bits and error_rate must be read and evaluated by the ccu. additional data bits and cib bits, if supplied by the nicam trans- mitter, can be obtained by reading the registers add_bits and cib_bits. observing the presence and quality of nicam can be delegated to the msp 3410d, if the automatic switch- ing feature (auto_fm, section 6.6.1. on page 32) is applied. table 6 ? 13: result of autodetection result of autodetect 007e hex code (data) hex detected tv sound standard note: after detection, the detected standard is set automatically according to table 6 ? 3. >07ff autodetect still active 0000 no tv sound standard was detected; select sound standard manually 0002 m dual fm, even if only fm1 is available 0003 b/g dual fm, even if only fm1 is available 0008 b/g fm nicam, only if nicam is available 0009 l_am nicam, whenever a 6.5-mhz carrier is detected, even if nicam is not available. if also d/k might be possible, a decision has to be made according to the video mode: video = secam_l no more activities necessary video = secam_east cad_bits[0] = 0 cad_bits[0] = 1 to be set by means of the short programming mode: d/k1 or d/k2 (see section 6.6.1.) d/k-nicam (standard 00b hex ) 000a i-fm-nicam, even if nicam is not available note: similar as for the demodulator short-programming, the autodetection does not affect most of the para- meters of the dsp section (audio baseband processing): the following exceptions are to be considered: ? identification mode: autodetection resets and sets the corresponding identification mode ? prescale fm/am and fm matrix and deemphasis fm are undefined after autodetection msp 34x0d preliminary data sheet 32 micronas 6.6.1. autodetection of terrestrial tv audio standards by means of autodetect, the msp 34x0d offers a sim- ple and fast (<0.5 s) facility to detect the actual tv audio standard. the algorithm checks for the fm- mono and nicam carriers of all common tv sound standards. the following notes must be considered when applying the autodetect feature: 1. since there is no way to distinguish between am and fm carrier, a carrier detected at 6.5 mhz is inter- preted as an am carrier. if video detection results in secam east, the mspd result ? 9 ? of autodetect must be reinterpreted as ? b hex ? in case of cad_bits[0] = 1, or as ? 4 ? or ? 5 ? by using the demodulator short programming mode. a simple decision can be made between the two d/k fm ste- reo standards by setting d/k1 and d/k2 using the short programming mode and checking the identifi- cation of both versions (see table 6 ? 13 on page 31). 2. during active autodetect, no i 2 c transfers besides reading the autodetect result are recommended. results exceeding 07ff hex indicate an active auto- detect. 3. the results are to be understood as static informa- tion, i.e. no evaluation of fm or nicam identification concerning the dynamic mode (stereo, bilingual, or mono) are done. 4. before switching to autodetect, the audio process- ing part should be muted. do not forget to demute after having received the result. 6.6.2. c_ad_bits nicam operation mode control bits and a[2...0] of the additional data bits. format: important: ? s ? = bit[0] indicates correct nicam syn- chronization (s=1). if s=0, the msp 3410d has not yet synchronized correctly to frame and sequence, or has lost synchronization. the remaining read registers are therefore not valid. the msp 3410d mutes the nicam output automatically and tries to synchronize again as long as mode_reg[6] is set. the operation mode is coded by c4...c1 as shown in ta b l e 6 ? 14. 6.6.3. add_bits [10...3] 0038 hex contains the remaining 8 of the 11 additional data bits. the additional data bits are not yet defined by the nicam 728 system. format: 6.6.4. cib_bits cib bits 1 and 2 (see nicam 728 specifications). format: msb c_ad_bits 0023 hex lsb 11...76543210 auto _fm ... a[2] a[1] a[0] c4 c3 c2 c1 s table 6 ? 14: nicam operation modes as defined by the ebu nicam 728 specification c4 c3 c2 c1 operation mode 0 0 0 0 stereo sound (nicam a/b), independent mono sound (fm1) 0 0 0 1 two independent mono signals (nicam a, fm1) 0 0 1 0 three independent mono channels (nicam a, nicam b, fm1) 0 0 1 1 data transmission only; no audio 1 0 0 0 stereo sound (nicam a/b), fm1 carries same channel 1 0 0 1 one mono signal (nicam a). fm1 carries same channel as nicam a 1 0 1 0 two independent mono channels (nicam a, nicam b). fm1 carries same channel as nicam a 1 0 1 1 data transmission only; no audio x 1 x x unimplemented sound coding option (not yet defined by ebu nicam 728 specification) auto_fm: monitor bit for the auto_fm status: 0: nicam source is nicam 1: nicam source is fm msb add_bits 0038 hex lsb 76543210 a[10] a[9] a[8] a[7] a[6] a[5] a[4] a[3] msb cib_bits 003e hex lsb 76543210 xxxxxxcib1cib2 preliminary data sheet msp 34x0d micronas 33 6.6.5. error_rate 0057 hex average error rate of the nicam reception in a time interval of 182 ms, which should be close to 0. the ini- tial and maximum value of error_rate is 2047. this value is also active, if the nicam bit of mode_reg is not set. since the value is achieved by filtering, a certain transition time (appr. 0.5 sec) is unavoidable. acceptable audio may have error_rates up to a value of 700 dec . individual evaluation of this value by the ccu and an appropriate threshold may define the fallback mode from nicam to fm/am-mono in case of poor nicam reception. the bit error rate per second (ber) can be calculated by means of the following formula: ber = error_rate 12.3 10 ? 6 /s if the automatic switching feature is applied (auto_fm; section 6.4.2. on page 24), reading of error_rate can be omitted. 6.6.6. conc_ct (for compatibility with msp 3410b) this register contains the actual number of bit errors of the previous 728-bit data frame. evaluation of conc_ct is no longer recommended. 6.6.7. fawct_ist (for compatibility with msp 3410b) for compatibility with msp 3410b this value equals 12 as long as nicam quality is sufficient. it decreases to 0 if nicam reception gets poor. evaluation of fawct_ist is no longer recommended. 6.6.8. pll_caps it is possible to read out the actual setting of the pll_caps. in standard applications, this register is not of interest for the customer. 6.6.9. agc_gain it is possible to read out the actual setting of agc_gain in automatic gain mode. in standard applications, this register is not of interest for the cus- tomer. 6.7. sequences to transmit parameters and to start processing after having been switched on, the msp has to be ini- tialized by transmitting the parameters according to the load_seq_1/2 (see table 6 ? 15 on page 34). the data are immediately active after transmission into the msp. it is no longer necessary to transmit load_reg_1/2 or load_reg_1 as it was for msp 34x0b. nevertheless, transmission of load_reg_1/2 or load_reg_1 does no harm. for nicam operation, the following steps listed in ? nicam_wait, _read, and _check ? in table 6 ? 15 must be taken. for fm-stereo operation, the evaluation of the identifi- cation signal must be performed. for a positive identifi- cation check, the msp 3410d sound channels have to be switched corresponding to the detected operation mode. pll_caps 021f hex minimum frequency 0111 1111 7f hex nominal frequency 0101 0110 56 hex reset maximum frequency 0000 0000 00 hex agc_gain 021e hex max. amplification (20 db) 0001 0100 14 hex min. amplification (3 db) 0000 0000 00 hex msp 34x0d preliminary data sheet 34 micronas table 6 ? 15: sequences to initialize and start the msp 34x0d load_seq_1/2: general initialization general programming mode demodulator short programming write into msp 34x0d: 1. ad_cv 2. fir1 3. fir2 4. mode_reg 5. dco1_lo 6. dco1_hi 7. dco2_lo 8. dco2_hi write into msp 34x0d: for example: addr: 0020 hex , data 0008 hex alternatively, for terrestrial reception, the autodetect feature can be applied. audio processing init initialization of audio baseband processing section, which may be customer-dependent (see section 7. on page 37). nicam_wait: automatic start of the nicam decoder if bit[6] of mode_reg is set to 1 1. wait at least 0.25 s nicam_check: read nicam specific information and check for presence, operation mode, and quality of nicam signal. read out of msp 3410d: 1. c_ad_bits 2. conc_ct or error_rate; if auto_fm is active, reading of conc_ct or error_rate can be omitted. evaluation of c_ad_bits and conc_ct or error_rate in the ccu (see section 6.6. on page 31). if necessary, switch the corresponding sound channels within the audio baseband processing section. fm_wait: automatic start of the fm identification process if bit[6] of mode_reg is set to 0. 1. ident reset 2. wait at least 0.5 s fm_ident_check: read fm specific information and check for presence, operation mode, and quality of dual- carrier fm. read out of msp 34x0d: 1. stereo detection register (dsp register 0018 hex , high part) evaluation of the stereo detection register (see section 7.6.1. on page 50). if necessary, switch the corresponding sound channels within the audio baseband processing section. load_seq_1: reinitialization of channel 1 without affecting channel 2 write into msp 34x0d: 1. fir1 (6 x 8 bit) 2. mode_reg (12 bit) 3. dco1_lo (12 bit) 4. dco1_hi write into msp 34x0d: for example: addr: 0020 hex , data: 0003 hex pau s e: duration of ? pause ? determines the repetition rate of the nicam or the fm_ident check. note: if downward-compatibility to the msp 34x0b is required, the msp 34x0d may be programmed according to the msp 34x0b data sheet. preliminary data sheet msp 34x0d micronas 35 6.8. software proposals for multistandard tv sets to familiarize the reader with the programming scheme of the msp 34x0d demodulator part, three examples in the shape of flow diagrams are shown in the following sections. 6.8.1. multistandard including system b/g with nicam/fm-mono only fig. 6 ? 1 shows a flow diagram for the ccu software, applied for the msp 3410d in a tv set, which facili- tates nicam and fm-mono sound. for the instruc- tions, please refer to table 6 ? 15. if the program is changed, resulting in another pro- gram within the scandinavian system b/g, no param- eters of the msp 3410d need be modified. to facilitate the check for nicam, the ccu has only to continue at the ? nicam_wait ? instruction. during the nicam identification process, the msp 3410d must be switched to the fm-mono sound. fig. 6 ? 1: ccu software flow diagram: standard b/g nicam/fm-mono only with demodulator short programming mode 6.8.2. multistandard including system i with nicam/fm-mono only this case is identical to the afore-mentioned. the only difference consists in selecting the uk tv sound stan- dard, which is coded with 000a hex of register 0020 hex . 6.8.3. multistandard including system b/g with nicam/fm-mono and german dual-fm fig. 6 ? 3 shows a flow diagram for the ccu software, applied for the msp 3410d in a tv set which supports all standards according to system b/g. for the instruc- tions used in the diagram, please refer to table 6 ? 15. after having switched on the tv set and having initial- ized the msp 3410d (load_seq_1/2), fm-mono sound is available. fig. 6 ? 3 shows that to check for any stereo or bilingual audio information, the tv sound standards 0008 hex (b/g-nicam) and 0003 hex must simply be set alter- nately. if successful, the msp 3410d must switch to the desired audio mode. 6.8.4. satellite mode fig. 6 ? 2 shows the simple flow diagram to be used for the msp 34x0d in a satellite receiver. for fm-mono operation, the corresponding fm carrier should prefer- ably be processed at the msp channel 2. fig. 6 ? 2: ccu software flow diagram: sat mode 6.8.5. automatic search function for fm carrier detection the am demodulation ability of the msp 34x0d offers the possibility to calculate the ? field strength ? of the momentarily selected fm carrier, which can be read out by the ccu. in sat receivers, this feature can be used to make automatic fm carrier search possible. therefore, the mspd has to be switched to am mode (mode_reg[8]), fm prescale must be set to 7f hex =+127 dec , and the fm dc notch must be switched off. the sound if frequency range must now be ? scanned ? in the mspd channel 2 by means of the programmable quadrature mixer with an appropriate incremental frequency (i.e. 10 khz). load_seq_1/2 set sound standard audio processing nicam_wait nicam_check pause start init 0008 hex msp-channel 1 fm2-parameter msp-channel 2 fm1-parameter audio processing start stop init msp 34x0d preliminary data sheet 36 micronas fig. 6 ? 3: ccu software flow diagram: standard b/g with nicam or fm-stereo with demodulator short programming after each incrementation, a field strength value is available at the quasi-peak detector output (quasi-peak detector source must be set to fm), which must be examined for relative maxima by the ccu. this results in either continuing search or switching the msp 34x0d back to fm demodulation mode. during the search process, the fir2 must be loaded with the coefficient set ? autosearch ? , which enables small bandwidth, resulting in appropriate field strength characteristics. the absolute field strength value (can be read out of ? quasi peak detector output fm1 ? ) also gives information on whether a main fm carrier or a subcarrier was detected, and as a practical consequence, the fm bandwidth (fir1/2) and the deemphasis (50 s or adaptive) can be switched auto- matically. due to the fact that a constant demodulation frequency offset of a few khz, leads to a dc level in the demodu- lated signal, further fine tuning of the found carrier can be achieved by evaluating the ? dc level readout fm1 ? . therefore, the fm dc notch must be switched on, and the demodulator part must be switched back to fm demodulation mode. for a detailed description of the automatic search function, please refer to the corresponding msp 34xxd windows software. note: the automatic search is still possible by evaluat- ing only the dc level readout fm1 (dc notch on) as it is described with the msp 34x0b, but the above mentioned method is faster. if this dc level method is applied with the msp 34x0d, it is recommended to set mode_reg[15] to 1 (am gain = 12 db) and to use the new autosearch fir2 coefficient set as given in ta b l e 6 ? 11. load_seq_1/2 nicam_wait load_seq_1 ident_check fm_ load_seq_1 nicam_check nicam ? pause pause audio processing init fm_wait start yes no stereo/biling. mono set sound standard 0008 hex set sound standard 0003 hex set sound standard 0008 hex preliminary data sheet msp 34x0d micronas 37 7. programming the dsp section (audio baseband processing) 7.1. dsp write registers: table and addresses table 7 ? 1: dsp write registers; subaddress: 12 hex ; if necessary, these registers are readable as well. dsp write register address high/ low adjustable range, operational modes reset mode volume loudspeaker channel 0000 hex h [+12 db ... ? 114 db, mute] mute volume / mode loudspeaker channel l 1/8 db steps, reduce volume / tone control 00 hex balance loudspeaker channel [l/r] 0001 hex h [0...100 / 100% and vv][ ? 127 .. 0 / 0 db and vv] 100% / 100% balance mode loudspeaker l [linear mode / logarithmic mode] linear mode bass loudspeaker channel 0002 hex h [+20 db ... ? 12 db] 0 db treble loudspeaker channel 0003 hex h [+15 db ... ? 12 db] 0 db loudness loudspeaker channel 0004 hex h [0 db ... +17 db] 0 db loudness filter characteristic l [normal, super_bass] normal spatial effect strength loudspeaker ch. 0005 hex h[ ? 100%...off...+100%] off spatial effect mode/customize l [sbe, sbe+pse] sbe+pse volume headphone channel 0006 hex h [+12 db ... ? 114 db, mute] mute volume / mode headphone channel l 1/8 db steps, reduce volume / tone control 00 hex volume / scart1 channel 0007 hex h[00 hex ... 7f hex ],[+12 db ... ? 114 db, mute] 00 hex volume / mode scart1 channel l [linear mode / logarithmic mode] linear mode loudspeaker channel source 0008 hex h [fm/am, nicam, scart, i 2 s1, i 2 s2] fm/am loudspeaker channel matrix l [sounda, soundb, stereo, mono...] sounda headphone channel source 0009 hex h [fm/am, nicam, scart, i 2 s1, i 2 s2] fm/am headphone channel matrix l [sounda, soundb, stereo, mono...] sounda scart1 channel source 000a hex h [fm/am, nicam, scart, i 2 s1, i 2 s2] fm/am scart1 channel matrix l [sounda, soundb, stereo, mono...] sounda i 2 s channel source 000b hex h [fm/am, nicam, scart, i 2 s1, i 2 s2] fm/am i 2 s channel matrix l [sounda, soundb, stereo, mono...] sounda quasi-peak detector source 000c hex h [fm/am, nicam, scart, i 2 s1, i 2 s2] fm/am quasi-peak detector matrix l [sounda, soundb, stereo, mono...] sounda prescale scart 000d hex h[00 hex ... 7f hex ]00 hex prescale fm/am 000e hex h[00 hex ... 7f hex ]00 hex fm matrix l [no_mat, gstereo, kstereo] no_mat deemphasis fm 000f hex h[50 s, 75 s, j17, off] 50 s adaptive deemphasis fm l [off, wp1] off prescale nicam 0010 hex h[00 hex ... 7f hex ]00 hex msp 34x0d preliminary data sheet 38 micronas prescale i 2 s2 0012 hex h[00 hex ... 7f hex ]10 hex acb register (scart switching facilities and digital control output pins) 0013 hex h/l bits [15...0] 00 hex beeper 0014 hex h/l [00 hex ... 7f hex ]/[00 hex ... 7f hex ]0/0 identification mode 0015 hex l [b/g, m] b/g prescale i 2 s1 0016 hex h[00 hex ... 7f hex ]10 hex fm dc notch 0017 hex l [on, off] on mode tone control 0020 hex h [bass/treble, equalizer] bass/treb equalizer loudspeaker ch. band 1 0021 hex h [+12 db ... ? 12 db] 0 db equalizer loudspeaker ch. band 2 0022 hex h [+12 db ... ? 12 db] 0 db equalizer loudspeaker ch. band 3 0023 hex h [+12 db ... ? 12 db] 0 db equalizer loudspeaker ch. band 4 0024 hex h [+12 db ... ? 12 db] 0 db equalizer loudspeaker ch. band 5 0025 hex h [+12 db ... ? 12 db] 0 db automatic volume correction 0029 hex h [off, on, decay time] off volume subwoofer channel 002c hex h [0 db ... ? 30 db, mute] 0 db subwoofer channel corner frequency 002d hex h [50 hz ... 400 hz] 00 hex subwoofer: complementary high-pass l [off, on] off balance headphone channel [l/r] 0030 hex h [0...100 / 100% and vv][ ? 127...0 / 0 db and vv] 100% /100% balance mode headphone l [linear mode / logarithmic mode] linear mode bass headphone channel 0031 hex h [+20 db ... ? 12 db] 0 db treble headphone channel 0032 hex h [+15 db ... ? 12 db] 0 db loudness headphone channel 0033 hex h [0 db ... +17 db] 0 db loudness filter characteristic l [normal, super_bass] normal volume scart2 channel 0040 hex h[00 hex ... 7f hex ],[+12 db ... ? 114 db, mute] 00 hex volume / mode scart2 channel l [linear mode / logarithmic mode] linear mode scart2 channel source 0041 hex h [fm, nicam, scart, i 2 s1, i 2 s2] fm scart2 channel matrix l [sounda, soundb, stereo, mono...] sounda table 7 ? 1: dsp write registers; subaddress: 12 hex ; if necessary, these registers are readable as well., continued dsp write register address high/ low adjustable range, operational modes reset mode preliminary data sheet msp 34x0d micronas 39 7.2. dsp read registers: table and addresses table 7 ? 2: dsp read registers; subaddress: 13 hex ; these registers are not writable. dsp read register address high/low output range stereo detection register 0018 hex h[80 hex ... 7f hex ] 8 bit two ? s complement quasi-peak readout left 0019 hex h&l [0000 hex ... 7fff hex ] 16 bit two ? s complement quasi-peak readout right 001a hex h&l [0000 hex ... 7fff hex ] 16 bit two ? s complement dc level readout fm1/ch2-l 001b hex h&l [8000 hex ... 7fff hex ] 16 bit two ? s complement dc level readout fm2/ch1-r 001c hex h&l [8000 hex ... 7fff hex ] 16 bit two ? s complement msp hardware version code 001e hex h[00 hex ... ff hex ] msp major revision code l [00 hex ... ff hex ] msp product code 001f hex h[00 hex ... 0a hex ] msp rom version code l [00 hex ... ff hex ] msp 34x0d preliminary data sheet 40 micronas 7.3. dsp write registers: functions and values write registers are 16 bit wide, whereby the msb is denoted bit [15]. transmissions via i 2 c bus have to take place in 16-bit words. some of the defined 16-bit words are divided into low [7...0] and high [15...8] byte, or in an other manner, thus holding two different con- trol entities. all write registers are readable. unused parts of the 16-bit registers must be zero. addresses not given in this table must not be written at any time! 7.3.1. volume ? loudspeaker and headphone channel the highest given positive 12-bit number (7f0hex) yields in a maximum possible gain of 12 db. decreas- ing the volume register by 2 lsbs decreases the vol- ume by 0.125 db. volume settings lower than the given minimum mute the output. with large scale input signals, positive volume settings may lead to signal clipping. the mspd loudspeaker and headphone volume func- tion is divided up into a digital and an analog section. with fast mute, volume is reduced to mute position by digital volume only. analog volume is not changed. this reduces any audible dc plops. going back from fast mute should be done to the volume step which was in existence before fast mute was activated. the fast mute facility is activated by the i2c com- mand. after 75 ms (typically), the signal is completely ramped down. if the clipping mode is set to ? reduce volume ? , the fol- lowing clipping procedure is used: to prevent severe clipping effects with bass, treble, or equalizer boosts, the internal volume is automatically limited to a level where, in combination with either bass, treble, or equalizer setting, the amplification does not exceed 12 db. if the clipping mode is ? reduce tone control ? , the bass or treble value is reduced if amplification exceeds 12 db. if the equalizer is switched on, the gain of those bands is reduced, where amplification together with volume exceeds 12 db. if the clipping mode is ? compromise mode ? , the bass or treble value and volume are reduced half and half if amplification exceeds 12 db. if the equalizer is switched on, the gain of those bands is reduced half and half, where amplification together with volume exceeds 12 db. volume loudspeaker 0000 hex [15...4] volume headphone 0006 hex [15...4] +12 db 0111 1111 0000 1) 7f0 hex +11.875 db 0111 1110 1110 7ee hex +0.125 db 0111 0011 0010 732 hex 0 db 0111 0011 0000 730 hex ? 0.125 db 0111 0010 1110 72e hex ? 113.875 db 0000 0001 0010 012 hex ? 114 db 0000 0001 0000 010 hex mute 0000 0000 0000 000 hex reset fast mute 1111 1111 1110 ffe hex 1) bit[4] must always be set to 0 clipping mode loudspeaker 0000 hex [3..0] clipping mode headphone 0006 hex [3..0] reduce volume 0000 0 hex reset reduce tone control 0001 1 hex compromise mode 0010 2 hex example: vol.: +6 db bass: +9 db treble: +5 db red. volume 3 9 5 red. tone con. 6 6 5 compromise 4.5 7.5 5 preliminary data sheet msp 34x0d micronas 41 7.3.2. balance ? loudspeaker and headphone channel positive balance settings reduce the left channel with- out affecting the right channel; negative settings reduce the right channel leaving the left channel unaf- fected. in linear mode, a step by 1 lsb decreases or increases the balance by about 0.8 % (exact figure: 100/127). in logarithmic mode, a step by 1 lsb decreases or increases the balance by 1 db. 7.3.3. bass ? loudspeaker and headphone channel balance mode loudspeaker 0001 hex [3..0] balance mode headphone 0030 hex [3..0] linear 0000 0 hex reset logarithmic 0001 1 hex linear mode balance loudspeaker channel [l/r] 0001 hex h balance headphone channel [l/r] 0030 hex h left muted, right 100 % 0111 1111 7f hex left 0.8 %, right 100 % 0111 1110 7e hex left 99.2 %, right 100 % 0000 0001 01 hex left 100 %, right 100 % 0000 0000 00 hex reset left 100 %, right 99.2 % 1111 1111 ff hex left 100 %, right 0.8 % 1000 0010 82 hex left 100 %, right muted 1000 0001 81 hex logarithmic mode balance loudspeaker channel [l/r] 0001 hex h balance headphone channel [l/r] 0030 hex h left ? 127 db, right 0 db 0111 1111 7f hex left ? 126 db, right 0 db 0111 1110 7e hex left ? 1 db, right 0 db 0000 0001 01 hex left 0 db, right 0 db 0000 0000 00 hex reset left 0 db, right ? 1 db 1111 1111 ff hex left 0 db, right ? 127 db 1000 0001 81 hex left 0 db, right ? 128 db 1000 0000 80 hex bass loudspeaker 0002 hex h bass headphone 0031 hex h +20 db 0111 1111 7f hex +18 db 0111 1000 78 hex +16 db 0111 0000 70 hex +14 db 0110 1000 68 hex +12 db 0110 0000 60 hex +11 db 0101 1000 58 hex +1 db 0000 1000 08 hex +1/8 db 0000 0001 01 hex 0 db 0000 0000 00 hex reset ? 1/8 db 1111 1111 ff hex ? 1 db 1111 1000 f8 hex ? 11 db 1010 1000 a8 hex ? 12 db 1010 0000 a0 hex msp 34x0d preliminary data sheet 42 micronas with positive bass settings, internal overflow may occur even with overall volume less than 0 db. this will lead to a clipped output signal. therefore, it is not recommended to set bass to a value that, in conjunc- tion with volume, would result in an overall positive gain. loudspeaker channel: bass and equalizer cannot work simultaneously (see section 7.3.22.: mode tone control). if equalizer is used, bass and treble coeffi- cients must be set to zero and vice versa. 7.3.4. treble ? loudspeaker and headphone channel with positive treble settings, internal overflow may occur even with overall volume less than 0 db. this will lead to a clipped output signal. therefore, it is not recommended to set treble to a value that, in conjunc- tion with volume, would result in an overall positive gain. loudspeaker channel: treble and equalizer cannot work simultaneously (see section 7.3.22.: mode tone control). if equalizer is used, bass and treble coeffi- cients must be set to zero and vice versa. 7.3.5. loudness ? loudspeaker and headphone channel loudness increases the volume of low and high fre- quency signals, while keeping the amplitude of the 1 khz reference frequency constant. the intended loudness has to be set according to the actual volume setting. because loudness introduces gain, it is not recommended to set loudness to a value that, in con- junction with volume, would result in an overall positive gain. by means of ? mode loudness ? , the corner frequency for bass amplification can be set to two different val- ues. in super bass mode, the corner frequency is shifted up. the point of constant volume is shifted from 1 khz to 2 khz. treble loudspeaker 0003 hex h treble headphone 0032 hex h +15 db 0111 1000 78 hex +14 db 0111 0000 70 hex +1 db 0000 1000 08 hex +1/8 db 0000 0001 01 hex 0 db 0000 0000 00 hex reset ? 1/8 db 1111 1111 ff hex ? 1 db 1111 1000 f8 hex ? 11 db 1010 1000 a8 hex ? 12 db 1010 0000 a0 hex loudness loudspeaker 0004 hex h loudness headphone 0033 hex h +17 db 0100 0100 44 hex +16 db 0100 0000 40 hex +1 db 0000 0100 04 hex 0 db 0000 0000 00 hex reset mode loudness loudspeaker 0004 hex l mode loudness headphone 0033 hex l normal (constant volume at 1 khz) 0000 0000 00 hex reset super bass (constant volume at 2 khz) 0000 0100 04 hex preliminary data sheet msp 34x0d micronas 43 7.3.6. spatial effects ? loudspeaker channel there are several spatial effect modes available: mode a (low byte = 00 hex ) is compatible to the formerly used spatial effect. here, the kind of spatial effect depends on the source mode. if the incoming signal is in mono mode, pseudo stereo effect is active; for ste- reo signals, pseudo stereo effect and stereo base- width enlargement is active. the strength of the effect is controllable by the upper byte. a negative value reduces the stereo image. a rather strong spatial effect is recommended for small tv sets where loudspeaker spacing is rather close. for large screen tv sets, a more moderate spatial effect is recommended. in mode a, even in case of stereo input signals, pseudo stereo effect is active, which reduces the center image. in mode b, only stereo basewidth enlargement is effective. for mono input signals, the pseudo stereo effect has to be switched on. it is worth mentioning, that all spatial effects affect amplitude and phase response. with the lower 4 bits, the frequency response can be customized. a value of 0000 bin yields a flat response for center signals (l = r) but a high pass function of l or r only signals. a value of 0110 bin has a flat response for l or r only signals but a low-pass function for center signals. by using 1000 bin , the frequency response is automatically adapted to the sound material by choosing an optimal high-pass gain. spatial effect strength loudspeaker 0005 hex h enlargement 100% 0111 1111 7f hex enlargement 50% 0011 1111 3f hex enlargement 1.5% 0000 0001 01 hex effect off 0000 0000 00 hex reset reduction 1.5% 1111 1111 ff hex reduction 50% 1100 0000 c0 hex reduction 100% 1000 0000 80 hex spatial effect mode loudspeaker 0005 hex [7...4] stereo basewidth enlargement (sbe) and pseudo stereo effect (pse). ( mode a ) 0000 0 hex reset stereo basewidth enlargement (sbe) only. ( mode b ) 0010 2 hex spatial effect customize coefficient loudspeaker 0005 hex [3...0] max. high-pass gain 0000 0 hex reset 2/3 high-pass gain 0010 2 hex 1/3 high-pass gain 0100 4 hex min. high-pass gain 0110 6 hex automatic 1000 8 hex msp 34x0d preliminary data sheet 44 micronas 7.3.7. volume ? scart1 and scart2 channel 7.3.8. channel source modes volume mode scart1 0007 hex [3...0] volume mode scart2 0040 hex [3...0] linear 0000 0 hex reset logarithmic 0001 1 hex linear mode volume scart1 0007 hex h volume scart2 0040 hex h off 0000 0000 00 hex reset 0db gain (digital full scale (fs) to 2v rms output) 0100 0000 40 hex +6 db gain ( ? 6dbfs to 2v rms output) 0111 1111 7f hex logarithmic mode volume scart1 0007 hex [15...4] volume scart2 0040 hex [15...4] +12 db 0111 1111 0000 7f0 hex +11.875 db 0111 1110 1110 7ee hex +0.125 db 0111 0011 0010 732 hex 0 db 0111 0011 0000 730 hex ? 0.125 db 0111 0010 1110 72e hex ? 113.875 db 0000 0001 0010 012 hex ? 114 db 0000 0001 0000 010 hex mute 0000 0000 0000 000 hex reset loudspeaker source 0008 hex h headphone source 0009 hex h scart1 source 000a hex h scart2 source 0041 hex h i 2 s source 000b hex h quasi-peak detector source 000c hex h fm/am 0000 0000 00 hex reset nicam 0000 0001 01 hex none (mspb/c: sbus12) 0000 0011 03 hex none (mspb/c: sbus34) 0000 0100 04 hex scart 0000 0010 02 hex i 2 s1 0000 0101 05 hex i 2 s2 0000 0110 06 hex preliminary data sheet msp 34x0d micronas 45 7.3.9. channel matrix modes the sum/difference mode can be used together with the quasi-peak detector to determine the sound mate- rial mode. if the difference signal on channel b (right) is near to zero, and the sum signal on channel a (left) is high, the incoming audio signal is mono. if there is a significant level on the difference signal, the incoming audio is stereo. 7.3.10. scart prescale loudspeaker matrix 0008 hex l headphone matrix 0009 hex l scart1 matrix 000a hex l scart2 matrix 0041 hex l i 2 s matrix 000b hex l quasi-peak detector matrix 000c hex l sounda / left / msp-if-channel2 0000 0000 00 hex reset soundb / right / msp-if-channel1 0001 0000 10 hex stereo 0010 0000 20 hex mono 0011 0000 30 hex sum / diff 0100 0000 40 hex ab_xchange 0101 0000 50 hex phase_change_b 0110 0000 60 hex phase_change_a 0111 0000 70 hex a_only 1000 0000 80 hex b_only 1001 0000 90 hex volume prescale scart 000d hex h off 0000 0000 00 hex reset 0 db gain (2 v rms input to digital full scale) 0001 1001 19 hex +14 db gain (400 mv rms input to digital full scale) 0111 1111 7f hex msp 34x0d preliminary data sheet 46 micronas 7.3.11. fm/am prescale for the high deviation mode , the fm prescaling val- ues can be used in the range from 14 hex to 30 hex . please consider the internal reduction of 6 db for this mode. the fir-bandwidth should be selected to 500 khz. 1) given deviations will result in internal digital full- scale signals. appropriate clipping headroom has to be set by the customer. this can be done by decreasing the listed values by a specific factor. 2) in the mentioned sif-level range, the am-output level remains stable and independent of the actual sif-level. in this case, only the am degree of audio signals above 40 hz determines the am-output level. 7.3.12. fm matrix modes (see also table 4 ? 1) no_matrix is used for terrestrial mono or satellite stereo sound. gstereo dematrixes [(l+r)/2, r] to [l, r] and is used for german dual carrier stereo sys- tem (standard b/g). kstereo dematrixes [(l+r)/2, (l ? r)/2] to [l, r] and is used for the korean dual car- rier stereo system (standard m). 7.3.13. fm fixed deemphasis 7.3.14. fm adaptive deemphasis volume prescale fm (normal fm mode) 000e hex h off 0000 0000 00 hex reset maximum volume (28 khz deviation 1) recommended fir- bandwidth: 130 khz) 0111 1111 7f hex deviation 50 khz 1) recommended fir- bandwidth: 200 khz 0100 1000 48 hex deviation 75 khz 1) recommended fir- bandwidth: 200 or 280 khz 0011 0000 30 hex deviation 150 khz 1) recommended fir- bandwidth: 380 khz 0001 1000 18 hex maximum deviation 192 khz 1) recommended fir- bandwidth: 380 khz 0001 0011 13 hex prescale for adaptive deemphasis wp1 recommended fir- bandwidth: 130 khz 0001 0000 10 hex volume prescale fm (high deviation mode) 000e hex h off 0000 0000 00 hex reset deviation 150 khz 1) recommended fir- bandwidth: 380 khz 0011 0000 30 hex maximum deviation 384 khz 1) recommended fir- bandwidth: 500 khz 0001 0100 14 hex volume prescale am 000e hex h off 0000 0000 00 hex reset sif input level: 0.1 v pp ? 0.8 v pp 1) 2) 0.8 v pp ? 1.4 v pp 1) 0111 1100 7c hex <7c hex note: for am, the bit mode_reg[15] must be 1 fm matrix 000e hex l no matrix 0000 0000 00 hex reset gstereo 0000 0001 01 hex kstereo 0000 0010 02 hex deemphasis fm 000f hex h 50 s 0000 0000 00 hex reset 75 s 0000 0001 01 hex j17 0000 0100 04 hex off 0011 1111 3f hex fm adaptive deemphasis wp1 000f hex l off 0000 0000 00 hex reset wp1 0011 1111 3f hex preliminary data sheet msp 34x0d micronas 47 7.3.15. nicam prescale 7.3.16. nicam deemphasis a j17 deemphasis is always applied to the nicam signal. it is not switchable. 7.3.17. i 2 s1 and i 2 s2 prescale 7.3.18. acb register definition of digital control output pins definition of scart switching facilities (see fig. 4 ? 3 on page 13) note: if ? mono_in ? is selected at the dsp_in selec- tion, the channel matrix mode of the corresponding output channel(s) must be set to ? sound a ? . volume prescale nicam 0010 hex h off 0000 0000 00 hex reset 0 db gain 0010 0000 20 hex +12 db gain 0111 1111 7f hex prescale i 2 s1 0016 hex h prescale i 2 s2 0012 hex h off 0000 0000 00 hex 0 db gain 0001 0000 10 hex reset +18 db gain 0111 1111 7f hex acb register 0013 hex [15..14] d_ctr_out0 low (reset) high x0 x1 d_ctr_out1 low (reset) high 0x 1x acb register 0013 hex [13...0] dsp in selection of source: * sc1_in_l/r mono_in sc2_in_l/r sc3_in_l/r sc4_in_l/r mute xx xx00 xx00 0000 xx xx01 xx00 0000 xx xx10 xx00 0000 xx xx11 xx00 0000 xx xx00 xx10 0000 xx xx11 xx10 0000 sc1_out_l/r selection of source: * sc3_in_l/r sc2_in_l/r mono_in scart1_l/r via d/a scart2_l/r via d/a sc1_in_l/r sc4_in_l/r mute xx 00xx x0x0 0000 xx 01xx x0x0 0000 xx 10xx x0x0 0000 xx 11xx x0x0 0000 xx 00xx x1x0 0000 xx 01xx x1x0 0000 xx 10xx x1x0 0000 xx 11xx x1x0 0000 sc2_out_l/r selection of source: * scart1_l/r via d/a sc1_in_l/r mono_in scart2_l/r via d/a sc2_in_l/r sc3_in_l/r sc4_in_l/r mute 00 xxxx 0xx0 0000 01 xxxx 0xx0 0000 10 xxxx 0xx0 0000 00 xxxx 1xx0 0000 01 xxxx 1xx0 0000 10 xxxx 1xx0 0000 11 xxxx 1xx0 0000 11 xxxx 0xx0 0000 * = reset position, which becomes active at the time of the first write transmission on the control bus to the audio processing part (dsp). by writing to the acb register first, the reset state can be rede- fined. msp 34x0d preliminary data sheet 48 micronas 7.3.19. beeper a square wave beeper can be added to the loud- speaker channel and the headphone channel. the addition point is just before loudness and volume adjustment. 7.3.20. identification mode to shorten the response time of the identification algo- rithm after a program change between two fm-stereo capable programs, the reset of the ident-filter can be applied. sequence: 1. program change 2. reset ident-filter 3. set identification mode back to standard b/g or m 4. read stereo detection register 7.3.21. fm dc notch the dc compensation filter (fm dc notch) for fm input can be switched off. this is used to speed up the automatic search function (see section 6.8.5. on page 35). in normal fm mode, the fm dc notch should be switched on. 7.3.22. mode tone control by means of ? mode tone control ? , bass/treble or equalizer may be activated. 7.3.23. automatic volume correction (avc) different sound sources (e.g. terrestrial channels, sat channels, or scart) fairly often do not have the same volume level. advertisement during movies, as well, usually has a different (higher) volume level than the movie itself. the automatic volume correction (avc) solves this problem and equalizes the volume levels. beeper volume 0014 hex h off 0000 0000 00 hex reset maximum volume (full digital scale fds) 0111 1111 7f hex beeper frequency 0014 hex l 16 hz (lowest) 0000 0001 01 hex 1 khz 0100 0000 40 hex 4 khz (highest) 1111 1111 ff hex identification mode 0015 hex l standard b/g (german stereo) 0000 0000 00 hex reset standard m (korean stereo) 0000 0001 01 hex reset of ident-filter 0011 1111 3f hex fm dc notch 0017 hex l on 0000 0000 00 hex reset off 0011 1111 3f hex mode tone control 0020 hex h bass and treble 0000 0000 00 hex reset equalizer 1111 1111 ff hex avc on/off 0029 hex [15...12] avc off and reset of int. variables 0000 0 hex reset avc on 1000 8 hex avc decay time 0029 hex [11...8] 8 sec. (long) 4 sec. (middle) 2 sec. (short) 20 ms (very short) 1000 8 hex 0100 4 hex 0010 2 hex 0001 1 hex preliminary data sheet msp 34x0d micronas 49 the absolute value of the incoming signal is fed into a filter with 16 ms attack time and selectable decay time. the decay time must be adjusted as shown in the table above. this attack/decay filter block works simi- lar to a peak hold function. the volume correction value with its quasi continuous step width is calculated using the attack/decay filter output. the automatic volume correction functions with an internal reference level of ? 18 dbr. this means that input signals with a volume level of ? 18 dbr will not be affected by the avc. if the input signals vary in a range of ? 24 db to 0 db, the avc maintains a fixed output level of ? 18 dbr. fig. 7 ? 1 shows the avc output level versus its input level. for prescale and volume registers set to 0 db, a level of 0 dbr corresponds to full scale input / output. this is ? scart in-, output 0 dbr = 2.0 v rms ? loudspeaker and aux output 0 dbr = 1.4 v rms fig. 7 ? 1: simplified avc characteristics to reset the internal variables, the avc should be switched off and on during any channel or source change. for standard applications, the recommended decay time is 4 sec. note: avc should not be used in any dolby pro logic mode, except panorama, where no other than the loudspeaker output is active. 7.3.24. subwoofer channel the subwoofer channel is created by combining the left and right channels directly behind the tone control filter block. a third order low-pass filter with programmable corner frequency and volume adjustment according to the main channel output is performed to the bass sig- nal. additionally, at the loudspeaker channels, a com- plementary high-pass filter can be switched on. ? 30 ? 24 ? 18 ? 12 ? 6 + 6 input level ? 18 ? 24 ? 12 output level 0 [dbr] [dbr] subwoofer channel volume adjust 002c hex h 0 db 0000 0000 00 hex reset ? 1 db 1111 1111 ff hex ? 29 db 1110 0011 e3 hex ? 30 db 1110 0010 e2 hex mute 1000 0000 80 hex subwoofer channel corner frequency 002d hex h 50 hz ... 400 hz e.g. 50 hz = 5 dec 400 hz = 40 dec reset 00 hex 0000 0101 05 hex 0010 1000 28 hex subwoofer: comple- mentary high-pass 002d hex l hp off 0000 0000 00 hex reset hp on 0000 0001 01 hex msp 34x0d preliminary data sheet 50 micronas 7.3.25. equalizer loudspeaker channel with positive equalizer settings, internal overflow may occur even with overall volume less than 0 db. this will lead to a clipped output signal. therefore, it is not recommended to set equalizer bands to a value that, in conjunction with volume, would result in an overall positive gain. equalizer must not be used simultaneously with bass and treble (mode tone control must be set to ff to use the equalizer). if bass and treble are used, equal- izer coefficients must be set to zero. 7.4. exclusions for the audio baseband features in general, all functions can be switched independently of the others. exceptions: 1. nicam cannot be processed simultaneously with the fm2 channel. 2. fm adaptive deemphasis wpi cannot be processed simultaneously with the fm-identification. 7.5. phase relationship of analog outputs the analog output signals: loudspeaker, headphone, and scart2 all have the same phases. the user does not need to change output phases when using these analog outputs directly. the scart1 output has opposite phase. using the i 2 s-outputs for other dsps or d/a convert- ers, care must be taken to adjust for the correct phase. if the attached coprocessor is one of the msp family, the following schematics help to determine the phase relationship. fig. 7 ? 2: phase diagram of the msp 34x0d 7.6. dsp read registers: functions and values all readable registers are 16-bit wide. transmissions via i 2 c bus have to take place in 16-bit words. single data entries are 8 bit. some of the defined 16-bit words are divided into low and high byte, thus holding two dif- ferent control entities. these registers are not writable. 7.6.1. stereo detection register band 1 (below 120 hz) 0021 hex h band 2 (center: 500 hz) 0022 hex h band 3 (center: 1.5 khz) 0023 hex h band 4 (center: 5 khz) 0024 hex h band 5 (above 10 khz) 0025 hex h +12 db 0110 0000 60 hex +11 db 0101 1000 58 hex +1 db 0000 1000 08 hex +1/8 db 0000 0001 01 hex 0 db 0000 0000 00 hex reset ? 1/8 db 1111 1111 ff hex ? 1 db 1111 1000 f8 hex ? 11db 1010 1000 a8 hex ? 12 db 1010 0000 a0 hex stereo detection register 0018 hex h stereo mode reading (two ? s complement) mono near zero stereo positive value (ideal reception: 7f hex ) bilingual negative value (ideal reception: 80 hex) audio baseband processing scart1 mono scart1 ? 3 i2s_in i2s_out scart2 loudspeaker headphone scart1 ? 2 preliminary data sheet msp 34x0d micronas 51 7.6.2. quasi-peak detector the quasi peak readout register can be used to read out the quasi peak level of any input source, in order to adjust all inputs to the same normal listening level. the refresh rate is 32 khz. the feature is based on the fil- ter time constants: attack time: 1.3 ms decay time: 37 ms 7.6.3. dc level register the dc level register measures the dc component of the incoming fm signals (fm1 and fm2). this can be used for seek functions in satellite receivers and for if fm frequencies fine tuning. a too low demodulation frequency (dco) results in a positive dc-level and vice-versa. for further processing, the dc content of the demodulated fm signals is suppressed. the time constant , defining the transition time of the dc level register, is approximately 28 ms. 7.6.4. msp hardware version code a change in the hardware version code defines hard- ware optimizations that may have influence on the chip ? s behavior. the readout of this register is identical to the hardware version code in the chip ? s imprint. 7.6.5. msp major revision code the msp 34x0d is the fourth generation of ics in the msp family. 7.6.6. msp product code by means of the msp product code, the control pro- cessor is able to decide whether or not nicam-control- ling should be accomplished. 7.6.7. msp rom version code a change in the rom version code defines internal software optimizations, that may have influence on the chip ? s behavior, e.g. new features may have been included. while a software change is intended to cre- ate no compatibility problems, customers that would like to use the new functions, can identify new msp 34x0d versions according to this number. to avoid compatibility problems with msp 34x0b, an off- set of 20 hex is added to the rom version code of the chip ? s imprint. quasi-peak readout left 0019 hex h+l quasi-peak readout right 001a hex h+l quasi peak readout [0000 hex ... 7fff hex ] values are 16 bit two ? s complement dc level readout fm1 (msp-ch2) 001b hex h+l dc level readout fm2 (msp-ch1) 001c hex h+l dc level [8000 hex ... 7fff hex ] values are 16 bit two ? s complement hardware version 001e hex h hardware version [00 hex ... ff hex ] msp 34x0d ? b 402 hex major revision 001e hex l msp 34x0d 04 hex product 001f hex h msp 34 00 d 0000 0000 00 hex msp 34 10 d 0000 1010 0a hex rom version 001f hex l major software revision [00 hex ... ff hex ] msp 34x0d ? b 4 0010 0100 24 hex msp 34x0d preliminary data sheet 52 micronas 8. differences between msp 3400c, msp 3400d, msp 3410b, and msp 3410d feature msp 3400c msp 3400d ? b4 msp 3410b ? f7 msp 3410d ? b4 hardware nicam no no yes yes s-bus output no no s_da_out no s-bus input s_da_in no s_da_in no second i 2 s data input i2s_da_in2 i2s_da_in2 no i2s_da_in2 adr interface adr_cl, adr_ws, adr_da adr_cl, adr_ws, adr_da no adr_cl, adr_ws, adr_da second scart d/a converter no yes no yes demodulator demodulator short programming no yes no yes autodetection for terr. tv sound standards no yes no yes automatic switching from nicam to fm and vv. no yes no yes adcv[10] carrier mute level carrier mute level not used fifo watchdog on/off not used adcv[11] carrier mute level carrier mute level not used not used not used mode_reg[1]: tri-state digital outputs 0: active 1: tri-state 0: active 1: tri-state enable pay-tv 0: active 1: tri-state mode_reg[2]: tri-state digital outputs i 2 s outputs 0: active 1: tri-state 0: active 1: tri-state disable nicam descrambler 0: active 1: tri-state mode_reg[6]: nicam no function no function 0: fm 1: nicam 0: fm 1: nicam mode_reg[7]: fm1fm2 no function no function 0: nicam 1: fm no function mode_reg[10]: s-bus setting no function no function nicam/fm on s-bus no function mode_reg[11]: s-bus mode no function no function mode of internal s-bus no function mode_reg[12]: 6 db gain in msp-ch1 0: on 1: off 0: on 1: off always on 0: on 1: off mode_reg[13]: fir filter coeff. set for msp-ch1 0: use fir1 1: use fir2 0: use fir1 1: use fir2 always fir1 0: use fir1 1: use fir2 mode_reg[14] mode of adr interface 0: normal mode 1: adr/sara 0: normal mode 1: adr/sara no 0: normal mode 1: adr/sara preliminary data sheet msp 34x0d micronas 53 demodulator mode_reg[15]: gain for am-demodulation 0: 0 db 1) 1: 12 db 0: 0 db 1: 12 db no 0: 0 db 1: 12 db fawct_soll (demod w addr. 107 hex ) not necessary not necessary yes not necessary fawct_er_tol (demod w addr. 10f hex ) not necessary not necessary yes not necessary audio_pll (demod w addr. 2d7 hex ) not necessary not necessary yes not necessary load_reg_1/2 (demod w addr. 56 hex ) not necessary not necessary yes not necessary load_reg_1 (demod w addr. 60 hex ) not necessary not necessary yes not necessary search_nicam (demod w addr. 78 hex ) no not necessary yes not necessary self_test (demod w addr. 792 hex ) no not compatible, not for customer use, values as described in mubi-software not compatible, not for customer use, fawct_ist (demod r addr. 25 hex )nonoyesyes, but not necessary conc_ct (demod r addr. 58 hex ) no no yes yes, but not recommended error_rate (demod r addr. 57 hex )nononoyes reading out rms value of agc i 2 c addr. 001e hex i 2 c addr. 021e hex not possible i 2 c addr. 021e hex reading out internal pll capacitance switches i 2 c addr. 001f hex i 2 c addr. 021f hex not possible i 2 c addr. 021f hex audio baseband processing improved oversampling filters for all d/a converters ye s ye s n o ye s mode loudness loudspeaker channel (dsp w addr. 0004 hex l) 00 hex : normal 04 hex : super bass 00 hex :normal 04 hex : super bass 00 hex : normal 04 hex : super version f7 00 hex :normal 04 hex : super bass spatial effect loudspeaker (dsp w addr. 05 hex l) mode/ customize mode/ customize always 0 mode/ customize prescale i 2 s2 (dsp w addr. 0012 hex h) yes 1) ye s n o ye s prescale i 2 s1 (dsp w addr. 0016 hex h) yes 1) ye s n o ye s fm dc notch switchable (dsp w addr. 0017 hex ) ye s ye s n o ye s mode tone control loudspeaker channel (dsp w addr. 0020 hex h) 00 hex :bass/ tr e bl e ff hex :equalizer 00 hex :bass/ tr e bl e ff hex :equalizer always bass/ tr e bl e 00 hex :bass/ tr e bl e ff hex :equalizer 5 band equalizer (dsp w addr. 0021 hex ? 0025 hex ) [+12 ... ? 12 db] [+12 ... ? 12 db] not implemented [+12 ... ? 12 db] balance headphone channel (dsp w addr. 0030 hex h) ye s 1) ye s n o ye s 1) this feature will be implemented in msp 3400c from version c7 on. feature msp 3400c msp 3400d ? b4 msp 3410b ? f7 msp 3410d ? b4 msp 34x0d preliminary data sheet 54 micronas audio baseband processing bass for loudspeaker and headphone chan. (dsp w addr. 0002/0031 hex h) ye s 1) [+20 ... ? 12 db] ye s [+20 ... ? 12 db] no yes [+20 ... ? 12 db] treble for loudspeaker and headphone chan. (dsp w addr. 0003/0032 hex h) ye s 1) [+15 ... ? 12 db] ye s [+15 ... ? 12 db] no yes [+15 ... ? 12 db] loudness headphone channel (dsp w addr. 0033 hex h) ye s 1) ye s n o ye s mode loudness headphone channel (dsp w addr. 0033 hex l) 00 hex :normal 04 hex : super bass 1) 00 hex :normal 04 hex : super bass no 00 hex :normal 04 hex : super bass scart1/2 volume in db (dsp w addr. 0007/0040 hex h) ye s 1) (scart1) ye s n o ye s scart 2 volume (dsp w addr. 0040 hex h) no yes no yes scart 2 source (dsp w addr. 0041 hex h) no yes no yes scart 2 matrix (dsp w addr. 0041 hex l) no yes no yes full scart i/o matrix without restrictions no yes no yes balance of loudspeaker and headphone channels in db units (dsp w addr. 0016/0012 hex ) ye s 1) ye s n o ye s subwoofer output no yes no yes automatic volume correction (avc) no yes no yes 1) this feature will be implemented in msp 3400c from version c7 on. feature msp 3400c msp 3400d ? b4 msp 3410b ? f7 msp 3410d ? b4 preliminary data sheet msp 34x0d micronas 55 9. specifications 9.1. outline dimensions fig. 9 ? 1: 68-pin plastic leaded chip carrier package (plcc68) weight approximately 4.8 g dimensions in mm fig. 9 ? 2: 64-pin plastic shrink dual inline package (psdip64) weight approximately 9.0 g dimensions in mm fig. 9 ? 3: 52-pin plastic shrink dual inline package (psdip52) weight approximately 5.5 g dimensions in mm x 45 1.1 25.125 0.125 0.22 0.07 1.2 x 45 16 x 1.27 = 20.32 0.1 0.1 24.22 0.1 2 43 27 26 10 9 61 9 44 60 1 0.48 0.711 1.9 4.05 0.1 4.75 0.15 1.27 0.1 2 15 9 1.27 0.1 16 x 1.27 = 20.32 0.1 0.1 24.22 0.1 0.9 23.4 spgs7004-3/5e 25.125 0.125 1.6 0.457 1.29 132 33 64 3 0.3 1.9 (1) 1.778 0.05 1 0.1 57.7 0.1 3.2 0.4 3.8 0.1 4.8 0.4 19.3 0.1 18 0.1 20.1 0.5 0.27 0.06 spgs0016-4/3 e 31 x 1.778 = 55.118 0.1 2.5 0.3 0.24 0.3 14 0.1 1.778 0.05 126 27 52 0.457 0 ...15 47 0.1 0.4 0.2 4 0.1 3.2 0.2 1 0.1 15.6 0.1 0.27 0.06 25 x 1.778 = 44.47 0.1 spgs0015-1/2e msp 34x0d preliminary data sheet 56 micronas fig. 9 ? 4: 80-pin plastic quad flat pack (pqfp80) weight approximately 1.61 g dimensions in mm fig. 9 ? 5: 64-pin plastic low-profile quad flat pack (plqfp64) weight approximately 0.35 g dimensions in mm 17.2 23.2 8 9.8 1.8 14 20 16 5 8 10.3 23 x 0.8 = 18.4 15 x 0.8 = 12.0 0.8 0.8 41 64 24 1 65 80 40 25 1.28 2.70 1.8 0.1 3 0.2 0.17 0.03 spgs0025-1/1e 1.75 1.75 49 64 116 17 32 33 48 12 12 d0025/2e 0.5 10 10 0.5 15 x 0.5 = 7.5 15 x 0.5 = 7.5 1.5 1.4 0.145 0.1 0.22 preliminary data sheet msp 34x0d micronas 57 9.2. pin connections and short descriptions nc = not connected ( leave vacant for future compatibility reasons) tp = test pin ( leave vacant; pin is used for production test only) lv = leave vacant x = obligatory; connect as described in application circuit diagram pin no. pin name type connection short description plcc 68-pin psdip 64-pin psdip 52-pin pqfp 80-pin plqfp 64-pin (if not used) 1 16 14 9 8 adr_ws out lv adr word strobe 2 ???? nc lv not connected 3 15 13 8 7 adr_da out lv adr data output 4 14127 6 i2s_da_in1 in lv i 2 s1 data input 5 13116 5 i2s_da_outout lv i 2 s data output 6 12105 4 i2s_ws in/outlv i 2 s word strobe 711943i2s_cl in/outlv i 2 s clock 810832i2c_da in/outx i 2 c data 99721i2c_cl in/outx i 2 c clock 10 8 ? 1 64 nc lv not connected 11 7 6 80 63 standbyq in x standby (low-active) 12657962adr_sel in x i 2 c bus address select 13 5 4 78 61 d_ctr_out0 out lv digital control output 0 14 4 3 77 60 d_ctr_out1 out lv digital control output 1 15 3 ? 76 59 nc lv not connected 16 2 ? 75 58 nc lv not connected 17 ???? nc lv not connected 18 1 2 74 57 aud_cl_out out lv audio clock output (18.432 mhz) 19 64 1 73 56 tp lv test pin 20 63 52 72 55 xtal_out out x crystal oscillator 21 62 51 71 54 xtal_in in x crystal oscillator 22 61 50 70 53 testen in x test pin 23 60 49 69 52 ana_in2+ in avss via 56 pf / lv if input 2 (can be left vacant only if if input1 is also not in use) 24 59 48 68 51 ana_in ? in avss via 56 pf / lv if common (can be left vacant only if if input1 is also not in use) 25 58 47 67 50 ana_in1+ in lv if input 1 msp 34x0d preliminary data sheet 58 micronas 26 57 46 66 49 avsup x analog power supply 5v ??? 65 ? avsup x analog power supply 5v ??? 64 ? nc lv not connected ??? 63 ? nc lv not connected 27 56 45 62 48 avss x analog ground ??? 61 ? avss x analog ground 28 55 44 60 47 mono_in in lv mono input ??? 59 ? nc lv not connected 29 54 43 58 46 vreftop x reference voltage if a/d converter 30 53 42 57 45 sc1_in_r in lv scart 1 input, right 31 52 41 56 44 sc1_in_l in lv scart 1 input, left 32 51 ? 55 43 asg1 ahvss analog shield ground 1 33 50 40 54 42 sc2_in_r in lv scart 2 input, right 34 49 39 53 41 sc2_in_l in lv scart 2 input, left 35 48 ? 52 40 asg2 ahvss analog shield ground 2 36 47 38 51 39 sc3_in_r in lv scart 3 input, right 37 46 37 50 38 sc3_in_l in lv scart 3 input, left 38 45 ? 49 37 asg4 ahvss analog shield ground 4 39 44 ? 48 36 sc4_in_r in lv scart 4 input, right 40 43 ? 47 35 sc4_in_l in lv scart 4 input, left 41 ?? 46 ? nc lv or ahvss not connected 42 42 36 45 34 agndc x analog reference voltage 43 41 35 44 33 ahvss x analog ground ??? 43 ? ahvss x analog ground ??? 42 ? nc lv not connected ??? 41 ? nc lv not connected 44 40 34 40 32 capl_m x volume capacitor main 45 39 33 39 31 ahvsup x analog power supply 8v 46 38 32 38 30 capl_a x volume capacitor aux 47 37 31 37 29 sc1_out_l out lv scart 1 output, left pin no. pin name type connection short description plcc 68-pin psdip 64-pin psdip 52-pin pqfp 80-pin plqfp 64-pin (if not used) preliminary data sheet msp 34x0d micronas 59 48 36 30 36 28 sc1_out_r out lv scart 1 output, right 49 35 29 35 27 vref1 x reference ground 1 high voltage part 50 34 28 34 26 sc2_out_l out lv scart 2 output, left 51 33 27 33 25 sc2_out_r out lv scart 2 output, right 52 ?? 32 ? nc lv 1) not connected 53 32 ? 31 24 nc lv not connected 54 31 26 30 23 dacm_sub lv subwoofer output 55 30 ? 29 22 nc lv not connected 56 29 25 28 21 dacm_l out lv loudspeaker out, left 57 28 24 27 20 dacm_r out lv loudspeaker out, right 58 27 23 26 19 vref2 x reference ground 2 59 26 22 25 18 daca_l out lv headphone out, left 60 25 21 24 17 daca_r out lv headphone out, right ??? 23 ? nc lv not connected ??? 22 ? nc lv not connected 61 24 20 21 16 resetq in x power-on reset 62 23 ? 20 15 nc lv not connected 63 22 ? 19 14 nc lv not connected 64 21 19 18 13 nc lv not connected 65 20 18 17 12 i2s_da_in2 in lv i 2 s2 data input 66 19 17 16 11 dvss x digital ground ??? 15 ? dvss x digital ground ??? 14 ? dvss x digital ground 67 18 16 13 10 dvsup x digital power supply 5v ??? 12 ? dvsup x digital power supply 5v ??? 11 ? dvsup x digital power supply 5v 68 17 15 10 9 adr_cl out lv adr clock 1) due to compatibility with msp 3410d-b4 and older versions, it is possible to connect with ground as well. pin no. pin name type connection short description plcc 68-pin psdip 64-pin psdip 52-pin pqfp 80-pin plqfp 64-pin (if not used) msp 34x0d preliminary data sheet 60 micronas 9.3. pin configurations fig. 9 ? 6: 68-pin plcc package 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 9876543216867666564636261 26 44 msp 34x0d nc standbyq adr_sel d_ctr_out0 d_ctr_out1 nc nc nc aud_cl_out tp xtal_out xtal_in testen ana_in2+ ana_in ? ana_in1+ daca_r daca_l vref2 dacm_r dacm_l nc dacm_sub nc nc sc2_out_r sc2_out_l vref1 sc1_out_r sc1_out_l capl_a ahvsup i2c_da i2s_cl i2s_ws i2s_da_out i2s_da_in1 adr_da nc adr_ws i2c_cl adr_cl dvsup dvss i2s_da_in2 nc nc nc resetq mono_in vreftop sc1_in_r sc1_in_l asg1 sc2_in_r sc2_in_l avss sc3_in_r sc3_in_l asg4 sc4_in_r sc4_in_l nc agndc ahvss asg2 avsup capl_m preliminary data sheet msp 34x0d micronas 61 fig. 9 ? 7: 64-pin psdip package fig. 9 ? 8: 52-pin psdip package 1 aud_cl_out 2 nc 3 nc 4 d_ctr_out1 5 d_ctr_out0 6 adr_sel 7 standbyq 8 nc 9 i2c_cl 10 i2c_da 11 i2s_cl 12 i2s_ws 13 i2s_da_out 14 i2s_da_in1 15 adr_da 16 adr_ws tp 64 xtal_out 63 xtal_in 62 testen 61 ana_in2+ 60 ana_in ? 59 ana_in+ 58 avsup 57 avss 56 mono_in 55 vreftop 54 sc1_in_r 53 sc1_in_l 52 asg1 51 sc2_in_r 50 sc2_in_l 49 17 adr_cl 18 dvsup 19 dvss 20 i2s_da_in2 21 nc 22 nc 23 nc 24 resetq 25 daca_r 26 daca_l asg2 48 sc3_in_r 47 sc3_in_l 46 asg4 45 sc4_in_r 44 sc4_in_l 43 agndc 42 ahvss 41 capl_m 40 ahvsup 39 msp 34x0d vref2 dacm_r dacm_l nc dacm_sub nc 38 37 36 35 34 33 27 28 29 30 31 32 capl_a sc1_out_l sc1_out_r vref1 sc2_out_l sc2_out_r 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 tp aud_cl_out d_ctr_out1 d_ctr_out0 adr_sel standbyq i2c_cl i2c_da i2s_cl i2s_ws i2s_da_out i2s_da_in1 adr_da adr_ws adr_cl dvsup xtal_out xtal_in testen ana_in2+ ana_in ? ana_in1+ avsup avss mono_in vreftop sc1_in_r sc1_in_l sc2_in_r sc2_in_l sc3_in_r sc3_in_l dvss i2s_da_in2 nc resetq daca_r daca_l vref2 dacm_r dacm_l dacm_sub agndc ahvss capl_m ahvsup capl_a sc1_out_l sc1_out_r vref1 sc2_out_l sc2_out_r msp 34x0d msp 34x0d preliminary data sheet 62 micronas fig. 9 ? 9: 80-pin pqfp package 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1 2 3 4 5 6 7 8 9 101112131415161718192021222324 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 avsup avsup ana_in1+ ana_in ? ana_in2+ testen xtal_in xtal_out tp aud_cl_out nc nc d_ctr_out1 d_ctr_out0 adr_sel standbyq capl_m ahvsup capl_a sc1_out_l sc1_out_r vref1 sc2_out_l sc2_out_r asg3 nc dacm_sub nc dacm_l dacm_r vref2 daca_l nc avss avss mono_in nc vreftop sc1_in_r sc1_in_l asg1 nc sc2_in_r sc2_in_l asg2 sc3_in_r sc3_in_l asg4 sc4_in_r sc4_in_l nc agndc ahvss ahvss nc nc i2c_cl i2c_da i2s_cl i2s_ws i2s_da_out i2s_da_in1 adr_da adr_ws adr_cl nc dvsup dvsup dvsup dvss dvss dvss i2s_da_in2 nc nc nc resetq nc nc daca_r msp 34x0d preliminary data sheet msp 34x0d micronas 63 fig. 9 ? 10: 64-pin plqfp package avsup ana_in1+ ana_in- ana_in2+ testen xtal_in xtal_out tp aud_cl_out nc nc d_ctr_out1 d_ctr_out0 adr_sel standbyq nc capl_m ahvsup capl_a sc1_out_l sc1_out_r vref1 sc2_out_l sc2_out_r nc dacm_sub nc dacm_l dacm_r vref2 daca_l daca_r mono_in vreftop sc1_in_r sc1_in_l asg1 sc2_in_r sc2_in_l avss asg2 sc3_in_r sc3_in_l asg4 sc4_in_r sc4_in_l agndc ahvss i2c_da i2s_cl i2s_ws i2s_da_out i2s_da_in1 adr_da adr_ws i2c_cl adr_cl dvsup dvss i2s_da_in2 nc nc nc resetq msp 34x0d 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 12345678910111213141516 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 msp 34x0d preliminary data sheet 64 micronas 9.4. pin circuits (pin numbers refer to plcc68 package) fig. 9 ? 11: output pins 1, 3, 5, 13, 14, and 68 (adr_ws, adr_cl, adr_da, i2s_da_out, d_ctr_out0/1) fig. 9 ? 12: input/output pins 8 and 9 (i2c_da, i2c_cl) fig. 9 ? 13: input pins 4, 11, 12, 61, 62, and 65 (standbyq, adr_sel, resetq, testen, i2s_da_in1, i2s_da_in2) fig. 9 ? 14: input/output pins 6 and 7 (i2s_ws, i2s_cl) fig. 9 ? 15: output/input pins 18, 20, and 21 (aud_cl_out, xtalin/out) fig. 9 ? 16: input pins 23-25, and 29 (ana_in2+, ana_in-, ana_in1+, vreftop) fig. 9 ? 17: capacitor pins 44 and 46 (capl_m, capl_a) fig. 9 ? 18: input pin 28 (mono_in) dvsup p n gnd n gnd dvsup p n gnd 3 ? 30 pf 2.5 v 500 k 3 ? 30 pf p n d a anain1+ vreftop anain ? anain2+ 0...2 v 3.75 v 24 k preliminary data sheet msp 34x0d micronas 65 fig. 9 ? 19: input pins 30, 31, 33, 34, 36, 37, 40, and 41 (sc1-4_in_l/r) fig. 9 ? 20: output pins 56, 57, 59, 60, and 54 (daca_l/r, dacm_l/r, dacm_sub) fig. 9 ? 21: pin 42 (agndc) fig. 9 ? 22: output pins 47, 48, 50, and 51 (sc_1/2_out_l/r) 3.75 v 40 k ahvsup 0...1.2 ma 3.3 k 3.75 v 125 k 26 pf 120 k 300 3.75 v msp 34x0d preliminary data sheet 66 micronas 9.5. electrical characteristics 9.5.1. absolute maximum ratings stresses beyond those listed in the ? absolute maximum ratings ? may cause permanent damage to the device. this is a stress rating only. functional operation of the device at these or any other conditions beyond those indicated in the ? recommended operating conditions/characteristics ? of this specification is not implied. exposure to absolute maximum ratings conditions for extended periods may affect device reliability. symbol parameter pin name min. max. unit t a ambient operating temperature ? 070 1) c t s storage temperature ?? 40 125 c v sup1 first supply voltage ahvsup ? 0.3 9.0 v v sup2 second supply voltage dvsup ? 0.3 6.0 v v sup3 third supply voltage avsup ? 0.3 6.0 v dv sup23 voltage between avsup and dvsup avsup, dvsup ? 0.5 0.5 v p tot package power dissipation plcc68 without heat spreader psdip64 without heat spreader psdip52 without heat spreader pqfp80 without heat spreader plqfp64 without heat spreader 1200 1300 1200 1000 960 1) mw v idig input voltage, all digital inputs ? 0.3 v sup2 +0.3 v i idig input current, all digital pins ?? 20 +20 ma 2) v iana input voltage, all analog inputs scn_in_s, 3) mono_in ? 0.3 v sup1 +0.3 v i iana input current, all analog inputs scn_in_s, 3) mono_in ? 5+5ma 2) i oana output current, all scart outputs scn_out_s 3) 4) , 5) 4) , 5) i oana output current, all analog outputs except scart outputs dacp_s 3) 4) 4) i cana output current, other pins connected to capacitors capl_p, 3) agndc 4) 4) 1) plqfp64: 65 c 2) positive value means current flowing into the circuit 3) ? n ? means ? 1 ? , ? 2 ? , ? 3 ? , or ? 4 ? , ? s ? means ? l ? or ? r ? , ? p ? means ? m ? or ? a ? 4) the analog outputs are short circuit proof with respect to first supply voltage and ground. 5) total chip power dissipation must not exceed absolute maximum rating. preliminary data sheet msp 34x0d micronas 67 9.5.2. recommended operating conditions (at t a = 0 to 70 c) symbol parameter pin name min. typ. max. unit v sup1 first supply voltage ahvsup 7.6 8.0 8.7 v v sup2 second supply voltage dvsup 4.75 5.0 5.25 v v sup3 third supply voltage avsup 4.75 5.0 5.25 v v rlh reset input low-to-high transition voltage resetq 0.7 0.8 dvsup v rhl reset input high-to-low transition voltage (see also fig. 5 ? 3 on page 20) 0.45 0.55 dvsup v digil digital input low voltage adr_sel 0.2 v sup2 v digih digital input high voltage 0.8 v sup2 v digil digital input low voltage standbyq 0.2 v sup2 v digih digital input high voltage msp 34x0d version a1 to b4 msp 34x0d version c5 and later 0.8 0.5 v sup2 v sup2 t stbyq1 standbyq setup time before turn-off of second supply voltage standbyq, dvsup 1 s i 2 c-bus recommendations v i2cil i 2 c-bus input low voltage i2c_cl, i2c_da 0.3 v sup2 v i2cih i 2 c-bus input high voltage 0.6 v sup2 t i2c5 i 2 c-data setup time before rising edge of clock 55 ns t i2c6 i 2 c-data hold time after falling edge of clock 55 ns t i2c1 i 2 c start condition setup time 120 ns t i2c2 i 2 c stop condition setup time 120 ns t i2c3 i 2 c-clock low pulse time i2c_cl 500 ns t i2c4 i 2 c-clock high pulse time 500 ns f i2c i 2 c-bus frequency 1.0 mhz msp 34x0d preliminary data sheet 68 micronas i 2 s-bus recommendations v i2sih i 2 s-data input high voltage msp 34x0d version a1 to b4 msp 34x0d version c5 and later i2s_da_in1/2 0.25 0.2 v sup2 v sup2 v i2sil i 2 s-data input low voltage msp 34x0d version a1 to b4 msp 34x0d version c5 and later 0.75 0.5 v sup2 v sup2 t i2s1 i 2 s-data input setup time before rising edge of clock i2s_da_in1/2, i2s_cl 20 ns t i2s2 i 2 s-data input hold time after falling edge of clock 0ns f i2scl i 2 s-clock input frequency when msp in i 2 s-slave-mode i2s_cl 1.024 mhz r i2scl i 2 s-clock input ratio when msp in i 2 s-slave-mode 0.9 1.1 f i2sws i 2 s-word strobe input frequency when msp in i 2 s-slave-mode i2s_ws 32.0 khz v i2sidl i 2 s-input low voltage when msp in i 2 s-slave mode msp 34x0d version a1 to b4 msp 34x0d version c5 and later i2s_cl, i2s_ws 0.25 0.2 v sup2 v sup2 v i2sidh i 2 s-input high voltage when msp in i 2 s-slave mode msp 34x0d version a1 to b4 msp 34x0d version c5 and later 0.75 0.5 v sup2 v sup2 t i2sws1 i 2 s-word strobe input setup time before rising edge of clock when msp in i 2 s-slave-mode 60 ns t i2sws2 i 2 s-word strobe input hold time after falling edge of clock when msp in i 2 s-slave-mode 0ns symbol parameter pin name min. typ. max. unit preliminary data sheet msp 34x0d micronas 69 general crystal recommendations f p crystal parallel resonance fre- quency at 12 pf load capacitance 18.432 mhz r r crystal series resistance 8 25 ? c 0 crystal shunt (parallel) capacitance 6.2 7.0 pf c l external load capacitance 1) xtal_in, xtal_out psdip 1.5 plcc 3.3 p(l)qfp 3.3 pf pf pf crystal recommendations for master-slave applications f tol accuracy of adjustment ? 20 +20 ppm d tem frequency variation versus temperature ? 20 +20 ppm c 1 motional (dynamic) capacitance 19 24 ff f cl required open loop clock frequency (t amb = 25 c) aud_cl_out 18.431 18.433 mhz crystal recommendations for fm / nicam applications (no master-slave mode possible) f tol accuracy of adjustment ? 30 +30 ppm d tem frequency variation vs. temp. ? 30 +30 ppm c 1 motional (dynamic) capacitance 15 ff f cl required open loop clock frequency (t amb = 25 c) aud_cl_out 18.4305 18.4335 mhz crystal recommendations for fm applications (no master-slave mode possible) f tol accuracy of adjustment ? 100 +100 ppm d tem frequency variation versus temperature ? 50 +50 ppm amplitude recommendation for operation with external clock input (c load after reset = 22 pf) v xca external clock amplitude xtal_in 0.7 v pp 1) external capacitors at each crystal pin to ground are required. they are necessary to tune the open-loop fre- quency of the internal pll and to stabilize the frequency in closed-loop operation. due to different layouts, the accurate capacitor size should be determined with the customer pcb . the sug- gested values (1.5...3.3 pf) are figures based on experience and should serve as ? start value ? . to define the capacitor size, reset the msp without transmitting any further i 2 c telegrams. measure the fre- quency at aud_cl_out-pin. change the capacitor size until the free running frequency matches 18.432 mhz as closely as possible.the higher the capacity, the lower the resulting clock frequency. symbol parameter pin name min. typ. max. unit msp 34x0d preliminary data sheet 70 micronas analog input and output recommendations c agndc agndc filter capacitor agndc ? 20% 3.3 f ceramic capacitor in parallel ? 20% 100 nf c insc dc-decoupling capacitor in front of scart inputs scn_in_s 1) ? 20% 330 +20% nf v insc scart input level 2.0 v rms v inmono input level, mono input mono_in 2.0 v rms r lsc scart load resistance scn_out_s 1) 10 k ? c lsc scart load capacitance 6.0 nf c vma main/aux volume capacitor capl_m, capl_a 10 f c fma main/aux filter capacitor dacm_s, daca_s 1) ? 10% 1 +10% nf recommendations for analog sound if input signal c vreftop vreftop filter capacitor vreftop ? 20% 10 f ceramic capacitor in parallel ? 20% 100 nf f if_fm analog input frequency range ana_in1+, ana_in2+, ana_in- 09mhz v if_fm analog input range fm/nicam 0.1 0.8 3 v pp v if_am analog input range am/nicam 0.1 0.45 0.8 v pp r fmni ratio: nicam carrier/fm carrier (unmodulated carriers) bg: i: ? 20 ? 23 ? 7 ? 10 0 0 db db r amni ratio: nicam carrier/am carrier (unmodulated carriers) ? 25 ? 11 0 db r fm ratio: fm-main/fm-sub satellite 7 db r fm1/fm2 ratio: fm1/fm2 german fm system 7db r fc ratio: main fm carrier/ color carrier 15 ?? db r fv ratio: main fm carrier/ luma components 15 ?? db pr if pass-band ripple ?? 2db sup hf suppression of spectrum above 9.0 mhz 15 ? db fm max maximum fm deviation (approx.) normal mode high deviation mode 192 360 khz 1) ? n ? means ? 1 ? , ? 2 ? or ? 3 ? , ? s ? means ? l ? or ? r ? symbol parameter pin name min. typ. max. unit preliminary data sheet msp 34x0d micronas 71 9.5.3. characteristics at t a = 0 to 70 c, f clock = 18.432 mhz, v sup1 = 7.6 to 8.7 v, v sup2 = 4.75 to 5.25 v for min./max. values at t a = 60 c, f clock = 18.432 mhz, v sup1 = 8 v, v sup2 = 5 v for typical values, t j = junction temperature main (m) = loudspeaker channel, aux (a) = headphone channel symbol parameter pin name min. typ. max. unit test conditions f clock clock input frequency xtal_in 18.432 mhz d clock clock high to low ratio 45 55 % t jitter clock jitter (verification not provided in production test) 50 ps v xtaldc dc-voltage oscillator 2.5 v t startup oscillator start-up time at v dd slew-rate of 1 v/1 s xtal_in, xtal_out 0.4 2 ms i sup1a first supply current (active) analog volume for main and aux at 0 db analog volume for main and aux at ? 30 db ahvsup 9.6 6.3 17.1 11.2 24.6 16.1 ma ma i sup1s first supply current (standby mode) at t j = 27 c 3.5 5.6 7.7 ma standbyq = low i sup2a second supply current (active) msp 34x0d version a1 to b4 msp 34x0d version c5 and later dvsup 86 50 95 70 110 85 ma ma i sup3a third supply current (active) msp 34x0d version a1 to b4 msp 34x0d version c5 and later avsup 15 20 25 35 35 45 ma ma v aclkac audio clock output ac voltage aud_cl_out 1.2 1.8 v pp load = 40 pf v aclkdc audio clock output dc voltage 0.4 0.6 v sup3 i max = 0.2 ma r outhf_acl hf output resistance 140 ? a acl open circuit gain aud_cl_out, xtal_out 0.5 digital control outputs v dctrol digital output low voltage d_ctr_out0, d_ctr_out1 0.4 v i dctr = 1 ma v dctroh digital output high voltage 4.0 v i dctr = ? 1 ma i 2 c-bus v i2col i 2 c-data output low voltage i2c_da 0.4 v i i2col = 3 ma i i2coh i 2 c-data output high current 1.0 av i2coh = 5 v t i2col1 i 2 c-data output hold time after falling edge of clock i2c_da, i2c_cl 15 ns t i2col2 i 2 c-data output setup time before rising edge of clock 100 ns f i2c = 1 mhz i 2 s-bus v i2sol i 2 s-output low voltage i2s_ws, i2s_cl, i2s_da_out 0.4 v i i2sol = 1 ma v i2soh i 2 s-output high voltage 4.0 v i i2soh = ? 1 ma f i2scl i 2 s-clock output frequency i2s_cl 1024 khz nicam-pll closed f i2sws i 2 s-word strobe output frequency i2s_ws 32.0 khz nicam-pll closed t i2s1/i2s2 i 2 s-clock high/low-ratio i2s_cl 0.9 1.0 1.1 msp 34x0d preliminary data sheet 72 micronas t i2s3 i 2 s-data setup time before rising edge of clock i2s_cl, i2s_da_out 200 ns c l = 30 pf t i2s4 i 2 s-data hold time after falling edge of clock 180 ns c l = 30 pf t i2s5 i 2 s-word strobe setup time before rising edge of clock i2s_cl, i2s_ws 200 ns c l = 30 pf t i2s6 i 2 s-word strobe hold time after falling edge of clock 180 ns c l = 30 pf analog ground v agndc0 agndc open circuit voltage msp 34x0d version a1 to b4 msp 34x0d version c5 and later agndc 3.63 3.67 3.73 3.77 3.83 3.87 v v r load 10 m ? r outagn agndc output resistance 70 125 180 k ? 3 v v agndc 4 v analog input resistance r insc scart input resistance from t a = 0 to 70 c scn_in_s 1) 25 40 58 k ? f signal = 1 khz, i = 0.05 ma r inmono mono input resistance from t a = 0 to 70 c mono_in 152435k ? f signal = 1 khz, i = 0.1 ma audio analog-to-digital-converter v aicl effective analog input clipping level for analog-to-digital- conversion scn_in_s, 1) mono_in 2.00 2.25 v rms f signal = 1 khz scart outputs r outsc scart output resistance at t j = 27 c from t a = 0 to 70 c scn_out_s 1) 200 200 330 460 500 ? ? f signal = 1 khz, i = 0.1 ma dv outsc deviation of dc-level at scart output from agndc voltage ? 70 +70 mv a sctosc gain from analog input to scart output scn_in_s 1) mono_in scn_out_s 1) ? 1.0 +0.5 db f signal = 1 khz f rsctosc frequency response from analog input to scart output bandwidth: 0 to 20000 hz ? 0.5 +0.5 db with respect to 1 khz v outsc effective signal level at scart-output during full-scale digital input signal from dsp scn_out_s 1) 1.8 1.9 2.0 v rms f signal = 1 khz 1) ? n ? means ? 1 ? , ? 2 ? , ? 3 ? , or ? 4 ? ; ? s ? means ? l ? or ? r ? symbol parameter pin name min. typ. max. unit test conditions preliminary data sheet msp 34x0d micronas 73 main and aux outputs r outma main/aux output resistance at t j = 27 c from t a = 0 to 70 c dacp_s 1 ) 2.1 2.1 3.3 4.6 5.0 k ? k ? f signal = 1 khz, i = 0.1 ma v outdcma dc-level at main/aux-output for analog volume at 0 db for analog volume at ? 30 db 1.80 2.04 61 2.28 v mv v outma effective signal level at main/ aux-output during full-scale digital input signal from dsp for analog volume at 0 db 1.23 1.37 1.51 v rms f signal = 1 khz analog performance snr signal-to-noise ratio from analog input to dsp mono_in, scn_in_s 1) 85 88 db input level = ? 20 db with resp. to v aicl , f sig = 1 khz, equally weighted 20 hz...16 khz 2) from analog input to scart output mono_in, scn_in_s 1) scn_out_s 1) 93 96 db input level = ? 20 db, f sig = 1 khz, equally weighted 20 hz...20 khz from dsp to scart output scn_out_s 1) 85 88 db input level = ? 20 db, f sig = 1 khz, equally weighted 20 hz...15 khz 3) from dsp to main/aux-output for analog volume at 0 db for analog volume at ? 30 db dacp_s 1) 85 78 88 83 db db input level = ? 20 db, f sig = 1 khz, equally weighted 20 hz...15 khz 3) thd total harmonic distortion from analog input to dsp mono_in, scn_in_s 1) 0.01 0.03 % input level = ? 3 dbr with resp. to v aicl , f sig = 1 khz, equally weighted 20 hz...16 khz 2) from analog input to scart output mono_in, scn_in_s scn_out_s 1) 0.01 0.03 % input level = ? 3dbr, f sig = 1 khz, equally weighted 20 hz...20 khz from dsp to scart output scn_out_s 1) 0.01 0.03 % input level = ? 3dbr, f sig = 1 khz, equally weighted 20 hz...16 khz 3) from dsp to main or aux output daca_s, dacm_s 1) 0.01 0.03 % input level = ? 3dbr, f sig = 1 khz, equally weighted 20 hz...16 khz 3) 1) ? n ? means ? 1 ? , ? 2 ? , ? 3 ? , or ? 4 ? ; ? s ? means ? l ? or ? r ? ; ? p ? means ? m ? or ? a ? 2) dsp measured at i 2 s-output 3) dsp input at i 2 s-input symbol parameter pin name min. typ. max. unit test conditions msp 34x0d preliminary data sheet 74 micronas xtalk crosstalk attenuation ? plcc68 ? psdip64 input level = ? 3db, f sig = 1 khz, unused ana- log inputs connected to ground by z < 1 k ? between left and right channel within scart input/output pair (l r, r l) scn_in scn_out 1) plcc68 psdip64 sc1_in or sc2_in dsp plcc68 psdip64 sc3_in dsp plcc68 psdip64 dsp scn_out 1) plcc68 psdip64 80 80 80 80 80 80 80 80 db db db db db db db db equally weighted 20 hz...20 khz 2) 3) between left and right channel within main or aux output pair dsp dacp 1) plcc68 psdip64 80 75 db db equally weighted 20 hz...16 khz 3) between scart input/output pairs 1) d = disturbing program o = observed program d: mono/scn_in scn_out plcc68 o: mono/scn_in scn_out 1) psdip64 d: mono/scn_in scn_out or unsel. plcc68 o: mono/scn_in dsp 1) psdip64 d: mono/scn_in scn_out plcc68 o: dsp scn_out 1) psdip64 d: mono/scn_in unselected plcc68 o: dsp sc1_out psdip64 100 100 100 95 100 100 100 100 db db db db db db db db (equally weighted 20 hz...20 khz same signal source on left and right disturbing chan- nel, effect on each observed output channel 2) 3) 3) crosstalk between main and aux output pairs dsp dacp 1) plcc68 psdip64 95 90 db db (equally weighted 20 hz...16 khz) 3) same signal source on left and right disturbing chan- nel, effect on each observed output channel xtalk crosstalk from main or aux output to scart output and vice-versa d = disturbing program o = observed program d: mono/scn_in/dsp scn_out plcc68 o: dsp dacp 1) psdip64 d: mono/scn_in/dsp scn_out plcc68 o: dsp dacp 1) psdip64 d: dsp dacp plcc68 o: mono/scn_in scn_out 1) psdip64 d: dsp dacm plcc68 o: dsp scn_out 1) psdip64 85 80 90 85 100 95 100 95 db db db db db db db db (equally weighted 20 hz...20 khz) same signal source on left and right disturbing chan- nel, effect on each observed output channel scart output load resis- tance 10 k ? scart output load resis- tance 30 k ? 3) 1) ? n ? means ? 1 ? , ? 2 ? , ? 3 ? , or ? 4 ? ; ? p ? means ? m ? or ? a ? 2) dsp measured at i 2 s-output 3) dsp input at i 2 s-input symbol parameter pin name min. typ. max. unit test conditions preliminary data sheet msp 34x0d micronas 75 psrr: rejection of noise on ahvsup at 1 khz agndc agndc 80 db from analog input to dsp mono_in, scn_in_s 1) 70 db from analog input to scart output mono_in, scn_in_s 1) , scn_out_s 1) 70 db from dsp to scart output scn_out_s 1) 60 db from dsp to main/aux output dacp_s 1) 80 db s/n fm fm input to main/aux/scart output dacp_s 1) , scn_out_s 1) 73 db 1 fm-carrier 5.5 mhz, 50 s, 1 khz, 40 khz devi- ation; rms, unweighted 0 to 15 khz (for s/n); full input range, fm-prescale = 46 h , vol = 0 db output level 1 v rms at dacp_s 1) ; spm = 3 thd fm total harmonic distortion + noise of fm demodulated signal on main/ aux/scart output dacp_s 1) , scn_out_s 1) 0.1 % s/n nicam signal to noise ratio of nicam baseband signal on main/aux/ scart outputs dacp_s 1) , scn_out_s 1) 72 db nicam: ? 6db, 1khz, rms unweighted 0 to 15 khz, vol = 9 db nic_presc = 7f h output level 1 v rms at dacp_s 1) ; spm = 8 thd nicam total harmonic distortion + noise of nicam baseband signal on main/aux/scart output dacp_s 1) , scn_out_s 1) 0.1 % 2.12 khz, modulator input level = 0 dbref spm = 8 ber ni nicam: bit error rate ? 110 ? 7 fm+nicam, norm conditions s/n am signal to noise ratio of am base- band signal on main/aux/scart outputs dacp_s 1) , scn_out_s 1) 48 db sif input range: 0.1 ? 0.8 v pp ; am = 70 %, 1 khz, rms unweighted (s/n); 0 to 15 khz, fm/am-prescale = 3c hex , vol = 0 db output level: 0.5 v rms at dacp_s 1) fm+nicam, norm condi- tions; spm = 9 thd am total harmonic distortion + noise of am demodulated signal on main/ aux/scart output dacp_s 1) , scn_out_s 1) 0.3 % 1) ? n ? means ? 1 ? , ? 2 ? , ? 3 ? , or ? 4 ? ; ? s ? means ? l ? or ? r ? ; ? p ? means ? loudspeaker (main) ?? or ?? headphone (aux) ?? spm: short programming mode symbol parameter pin name min. typ. max. unit test conditions msp 34x0d preliminary data sheet 76 micronas r ifin input impedance ana_in1+, ana_in2+, ana_in ? 1.5 6.8 2 9.1 2.5 11.4 k ? k ? gain agc = 20 db gain agc = 3 db dc vreftop dc voltage at vreftop msp 34x0d version a1 to b4 msp 34x0d version c5 and later vreftop 2.4 2.56 2.6 2.66 2.7 2.76 v v dc ana_in dc voltage on if inputs ana_in1+, ana_in2+, ana_in ? 1.3 1.5 1.7 v xtalk if crosstalk attenuation ana_in1+, ana_in2+, ana_in ? 40 db f signal = 1 mhz input level = ? 2dbr bw if 3 db bandwidth 10 mhz agc agc step width 0.85 db dv fmout tolerance of output voltage of fm demodulated signal dacp_s 1) , scn_out_s 1) ? 1.5 +1.5 db 1 fm-carrier, 50 s, 1 khz, 40 khz deviation; rms dv nicamout tolerance of output voltage of nicam baseband signal dacp_s 1) , scn_out_s 1) ? 1.5 +1.5 db 2.12 khz, modulator input level = 0 dbref fr fm fm frequency response on main/ aux/scart outputs, bandwidth 20 to 15000 hz dacp_s 1) , scn_out_s 1) ? 1.0 +1.0 db 1 fm-carrier 5.5 mhz, 50 s, modulator input level = ? 14.6 dbref; rms fr nicam nicam frequency response on main/aux/scart outputs, bandwidth 20 to 15000 hz dacp_s 1) , scn_out_s 1) ? 1.0 +1.0 db modulator input level = ? 12 db dbref; rms sep fm fm channel separation (stereo) dacp_s 1) , scn_out_s 1) 50 db 2 fm-carriers 5.5/5.74 mhz, 50 s, 1 khz, 40 khz deviation; rms sep nicam nicam channel separation (stereo) dacp_s 1) , scn_out_s 1) 80 db xtalk fm fm crosstalk attenuation (dual) dacp_s 1) , scn_out_s 1) 80 db 2 fm-carriers 5.5/5.74 mhz, 50 s, 1 khz, 40 khz deviation; rms xtalk nicam nicam crosstalk attenuation (dual) dacp_s 1) , scn_out_s 1) 80 db 1) ? n ? means ? 1 ? , ? 2 ? , ? 3 ? , or ? 4 ? ; ? s ? means ? l ? or ? r ? ; ? p ? means ? m ? or ? a ? symbol parameter pin name min. typ. max. unit test conditions preliminary data sheet msp 34x0d micronas 77 10. application circuit sc1_out_l (37) 47 sc1_out_r (36) 48 sc2_out_l (34) 50 sc2_out_r (33) 51 45 (39) ahvsup 43 (41) ahvss 26 (57) avsup 67 (18) dvsup 66 (19) dvss 61 (24) resetq 27 (56) avss 49 (35) vref1 58 (27) vref2 5 v 5 v 8.0 v avss 5 v 5 v capl_m (40) 44 capl_a (38) 46 vreftop (54) 29 agndc (42) 42 ana_in1+ (58) 25 ana_in2+ (60) 23 ana_in ? (59) 24 xtal_in (62) 21 xtal_out (63) 20 resetq (from ccu, see section. 5.3. ) msp 34x0d d_ctr_out0 (5) 13 d_ctr_out1 (4) 14 aud_cl_out (1) 18 testen (61) 22 + 100 ? 100 ? 100 ? 100 ? 22 f 22 f 22 f 22 f + + + daca_r (25) 60 1 nf 1 nf 1 nf 1 nf 1 nf daca_l (26) 59 dacm_sub (31) 54 dacm_r (28) 57 dacm_l (29) 56 1 f 1 f 1 f 1 f 1 f headphones loudspeaker tuner 1 tuner 2 if2 in signal gnd if1 in 56 pf 56 pf 56 pf + 3.3 f 100 nf 100 nf 10 f + - if ana_in2+ not used +8.0 v 18.432 mhz + + 10 f 10 f 28 (55) mono_in 31 (52) sc1_in_l 30 (53) sc1_in_r 32 (51) asg1 34 (49) sc2_in_l 33 (50) sc2_in_r 35 (48) asg2 37 (46) sc3_in_l 36 (47) sc3_in_r 38 (45) asg4 40 (43) sc4_in_l 39 (44) sc4_in_r 11 (7) standbyq 12 (6) adr_sel 8 (10) i2c_da 9 (9) i2c_cl 1 (16) adr_ws 68 (17) adr_cl 3 (15) adr_da 6 (12) i2s_ws 7 (11) i2s_cl 4 (14) i2s_da_in1 65 (20) i2s_da_in2 5 (13) i2s_da_out 100 nf 100 nf 100 nf alternative circuit for ana_in1/2+ for more attenuation of video 100 p 56 p 1 k ? ana_in1/2+ ahvss ahvss ahvss 330 nf 330 nf 330 nf 330 nf 330 nf 330 nf 330 nf 330 nf 330 nf dvss dvss avss components: c see section 9.5.2. * dvss ahvss msp 34x0d preliminary data sheet 78 micronas note: pin numbers refer to the plcc68 package; numbers in brackets refer to the psdip64 package. *application note: all ground pins should be connected to one low-resis- tive ground plane. all supply pins should be connected separately with short and low-resistive lines to the power supply. decoupling capacitors from dvsup to dvss, avsup to avss, and ahvsup to ahvss are recommended as closely as possible to these pins. decoupling of dvsup and dvss is most important. we recommend using more than one capacitor. by choosing different values, the frequency range of active decoupling can be extended. in our application boards we use: 220 pf, 470 pf, 1.5 nf, and 10 f. the capacitor with the low- est value should be placed nearest to the dvsup and dvss pins. the asg pins should be connected as closely as pos- sible to the msp to ground. if they are lead with the scart input lines as shielding line, they should not be connected to ground at the scart connector. preliminary data sheet msp 34x0d micronas 79 11. appendix a: msp 34x0d version history a1 first hardware release, which is completely compatible to msp 3410b. a2 hardware as a1 with additional features: ? automatic nicam-fm switching ? demodulator short programming ? automatic standard detection b3 hardware as a2 with additional features: ? automatic volume correction (avc) ? subwoofer output ? improved automatic standard detection ? extended short programming mode ? automatic reset and selection of identification for demodulator short programming b4 hardware and firmware as b3: ? carrier mute function not recommended in high- deviation mode c5 ? additional package plqfp64 ? digital input specification changed as of version c5 and later (see section 9.5. on page 66) ? max. analog high supply voltage ahvsup 8.7 v ? supply currents changed as of version c5 and later (see section 9.5.3. on page 71) ? pin asg3 no longer supported msp 34x0d preliminary data sheet 80 micronas all information and data contained in this data sheet are without any commitment, are not to be considered as an offer for conclusion of a contract, nor shall they be construed as to create any liability. any new issue of this data sheet invalidates previous issues. product availability and delivery are exclusively subject to our respective order confirmation form; the same applies to orders based on development samples deliv- ered. by this publication, micronas gmbh does not assume responsibil- ity for patent infringements or other rights of third parties which may result from its use. further, micronas gmbh reserves the right to revise this publication and to make changes to its content, at any time, without obligation to notify any person or entity of such revisions or changes. no part of this publication may be reproduced, photocopied, stored on a retrieval system, or transmitted without the express written consent of micronas gmbh. micronas gmbh hans-bunte-strasse 19 d-79108 freiburg (germany) p.o. box 840 d-79008 freiburg (germany) tel. +49-761-517-0 fax +49-761-517-2174 e-mail: docservice@micronas.com internet: www.micronas.com printed in germany order no. 6251-482-2pd 12. data sheet history 1. preliminary data sheet: ? msp 3400d, msp 3410d multistandard sound processors, nov. 30, 1998, 6251-482-1pd. first release of the preliminary data sheet. 2. preliminary data sheet: ? msp 3400d, msp 3410d multistandard sound processors, may 14, 1999, 6251-482-2pd. second release of the preliminary data sheet. major changes: ? specification for version c5 added (see appendix a: version history) ? section 9.: specification for plqfp64 package added micronas page 1 of 1 subject: data sheet concerned: supplement: edition: preliminary data sheet supplement msp 34xxd family compatibility differences: the msp-family (msp 3410d, msp 3400d, msp 3415d, msp 3405d, msp 3417d, msp 3407d) is currently avail- able in different technologies (0.8 , 0.5 , and 0.45 ). the specific differences of the various implementations are listed in the attached table. compatibility differences all msp 34xxd data sheets: 6251-482-2pd, 6251-475-2pd, 6251-486-2pd no. 3/ 6251-526-3pds oct. 11, 2000 msp 34xxd micronas compatibility differences between 0.5/0.45 and 0.8 mspd devices b4 a2 a1 0.8 0.5 0.45 0.8 0.5 0.45 0.8 0.5 0.45 67, 6b, 6g 8c and 94 g1, g4 h1, h3 6c, 6d 8d g2, g5 h2, h4 6e, 6f 8f g3, g6, h5 feature documented in datasheet reference general hardware power consumption datasheet 910 mw 640 mw 600 mw 910 mw 640 mw 600 mw 910 mw 640 mw 600 mw total electromagnetic radiation (emr) - - - v agndc0 typical datasheet 3.73 v 3.73 v 3.73 v dc vreftop typical datasheet 2.6 v 2.6 v 2.6 v maximum v sup1 datasheet 8.4 v 8.4 v 8.4 v digital input pin characteristics (i2s_in1/2, i2s_ws/cl, standbyq) datasheet - - - demodulator carrier mute - - - am-frequency response - - - automatic standard detection - - - baseband processing j17-deemphasis for fm -input channels datasheet supplement available available available i 2 s-bus datasheet not available frequency response of 50/75s deemphasis - - - dc_level (dsp-reg.: 1b hex /1c hex ) - - - technology mask iteration code msp 3407d, msp 3417d edit jan. 2000 2.66 v 2.66 v 3.77 v 3.77 v less due to less power consumption b3 b2 msp 3417d / msp 3407d msp-type version code msp 3415d / msp 3405d msp 3410d / msp 3400d more flat more flat more flat level increased by appr. 15% 1*) level increased by appr. 15% 1*) level increased by appr. 15% 1*) not available (75s instead of j17) not available (75s instead of j17) available available not available more flat faster, more stable and with mute- function faster, more stable and with mute- function faster, more stable and with mute- function modified specifications (see datasheet) slightly slower, but more stable: 64ms mute, 500 ms demute slightly slower, but more stable: 64ms mute, 500 ms demute slightly slower, but more stable: 64ms mute, 500 ms demute modified specifications (see datasheet) modified specifications (see datasheet) less due to less power consumption 8.7 v 8.7 v less due to less power consumption 3.77 v 2.66 v 8.7 v msp 3400d, msp 3410d edit. may 1999 c5 msp 3405d, msp 3415d edit oct. 1999 more flat more flat not available (75s instead of j17) date: 11.10.00 page 1 of 2 pages micronas b4 a2 a1 0.8 0.5 0.45 0.8 0.5 0.45 0.8 0.5 0.45 67, 6b, 6g 8c and 94 g1, g4 h1, h3 6c, 6d 8d g2, g5 h2, h4 6e, 6f 8f g3, g6, h5 feature documented in technology mask iteration code b3 b2 msp 3417d / msp 3407d msp-type version code msp 3415d / msp 3405d msp 3410d / msp 3400d c5 d/a-outputs s/n-ratio - - - pinning scart2_out pin datasheet connected dac-headphone pins datasheet connected audio_clock_out datasheet connected the following pins refer to pqfp80: pin 52 datasheet asg2 asg2 asg2 asg2 pin 32 datasheet asg3 asg3 pin 14 datasheet not connected dvss dvss not connected dvss dvss pin 16 datasheet dvss not connected not connected dvss not connected not connected *1) in spite of increased dc-level controller-algorithms for automatic sat-carrier detection should run properly not connected (s. datasheet p.59) improved msp 34x7d not available in 80-pqfp msp 34x7d not available in 80-pqfp not connected not connected connected not connected improved improved not connected (s. datasheet p.51) not connected connected connected not connected (s. datasheet p.51) not connected msp 34x7d not available in 80-pqfp msp 34x7d not available in 80-pqfp not connected (s. datasheet p.51) date: 11.10.00 page 2 of 2 pages |
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