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integrated circuit systems, inc. 83056agi-01 www.icst.com/products/hiperclocks.html rev. a february 7, 2005 1 ics83056i-01 6-b it , 2:1, s ingle -e nded m ultiplexer preliminary g eneral d escription the ics83056i-01 is a 6-bit, 2:1, single-ended mul- tiplexer and a member of the hiperclocks? fam- ily of high performance clock solutions from ics. the ics83056i-01 has two selectable single-ended clock inputs and six single-ended clock outputs. the output has a v ddo pin which may be set at 3.3v, 2.5v, or 1.8v, making the device ideal for use in voltage translation ap- plications. an output enable pin places the output in a high impedance state which may be useful for testing or debug. possible applications include systems with up to 6 trans- ceivers which need to be independently set for different rates. for example, a board may have six transceivers, each of which need to be independently configured for 1 gigabit ethernet or 1 gigabit fibre channel rates. another possible application may require the ports to be independently set for fec (forward er- ror correction) or non-fec rates. the device operates up to 250mhz and is packaged in a 20 tssop. hiperclocks? ics b lock d iagram p in a ssignment ics83056i-01 20-lead tssop 6.5mm x 4.4mm x 0.92mm package body g package top view f eatures 6-bit, 2:1 single-ended multiplexer nominal output impedance: 15 ? (v ddo =3 .3v) maximum output frequency: 250mhz propagation delay: 2.5ns (typical) input skew: 45ps (typical) part-to-part skew: tbd ? additive phase jitter, rms (12khz - 20mhz): 0.07ps (typical) operating supply modes: v dd /v ddo 3.3v/3.3v 3.3v/2.5v 3.3v/1.8v 2.5v/2.5v 2.5v/1.8v -40c to 85c ambient operating temperature sel0 clk0 clk1 sel5 oe q0 q5 0 1 0 1 sel5 q5 v ddo gnd q4 sel4 clk1 v dd q3 sel3 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 sel0 q0 v ddo gnd q1 sel1 clk0 oe q2 sel2 pulldown pulldown pulldown pulldown pullup the preliminary information presented herein represents a product in prototyping or pre-production. the noted characteristics a re based on initial product characterization. integrated circuit systems, incorporated (ics) reserves the right to change any circuitry or specific ations without notice.
integrated circuit systems, inc. 83056agi-01 www.icst.com/products/hiperclocks.html rev. a february 7, 2005 2 ics83056i-01 6-b it , 2:1, s ingle -e nded m ultiplexer preliminary t able 1. p in d escriptions t able 2. p in c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a m s t i n u c n i e c n a t i c a p a c t u p n i 4f p r p u l l u p r o t s i s e r p u l l u p t u p n i 1 5k ? r n w o d l l u p r o t s i s e r n w o d l l u p t u p n i 1 5k ? c d p e c n a t i c a p a c n o i t a p i s s i d r e w o p ) t u p t u o r e p ( 1 1f p r t u o e c n a d e p m i t u p t u o 5 1 ? r e b m u ne m a ne p y tn o i t p i r c s e d 6 , 1 1 1 , 0 1 0 2 , 5 1 , 4 l e s , 5 l e s , 2 l e s , 3 l e s 0 l e s , 1 l e s t u p n in w o d l l u p . e l b a t n o i t c n u f t u p n i l o r t n o c e e s . t u p n i t c e l e s k c o l c . s l e v e l e c a f r e t n i l t t v l / s o m c v l , 9 , 5 , 2 9 1 , 6 1 , 2 1 , 3 q , 4 q , 5 q 0 q , 1 q , 2 q t u p t u o . s l e v e l e c a f r e t n i l t t v l / s o m c v l . t u p t u o k c o l c d e d n e - e l g n i s 8 1 , 3v o d d r e w o p. n i p y l p p u s t u p t u o 7 1 , 4d n gr e w o p. d n u o r g y l p p u s r e w o p 4 1 , 70 k l c , 1 k l ct u p n in w o d l l u p. s l e v e l e c a f r e t n i l t t v l / s o m c v l . s t u p n i k c o l c d e d n e - e l g n i s 8v d d r e w o p. n i p y l p p u s e r o c 3 1e ot u p n ip u l l u p . e t a t s e c n a d e p m i h g i h n i e r a s t u p t u o , w o l n e h w . e l b a n e t u p t u o . s l e v e l e c a f r e t n i l t t v l / s o m c v l . e v i t c a e r a s t u p t u o , h g i h n e h w : e t o n p u l l u p d n a n w o d l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t r e f e r t able 3. c ontrol i nput f unction t able s t u p n i l o r t n o cs t u p t u o 5 l e s4 l e s3 l e s2 l e s1 l e s0 l e s5 q4 q3 q2 q1 q0 q 000000 0 k l c0 k l c0 k l c0 k l c0 k l c0 k l c 00000 1 0 k l c0 k l c0 k l c0 k l c0 k l c1 k l c 0000 10 0 k l c0 k l c0 k l c0 k l c1 k l c0 k l c 11110 1 1 k l c1 k l c1 k l c1 k l c0 k l c1 k l c 111110 1 k l c1 k l c1 k l c1 k l c1 k l c0 k l c 111111 1 k l c1 k l c1 k l c1 k l c1 k l c1 k l c
integrated circuit systems, inc. 83056agi-01 www.icst.com/products/hiperclocks.html rev. a february 7, 2005 3 ics83056i-01 6-b it , 2:1, s ingle -e nded m ultiplexer preliminary a bsolute m aximum r atings supply voltage, v dd 4.6v inputs, v i -0.5v to v dd + 0.5 v outputs, v o -0.5v to v ddo + 0.5v package thermal impedance, ja 73.2c/w (0 lfpm) storage temperature, t stg -65c to 150c note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional operation of product at these conditions or any conditions be- yond those listed in the dc characteristics or ac character- istics is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. t able 4a. p ower s upply dc c haracteristics , v dd = 3.3v5%, v ddo = 3.3v5%, or 2.5v5%, or 1.8v0.2v, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e r o c 5 3 1 . 33 . 35 6 4 . 3v v o d d e g a t l o v y l p p u s t u p t u o 5 3 1 . 33 . 35 6 4 . 3v 5 7 3 . 25 . 25 2 6 . 2v 6 . 18 . 10 . 2v i d d t n e r r u c y l p p u s r e w o p 2 3a m i o d d t n e r r u c y l p p u s t u p t u o 4a m t able 4b. p ower s upply dc c haracteristics , v dd = 2.5v5%, v ddo = 2.5v5%, or 1.8v0.2v, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e r o c 5 7 3 . 25 . 25 2 6 . 2v v o d d e g a t l o v y l p p u s t u p t u o 5 7 3 . 25 . 25 2 6 . 2v 6 . 18 . 10 . 2v i d d t n e r r u c y l p p u s r e w o p 0 3a m i o d d t n e r r u c y l p p u s t u p t u o 4a m
integrated circuit systems, inc. 83056agi-01 www.icst.com/products/hiperclocks.html rev. a february 7, 2005 4 ics83056i-01 6-b it , 2:1, s ingle -e nded m ultiplexer preliminary t able 4c. lvcmos/lvttl dc c haracteristics , t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n i 1 k l c , 0 k l c v d d % 5 v 3 . 3 =2v d d 3 . 0 +v v d d % 5 v 5 . 2 =7 . 1v d d 3 . 0 +v , e o 5 l e s : 0 l e s v d d % 5 v 3 . 3 =2v d d 3 . 0 +v v d d % 5 v 5 . 2 =7 . 1v d d 3 . 0 +v v l i e g a t l o v w o l t u p n i 1 k l c , 0 k l c v d d % 5 v 3 . 3 =3 . 0 -3 . 1v v d d % 5 v 5 . 2 =3 . 0 -7 . 0v , e o 5 l e s : 0 l e s v d d % 5 v 3 . 3 =3 . 0 -3 . 1v v d d % 5 v 5 . 2 =3 . 0 -7 . 0v i h i t n e r r u c h g i h t u p n i , 1 k l c , 0 k l c 5 l e s : 0 l e s v d d % 5 v 5 . 2 r o v 3 . 3 =0 5 1a e ov d d % 5 v 5 . 2 r o v 3 . 3 =5a i l i t n e r r u c w o l t u p n i , 1 k l c , 0 k l c 5 l e s : 0 l e s v d d % 5 v 5 . 2 r o v 3 . 3 =5 -a e ov d d % 5 v 5 . 2 r o v 3 . 3 =0 5 1 -a v h o h g i h t u p t u oe g a t l o v v o d d 1 e t o n ; % 5 v 3 . 3 =6 . 2v v o d d 1 e t o n ; % 5 v 5 . 2 =8 . 1v v o d d 1 e t o n ; v 2 . 0 v 8 . 1 =v d d 3 . 0 -v v l o e g a t l o v w o l t u p t u o v o d d 1 e t o n ; % 5 v 3 . 3 =5 . 0v v o d d 1 e t o n ; % 5 v 5 . 2 =5 4 . 0v v o d d 1 e t o n ; v 2 . 0 v 8 . 1 =5 3 . 0v 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n ? v o t o d d . s m a r g a i d " t i u c r i c t s e t d a o l " , n o i t c e s t n e m e r u s a e m r e t e m a r a p e e s . 2 / t able 5a. ac c haracteristics , v dd = v ddo = 3.3v 5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f x a m y c n e u q e r f t u p t u o 0 5 2z h m p t h l ; h g i h o t w o l , y a l e d n o i t a g a p o r p 1 e t o n 5 . 2s n p t l h ; w o l o t h g i h , y a l e d n o i t a g a p o r p 1 e t o n 5 6 . 2s n t ) i ( k s5 e t o n ; w e k s t u p n i 5 4s p t ) p p ( k s5 , 2 e t o n ; w e k s t r a p - o t - t r a p d b ts p t t i j ; s m r , r e t t i j e s a h p e v i t i d d a r e f f u b , n o i t c e s r e t t i j e s a h p e v i t i d d a o t r e f e r 4 e t o n : e g n a r n o i t a r g e t n i z h m 0 2 - z h k 2 1 7 0 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 25 3 5s p c d oe l c y c y t u d t u p t u o 0 5% t n e 3 e t o n ; e m i t e l b a n e t u p t u o 5s n t s i d 3 e t o n ; e m i t e l b a s i d t u p t u o 5s n x u m l o s i n o i t a l o s i x u mz h m 0 0 1 @5 4b d v m o r f d e r u s a e m : a 1 e t o n d d v o t t u p n i e h t f o 2 / o d d . t u p t u o e h t f o 2 / d n a s e g a t l o v y l p p u s e m a s e h t a g n i t a r e p o s e c i v e d t n e r e f f i d n o s t u p t u o n e e w t e b w e k s s a d e n i f e d : 2 e t o n v t a d e r u s a e m s i t u p t u o e h t , e c i v e d h c a e n o t u p n i f o e p y t e m a s e h t g n i s u . s n o i t i d n o c d a o l l a u q e h t i w o d d . 2 / . n o i t c u d o r p n i d e t s e t t o n . n o i t a z i r e t c a r a h c y b d e e t n a r a u g e r a s r e t e m a r a p e s e h t : 3 e t o n . k c o l c t u p n i e n o y l n o g n i v i r d : 4 e t o n . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 5 e t o n
integrated circuit systems, inc. 83056agi-01 www.icst.com/products/hiperclocks.html rev. a february 7, 2005 5 ics83056i-01 6-b it , 2:1, s ingle -e nded m ultiplexer preliminary t able 5b. ac c haracteristics , v dd = 3.3v 5%, v ddo = 2.5v 5%, t a = -40c to 85c t able 5c. ac c haracteristics , v dd = 3.3v 5%, v ddo = 1.8v 0.2v, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f x a m y c n e u q e r f t u p t u o 0 5 2z h m p t h l ; h g i h o t w o l , y a l e d n o i t a g a p o r p 1 e t o n 7 . 2s n p t l h ; w o l o t h g i h , y a l e d n o i t a g a p o r p 1 e t o n 7 . 2s n t ) i ( k s5 e t o n ; w e k s t u p n i 8 3s p t ) p p ( k s5 , 2 e t o n ; w e k s t r a p - o t - t r a p d b ts p t t i j ; s m r , r e t t i j e s a h p e v i t i d d a r e f f u b , n o i t c e s r e t t i j e s a h p e v i t i d d a o t r e f e r 4 e t o n : e g n a r n o i t a r g e t n i z h m 0 2 - z h k 2 1 4 0 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 5 5s p c d oe l c y c y t u d t u p t u o 0 5% t n e 3 e t o n ; e m i t e l b a n e t u p t u o 5s n t s i d 3 e t o n ; e m i t e l b a s i d t u p t u o 5s n x u m l o s i n o i t a l o s i x u mz h m 0 0 1 @5 4b d v m o r f d e r u s a e m : a 1 e t o n d d v o t t u p n i e h t f o 2 / o d d . t u p t u o e h t f o 2 / d n a s e g a t l o v y l p p u s e m a s e h t a g n i t a r e p o s e c i v e d t n e r e f f i d n o s t u p t u o n e e w t e b w e k s s a d e n i f e d : 2 e t o n v t a d e r u s a e m s i t u p t u o e h t , e c i v e d h c a e n o t u p n i f o e p y t e m a s e h t g n i s u . s n o i t i d n o c d a o l l a u q e h t i w o d d . 2 / . n o i t c u d o r p n i d e t s e t t o n . n o i t a z i r e t c a r a h c y b d e e t n a r a u g e r a s r e t e m a r a p e s e h t : 3 e t o n . k c o l c t u p n i e n o y l n o g n i v i r d : 4 e t o n . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 5 e t o n l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f x a m y c n e u q e r f t u p t u o 0 5 2z h m p t h l ; h g i h o t w o l , y a l e d n o i t a g a p o r p 1 e t o n 3s n p t l h ; w o l o t h g i h , y a l e d n o i t a g a p o r p 1 e t o n 3s n t ) i ( k s5 e t o n ; w e k s t u p n i 8 3s p t ) p p ( k s5 , 2 e t o n ; w e k s t r a p - o t - t r a p d b ts p t t i j ; s m r , r e t t i j e s a h p e v i t i d d a r e f f u b , n o i t c e s r e t t i j e s a h p e v i t i d d a o t r e f e r 4 e t o n : e g n a r n o i t a r g e t n i z h m 0 2 - z h k 2 1 5 0 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 25 9 5s p c d oe l c y c y t u d t u p t u o 0 5% t n e 3 e t o n ; e m i t e l b a n e t u p t u o 5s n t s i d 3 e t o n ; e m i t e l b a s i d t u p t u o 5s n x u m l o s i n o i t a l o s i x u mz h m 0 0 1 @5 4b d v m o r f d e r u s a e m : a 1 e t o n d d v o t t u p n i e h t f o 2 / o d d . t u p t u o e h t f o 2 / d n a s e g a t l o v y l p p u s e m a s e h t a g n i t a r e p o s e c i v e d t n e r e f f i d n o s t u p t u o n e e w t e b w e k s s a d e n i f e d : 2 e t o n v t a d e r u s a e m s i t u p t u o e h t , e c i v e d h c a e n o t u p n i f o e p y t e m a s e h t g n i s u . s n o i t i d n o c d a o l l a u q e h t i w o d d . 2 / . n o i t c u d o r p n i d e t s e t t o n . n o i t a z i r e t c a r a h c y b d e e t n a r a u g e r a s r e t e m a r a p e s e h t : 3 e t o n . k c o l c t u p n i e n o y l n o g n i v i r d : 4 e t o n . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 5 e t o n
integrated circuit systems, inc. 83056agi-01 www.icst.com/products/hiperclocks.html rev. a february 7, 2005 6 ics83056i-01 6-b it , 2:1, s ingle -e nded m ultiplexer preliminary t able 5d. ac c haracteristics , v dd = v ddo = 2.5v 5%, t a = -40c to 85c t able 5e. ac c haracteristics , v dd = 2.5v 5%, v ddo = 1.8v -0.2v, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f x a m y c n e u q e r f t u p t u o 0 5 2z h m p t h l ; h g i h o t w o l , y a l e d n o i t a g a p o r p 1 e t o n 7 . 2s n p t l h ; w o l o t h g i h , y a l e d n o i t a g a p o r p 1 e t o n 9 . 2s n t ) i ( k s5 e t o n ; w e k s t u p n i 5 4s p t ) p p ( k s5 , 2 e t o n ; w e k s t r a p - o t - t r a p d b ts p t t i j ; s m r , r e t t i j e s a h p e v i t i d d a r e f f u b , n o i t c e s r e t t i j e s a h p e v i t i d d a o t r e f e r 4 e t o n : e g n a r n o i t a r g e t n i z h m 0 2 - z h k 2 1 0 1 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 4 5s p c d oe l c y c y t u d t u p t u o 0 5% t n e 3 e t o n ; e m i t e l b a n e t u p t u o 5s n t s i d 3 e t o n ; e m i t e l b a s i d t u p t u o 5s n x u m l o s i n o i t a l o s i x u mz h m 0 0 1 @5 4b d v m o r f d e r u s a e m : a 1 e t o n d d v o t t u p n i e h t f o 2 / o d d . t u p t u o e h t f o 2 / d n a s e g a t l o v y l p p u s e m a s e h t a g n i t a r e p o s e c i v e d t n e r e f f i d n o s t u p t u o n e e w t e b w e k s s a d e n i f e d : 2 e t o n v t a d e r u s a e m s i t u p t u o e h t , e c i v e d h c a e n o t u p n i f o e p y t e m a s e h t g n i s u . s n o i t i d n o c d a o l l a u q e h t i w o d d . 2 / . n o i t c u d o r p n i d e t s e t t o n . n o i t a z i r e t c a r a h c y b d e e t n a r a u g e r a s r e t e m a r a p e s e h t : 3 e t o n . k c o l c t u p n i e n o y l n o g n i v i r d : 4 e t o n . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 5 e t o n l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f x a m y c n e u q e r f t u p t u o 0 5 2z h m p t h l ; h g i h o t w o l , y a l e d n o i t a g a p o r p 1 e t o n 9 . 2s n p t l h ; w o l o t h g i h , y a l e d n o i t a g a p o r p 1 e t o n 3s n t ) i ( k s5 e t o n ; w e k s t u p n i 3 4s p t ) p p ( k s5 , 2 e t o n ; w e k s t r a p - o t - t r a p d b ts p t t i j ; s m r , r e t t i j e s a h p e v i t i d d a r e f f u b , n o i t c e s r e t t i j e s a h p e v i t i d d a o t r e f e r 4 e t o n : e g n a r n o i t a r g e t n i z h m 0 2 - z h k 2 1 7 0 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 9 5s p c d oe l c y c y t u d t u p t u o 0 5% t n e 3 e t o n ; e m i t e l b a n e t u p t u o 5s n t s i d 3 e t o n ; e m i t e l b a s i d t u p t u o 5s n x u m l o s i n o i t a l o s i x u mz h m 0 0 1 @5 4b d v m o r f d e r u s a e m : a 1 e t o n d d v o t t u p n i e h t f o 2 / o d d . t u p t u o e h t f o 2 / d n a s e g a t l o v y l p p u s e m a s e h t a g n i t a r e p o s e c i v e d t n e r e f f i d n o s t u p t u o n e e w t e b w e k s s a d e n i f e d : 2 e t o n v t a d e r u s a e m s i t u p t u o e h t , e c i v e d h c a e n o t u p n i f o e p y t e m a s e h t g n i s u . s n o i t i d n o c d a o l l a u q e h t i w o d d . 2 / . n o i t c u d o r p n i d e t s e t t o n . n o i t a z i r e t c a r a h c y b d e e t n a r a u g e r a s r e t e m a r a p e s e h t : 3 e t o n . k c o l c t u p n i e n o y l n o g n i v i r d : 4 e t o n . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 5 e t o n
integrated circuit systems, inc. 83056agi-01 www.icst.com/products/hiperclocks.html rev. a february 7, 2005 7 ics83056i-01 6-b it , 2:1, s ingle -e nded m ultiplexer preliminary a dditive p hase j itter additive phase jitter (random) at 155.52mhz (12khz - 20mhz) = 0.07ps (typical) 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 1k 10k 100k 1m 10m 100m the spectral purity in a band at a specific offset from the funda- mental compared to the power of the fundamental is called the dbc phase noise. this value is normally expressed using a phase noise plot and is most often the specified plot in many applications. phase noise is defined as the ratio of the noise power present in a 1hz band at a specified offset from the fun- damental frequency to the power value of the fundamental. this ratio is expressed in decibels (dbm) or a ratio of the power in as with most timing specifications, phase noise measure- ments have issues. the primary issue relates to the limita- tions of the equipment. often the noise floor of the equipment is higher than the noise floor of the device. this is illustrated the 1hz band to the power in the fundamental. when the re- quired offset is specified, the phase noise is called a dbc value, which simply means dbm at a specified offset from the funda- mental. by investigating jitter in the frequency domain, we get a better understanding of its effects on the desired application over the entire time record of the signal. it is mathematically possible to calculate an expected bit error rate given a phase noise plot. above. the device meets the noise floor of what is shown, but can actually be lower. the phase noise is dependant on the input source and measurement equipment. o ffset f rom c arrier f requency (h z ) ssb p hase n oise dbc/h z
integrated circuit systems, inc. 83056agi-01 www.icst.com/products/hiperclocks.html rev. a february 7, 2005 8 ics83056i-01 6-b it , 2:1, s ingle -e nded m ultiplexer preliminary p arameter m easurement i nformation scope qx lvcmos 3.3v c ore /2.5v o utput l oad ac t est c ircuit 2.40.065v v ddo -0.9v0.1v v dd 0.9v0.1v scope qx lvcmos 2.5v c ore /2.5v o utput l oad ac t est c ircuit 2.05v5% v ddo -1.25v5% v dd 1.25v5% 3.3v c ore /3.3v o utput l oad ac t est c ircuit scope qx lvcmos 1.65v5% -1.65v5% 3.3v c ore /1.8v o utput l oad ac t est c ircuit 2.5 c ore /1.8v o utput l oad ac t est c ircuit p art - to -p art s kew scope qx lvcmos 1.25v5% -1.25v5% scope qx lvcmos 1.6v0.025v v ddo -0.9v0.1v v dd 0.9v0.1v v dd , v ddo gnd v dd , v ddo gnd gnd gnd gnd t sk(pp) v ddo 2 v ddo 2 qy qx part 1 part 2
integrated circuit systems, inc. 83056agi-01 www.icst.com/products/hiperclocks.html rev. a february 7, 2005 9 ics83056i-01 6-b it , 2:1, s ingle -e nded m ultiplexer preliminary clock outputs 20% 80% 80% 20% t r t f pulse width t period t pw t period odc = v ddo 2 q0:q5 tp lh v ddo 2 v dd 2 clk0, clk1 q0:q5 i nput s kew o utput r ise /f all t ime p ropagation d elay o utput d uty c ycle /p ulse w idth /p eriod t pd1 t pd2 clkx q0:q5 clky q0:q5
integrated circuit systems, inc. 83056agi-01 www.icst.com/products/hiperclocks.html rev. a february 7, 2005 10 ics83056i-01 6-b it , 2:1, s ingle -e nded m ultiplexer preliminary r eliability i nformation t ransistor c ount the transistor count for ics83056i-01 is: 967 t able 5. ja vs . a ir f low t able for 20 l ead tssop ja by velocity (linear feet per minute) 0 200 500 single-layer pcb, jedec standard test boards 114.5c/w 98.0c/w 88.0c/w multi-layer pcb, jedec standard test boards 73.2c/w 66.6c/w 63.5c/w note: most modern pcb designs use multi-layered boards. the data in the second row pertains to most designs.
integrated circuit systems, inc. 83056agi-01 www.icst.com/products/hiperclocks.html rev. a february 7, 2005 11 ics83056i-01 6-b it , 2:1, s ingle -e nded m ultiplexer preliminary p ackage o utline - g s uffix for 20 l ead tssop t able 6. p ackage d imensions reference document: jedec publication 95, mo-153 l o b m y s s r e t e m i l l i m n i mx a m n0 2 a- -0 2 . 1 1 a5 0 . 05 1 . 0 2 a0 8 . 05 0 . 1 b9 1 . 00 3 . 0 c9 0 . 00 2 . 0 d0 4 . 60 6 . 6 ec i s a b 0 4 . 6 1 e0 3 . 40 5 . 4 ec i s a b 5 6 . 0 l5 4 . 05 7 . 0 0 8 a a a- -0 1 . 0
integrated circuit systems, inc. 83056agi-01 www.icst.com/products/hiperclocks.html rev. a february 7, 2005 12 ics83056i-01 6-b it , 2:1, s ingle -e nded m ultiplexer preliminary t able 7. o rdering i nformation while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems, incorpor ated (ics) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patent s, or licenses are implied. this product is intended for use in normal commercial and industrial applications. any other applications such as those requiring high reliability or other extr aordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without noti ce. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments. r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t 1 0 - i g a 6 5 0 3 8 s c i1 0 i a 6 5 0 3 8 s c ip o s s t d a e l 0 2e b u tc 5 8 o t c 0 4 - 1 0 - i g a 6 5 0 3 8 s c i1 0 i a 6 5 0 3 8 s c ip o s s t d a e l 0 2l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - the aforementioned trademark, hiperclocks? is a trademark of integrated circuit systems, inc. or its subsidiaries in the unite d states and/or other countries.

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