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  IRFPS38N60L 
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   super to-247ac v dss r ds(on) typ. trr typ. i d 600v 120m ? 170ns 38a absolute maximum ratings parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 38 i d @ t c = 100c continuous drain current, v gs @ 10v 24 a i dm pulsed drain current 150 p d @t c = 25c power dissipation 540 w linear derating factor 4.3 w/c v gs gate-to-source voltage 30 v dv/dt peak diode recovery dv/dt  19 v/ns t j operating junction and -55 to + 150 t stg storage temperature range c soldering temperature, for 10 seconds 300 (1.6mm from case ) mounting torque, 6-32 or m3 screw 1.1(10) nm (lbfin) diode characteristics symbol parameter min. typ. max. units conditions i s continuous source current ??? ??? 38 mosfet symbol (body diode) a showing the i sm pulsed source current ??? ??? 150 integral reverse (body diode)  p-n junction diode. v sd diode forward voltage ??? ??? 1.5 v t j = 25c, i s = 38a, v gs = 0v  t rr reverse recovery time ??? 170 250 ns t j = 25c, i f = 38a ??? 420 630 t j = 125c, di/dt = 100a/s  q rr reverse recovery charge ??? 830 1240 nc t j = 25c, i s = 38a, v gs = 0v  ??? 2600 3900 t j = 125c, di/dt = 100a/s  i rrm reverse recovery current ??? 9.1 14 a t j = 25c t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld ) www.vishay.com 1 document number: 90330

   repetitive rating; pulse width limited by max. junction temperature.(see fig.12)   starting t j = 25c, l = 0.91mh, r g = 25 ? , i as = 38a, (see figure 14a)  i sd 38a, di/dt 947a/s, v dd v (br)dss , t j 150c.  pulse width 300s; duty cycle 2%.  c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . c oss eff.(er) is a fixed capacitance that stores the same energy as c oss while v ds is rising from 0 to 80% v dss . static @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 600 ??? ??? v ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.41 ??? v/c r ds(on) static drain-to-source on-resistance ??? 120 150 m ? v gs(th) gate threshold voltage 3.0 ??? 5.0 v i dss drain-to-source leakage current ??? ??? 50 a ??? ??? 2.0 ma i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 r g internal gate resistance ??? 1.2 ??? ? dynamic @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units gfs forward transconductance 20 ??? ??? s q g total gate charge ??? ??? 320 q gs gate-to-source charge ??? ??? 85 nc q gd gate-to-drain ("miller") charge ??? ??? 160 t d(on) turn-on delay time ??? 44 ??? t r rise time ??? 130 ??? ns t d(off) turn-off delay time ??? 92 ??? t f fall time ??? 69 ??? c iss input capacitance ??? 7990 ??? c oss output capacitance ??? 740 ??? c rss reverse transfer capacitance ??? 72 ??? pf c oss eff. effective output capacitance ??? 350 ??? c oss eff. (er) effective output capacitance ??? 260 ??? (energy related) avalanche characteristics symbol parameter typ. units e as single pulse avalanche energy ??? mj i ar avalanche current   ??? a e ar repetitive avalanche energy  ??? mj thermal resistance symbol parameter typ. units r jc junction-to-case  ??? r cs case-to-sink, flat, greased surface 0.24 c/w r ja junction-to-ambient  ??? 40 max. 0.22 ??? v ds = 25v ? = 1.0mhz, see fig. 5 38 54 max. 680 v gs = 0v,v ds = 0v to 480v  i d = 38a r g = 4.3 ? v gs = 10v, see fig. 11a & 11b  v gs = 0v i d = 38a v ds = 480v v gs = 10v, see fig. 7 & 15  v dd = 300v v gs = 30v f = 1mhz, open drain conditions v ds = 50v, i d = 23a v gs = -30v v ds = v gs , i d = 250a v ds = 600v, v gs = 0v v ds = 480v, v gs = 0v, t j = 125c conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 23a      
      www.vishay.com 2 document number: 90330

fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.001 0.01 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 20s pulse width tj = 25c vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 20s pulse width tj = 150c vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 4 6 8 10 12 14 16 v gs , gate-to-source voltage (v) 0.01 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 150c -60 -40 -20 0 20 40 60 80 100 120 140 160 t j , junction temperature (c) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 38a v gs = 10v www.vishay.com 3 document number: 90330

fig 5. typical capacitance vs. drain-to-source voltage fig 8. typical source-drain diode forward voltage fig 7. typical gate charge vs. gate-to-source voltage fig 6. typ. output capacitance stored energy vs. v ds 0 100 200 300 400 500 600 700 v ds, drain-to-source voltage (v) 0 5 10 15 20 25 30 35 40 45 50 e n e r g y ( j ) 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 v sd , source-to-drain voltage (v) 0.10 1.00 10.00 100.00 1000.00 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 150c v gs = 0v 1 10 100 1000 v ds , drain-to-source voltage (v) 10 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 50 100 150 200 250 q g total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 480v v ds = 300v v ds = 120v i d = 38a www.vishay.com 4 document number: 90330

fig 9. maximum safe operating area fig 10. maximum drain current vs. case temperature    
 1     0.1 %            fig 11a. switching time test circuit + - v ds 9 0% 1 0% v gs t d(on) t r t d(off) t f fig 11b. switching time waveforms 1 10 100 1000 10000 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 1msec 10msec operation in this area limited by r ds (on) 100sec tc = 25c tj = 150c single pulse 25 50 75 100 125 150 t c , case temperature (c) 0 5 10 15 20 25 30 35 40 i d , d r a i n c u r r e n t ( a ) www.vishay.com 5 document number: 90330

fig 12. maximum effective transient thermal impedance, junction-to-case fig 13. threshold voltage vs. temperature 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 t 1 , rectangular pulse duration (sec) 0.0001 0.001 0.01 0.1 1 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a www.vishay.com 6 document number: 90330

fig 14a. maximum avalanche energy vs. drain current fig 14c. unclamped inductive waveforms d.u.t. v d s i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 15a. gate charge test circuit fig 15b. basic gate charge waveform fig 14b. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v q g q gs q gd v g charge   25 50 75 100 125 150 starting t j , junction temperature (c) 0 200 400 600 800 1000 1200 1400 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 17a 24a bottom 38a www.vishay.com 7 document number: 90330

p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop r e-applied v oltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 16. for n-channel hexfet   power mosfets     !!   
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data and specifications subject to change without notice. this product has been designed and qualified for the industrial market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 10/04 super to-247ac package is not recommended for surface mount application. case outline and dimensions ? super-247 super-247 (to-274aa) part marking information assembly lot code top example: this is an irfps37n50a with assembly lot code 1789 international rectifier logo 89 irfps37n50a 17 part number assembled on ww 19, 1997 in the assembly line "c" note: "p" in assembly line position indicates "lead-free" 719c date code year 7 = 1997 week 19 line c www.vishay.com 9 document number: 90330
legal disclaimer notice vishay document number: 99901 www.vishay.com revision: 12-mar-07 1 notice the products described herein were acquired by vishay intertechnology, inc., as part of its acquisition of international rectifier?s power control systems (pcs) business, which closed in april 2007. specifications of the products displayed herein are pending review by vishay and are subject to the terms and conditions shown below. specifications of the products displayed herein are subject to change without notice. vishay intertechnology, inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. information contained herein is intended to provide a product description only. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. except as provided in vishay's terms and conditions of sale for such products, vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and /or use of vishay products including liab ility or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyrigh t, or other intellectual property right. the products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify vishay for any damages resulting from such improper use or sale. international rectifier ? , ir ? , the ir logo, hexfet ? , hexsense ? , hexdip ? , dol ? , intero ? , and powirtrain ? are registered trademarks of international rectifier corporation in the u.s. and other countries. all other product names noted herein may be trademarks of their respective owners.


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