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| to our customers, old company name in catalogs and other documents on april 1 st , 2010, nec electronics corporation merged with renesas technology corporation, and renesas electronics corporation took over all the business of both companies. therefore, although the old company name remains in this document, it is a valid renesas electronics document. we appreciate your understanding. renesas electronics website: http://www.renesas.com april 1 st , 2010 renesas electronics corporation issued by: renesas electronics corporation (http://www.renesas.com) send any inquiries to http://www.renesas.com/inquiry.
notice 1. all information included in this document is current as of the date this document is issued. such information, however, is subject to change without any prior notice. before purchasing or using any renesas el ectronics products li sted herein, please confirm the latest product information with a renesas electronics sales office. also , please pay regular and careful attention to additional and different information to be disclosed by rene sas electronics such as that disclosed through our website. 2. renesas electronics does not assume any liability for infringeme nt of patents, copyrights, or other intellectual property ri ghts of third parties by or arising from the use of renesas electroni cs products or techni cal information descri bed in this document . no license, express, implied or otherwise, is granted hereby under any patents, copyri ghts or other intell ectual property right s of renesas electronics or others. 3. you should not alter, modify, copy, or otherwise misappropriate any re nesas electronics product, wh ether in whole or in part . 4. descriptions of circuits, software and other related informat ion in this document are provided only to illustrate the operat ion of semiconductor products and application examples. you are fully re sponsible for the incorporation of these circuits, software, and information in the design of your equipment. renesas electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 5. when exporting the products or technology described in this doc ument, you should comply with the applicable export control laws and regulations and follow the proc edures required by such laws and re gulations. you should not use renesas electronics products or the technology described in this docum ent for any purpose relating to mil itary applicati ons or use by the military, including but not l imited to the development of weapons of mass de struction. renesas electronics products and technology may not be used for or incor porated into any products or systems whose manufacture, us e, or sale is prohibited under any applicable dom estic or foreign laws or regulations. 6. renesas electronics has used reasonable care in preparing th e information included in this document, but renesas electronics does not warrant that such information is error free. renesas electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. 7. renesas electronics products ar e classified according to the following three quality grades: ?standard?, ?high quality?, an d ?specific?. the recommended applications for each renesas electronics product de pends on the product?s quality grade, as indicated below. you must check the qua lity grade of each renesas electronics pr oduct before using it in a particular application. you may not use any renesas electronics produc t for any application categorized as ?speci fic? without the prior written consent of renesas electronics. further, you may not use any renesas electronics product for any application for which it is not intended without the prior written consent of renesas electronics. re nesas electronics shall not be in any way liable for any damages or losses incurred by you or third partie s arising from the use of any renesas electronics product for a n application categorized as ?specific? or for which the product is not intende d where you have failed to obtain the prior writte n consent of renesas electronics. the quality grade of each renesas electronics product is ?standard? unless otherwise expressly specified in a renesas electr onics data sheets or data books, etc. ?standard?: computers; office equipmen t; communications e quipment; test and measurement equipment; audio and visual equipment; home electronic a ppliances; machine tools; personal electronic equipmen t; and industrial robots. ?high quality?: transportation equi pment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; an ti- crime systems; safety equipment; and medical equipment not specif ically designed for life support. ?specific?: aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support device s or systems), surgical im plantations, or healthcare intervention (e.g. excision, etc.), and any other applicati ons or purposes that pose a di rect threat to human life. 8. you should use the renesas electronics pr oducts described in this document within the range specified by renesas electronics , especially with respect to the maximum ra ting, operating supply voltage range, movement power volta ge range, heat radiation characteristics, installation and other product characteristics. renesas electronics shall have no liability for malfunctions o r damages arising out of the use of renesas electronics products beyond such specified ranges. 9. although renesas electronics endeavors to improve the quality and reliability of its produc ts, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate a nd malfunctions under certain use conditions. fur ther, renesas electronics products are not subject to radiation resistance design. please be sure to implement safety measures to guard them against the possibility of physic al injury, and injury or damage caused by fire in the event of the failure of a renesas electronics product, such as safe ty design for hardware and software in cluding but not limited to redundancy, fire control and malfunction prevention, appropri ate treatment for aging degradation or an y other appropriate measures. because the evaluation of microcomputer software alone is very difficult , please evaluate the safety of the final products or system manufactured by you. 10. please contact a renesa s electronics sales office for details as to environmental matters such as the environmental compatibility of each renesas electronics product. please use renesas electronics products in compliance with all applicable laws and regulations that regul ate the inclusion or use of c ontrolled substances, including wi thout limitation, the eu rohs directive. renesas electronics assumes no liability for damage s or losses occurring as a result of your noncompliance with applicable laws and regulations. 11. this document may not be reproduced or duplicated, in any form, in w hole or in part, without prio r written consent of renes as electronics. 12. please contact a renesa s electronics sales office if you have any questi ons regarding the informat ion contained in this document or renesas electroni cs products, or if you have any other inquiries. (note 1) ?renesas electronics? as used in this document means renesas electronics corporation and also includes its majority- owned subsidiaries. (note 2) ?renesas electronics product(s)? means any product developed or manufactured by or for renesas electronics. the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. mos integrated circuit pd23c128040bl, 23c128080bl 128m-bit mask-programmable rom 16m-word by 8-bit (byte mode) / 8m-word by 16-bit (word mode) page access mode data sheet document no. m16048ej3v0ds00 (3rd edition) date published february 2006 ns cp (k) printed in japan 2002 the mark data sheet m16048ej3v0ds 2 pd23c128040bl, 23c128080bl ordering information part number package pd23c128040blgy-xxx-mjh 48-pin plastic tsop(i) (12x18) (normal bent) pd23c128040blgy-xxx-mkh 48-pin plastic tsop(i) (12x18) (reverse bent) pd23c128040blgx-xxx 44-pin plastic sop (15.24 mm (600)) pd23c128080blgy-xxx-mjh 48-pin plastic tsop(i) (12x18) (normal bent) pd23c128080blgy-xxx-mkh 48-pin plastic tsop(i) (12x18) (reverse bent) pd23c128080blgx-xxx 44-pin plastic sop (15.24 mm (600)) pd23c128040blgy-xxx-mjh-a 48-pin plastic tsop(i) (12x18) (normal bent) pd23c128040blgy-xxx-mkh-a 48-pin plastic tsop(i) (12x18) (reverse bent) pd23c128040blgx-xxx-a 44-pin plastic sop (15.24 mm (600)) pd23c128080blgy-xxx-mjh-a 48-pin plastic tsop(i) (12x18) (normal bent) pd23c128080blgy-xxx-mkh-a 48-pin plastic tsop(i) (12x18) (reverse bent) pd23c128080blgx-xxx-a 44-pin plastic sop (15.24 mm (600)) remarks 1. xxx : rom code suffix no. 2. products with -a at the end of the part number are lead-free products. data sheet m16048ej3v0ds 3 pd23c128040bl, 23c128080bl pin configurations /xxx indicates active low signal. 48-pin plastic tsop(i) (12 x 18) (normal bent) [ pd23c128040blgy-xxx-mjh ] [ pd23c128080blgy-xxx-mjh ] [ pd23c128040blgy-xxx-mjh-a ] [ pd23c128080blgy-xxx-mjh-a ] marking side word, /byte a16 a15 a14 a13 a12 a11 a10 a9 a8 a19 a21 a20 a18 a17 a7 a6 a5 a4 a3 a2 a1 a0 /ce gnd gnd o15, a?1 o7 o14 o6 o13 o5 o12 o4 v cc v cc a22 o11 o3 o10 o2 o9 o1 o8 o0 /oe or oe or dc gnd gnd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 a0 to a22 : address inputs o0 to o7, o8 to o14 : data outputs o15, a?1 : data output 15 (word mode), lsb address input (byte mode) word, /byte : mode select /ce : chip enable /oe or oe : output enable v cc : supply voltage gnd : ground dc : don?t care remark refer to package drawings for the 1-pin index mark. data sheet m16048ej3v0ds 4 pd23c128040bl, 23c128080bl 48-pin plastic tsop(i) (12 x 18) (reverse bent) [ pd23c128040blgy-xxx-mkh ] [ pd23c128080blgy-xxx-mkh ] [ pd23c128040blgy-xxx-mkh-a ] [ pd23c128080blgy-xxx-mkh-a ] marking side word, /byte a16 a15 a14 a13 a12 a11 a10 a9 a8 a19 a21 a20 a18 a17 a7 a6 a5 a4 a3 a2 a1 a0 /ce gnd gnd o15, a?1 o7 o14 o6 o13 o5 o12 o4 v cc v cc a22 o11 o3 o10 o2 o9 o1 o8 o0 /oe or oe or dc gnd gnd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 a0 to a22 : address inputs o0 to o7, o8 to o14 : data outputs o15, a?1 : data output 15 (word mode), lsb address input (byte mode) word, /byte : mode select /ce : chip enable /oe or oe : output enable v cc : supply voltage gnd : ground dc : don?t care remark refer to package drawings for the 1-pin index mark. data sheet m16048ej3v0ds 5 pd23c128040bl, 23c128080bl 44-pin plastic sop (15.24 mm (600)) [ pd23c128040blgx-xxx ] [ pd23c128080blgx-xxx ] [ pd23c128040blgx-xxx-a ] [ pd23c128080blgx-xxx-a ] marking side 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 a21 a18 a17 a7 a6 a5 a4 a3 a2 a1 a0 /ce gnd /oe or oe or dc o0 o8 o1 o9 o2 o10 o3 o11 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 a20 a19 a8 a9 a10 a11 a12 a13 a14 a15 a16 a22 gnd o15 o7 o14 o6 o13 o5 o12 o4 v cc a0 to a22 : address inputs o0 to o15 : data outputs /ce : chip enable /oe or oe : output enable v cc : supply voltage gnd : ground dc : don?t care remarks 1. refer to package drawings for the 1-pin index mark. 2. with 44-pin plastic sop package products, onl y word mode (8,388,608 words x 16 bits) can be used. there is no mode se lect (word, /byte) pin. data sheet m16048ej3v0ds 6 pd23c128040bl, 23c128080bl input / output pin functions pin name input / output function word, /byte input the pin for switching word mode and byte mode. high level : word mode (8m-word by 16-bit) low level : byte mode (16m-word by 8-bit) a0 to a22 (address inputs) input address input pins. a0 to a22 are used differently in the word mode and the byte mode. word mode (8m-word by 16-bit) a0 to a22 are used as 23 bits address signals. byte mode (16m-word by 8-bit) a0 to a22 are used as the upper 23 bits of total 24 bits of address signal. (the least significant bit (a ? 1) is combined to o15.) o0 to o7, o8 to o14 (data outputs) output data output pins. o0 to o7, o8 to o14 are used differently in the word mode and the byte mode. word mode (8m-word by 16-bit) the lower 15 bits of 16 bits data outputs to o0 to o14. (the most significant bit (o15) combined to a ? 1.) byte mode (16m-word by 8-bit) 8 bits data outputs to o0 to o7 and also o8 to o14 are high impedance. o15, a ? 1 (data output 15, lsb address input) output, input o15, a ? 1 are used differently in the word mode and the byte mode. word mode (8m-word by 16-bit) the most significant output data bus (o15). byte mode (16m-word by 8-bit) the least significant address bus (a ? 1). /ce (chip enable) input chip activating signal. when the oe is active, output states are following. high level : high-z low level : data out /oe or oe or dc (output enable, don?t care) input output enable signal. the active level of oe is mask option. the active level of oe can be selected from high active, lo w active and don?t care at order. v cc ? supply voltage gnd ? ground data sheet m16048ej3v0ds 7 pd23c128040bl, 23c128080bl block diagram o15, a?1 word, /byte /oe or oe or dc /ce output buffer y-selector memory cell matrix 8,388,608 words by 16 bits / 16,777,216 words by 8 bits address input buffer x-decoder logic/input input buffer y-decoder a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 o14 o13 o12 o11 o10 o9 o8 o0 o1 o2 o3 o4 o5 o6 o7 a20 a21 a22 data sheet m16048ej3v0ds 8 pd23c128040bl, 23c128080bl mask option the active levels of output enable pin (/oe or oe or dc) are mask programmable and optional, and can be selected from among " 0 " " 1 " " x " shown in the table below. option /oe or oe or dc oe active level 0 /oe l 1 oe h x dc don?t care operation modes for each option ar e shown in the tables below. operation mode (option : 0) /ce /oe mode output state l data out l h active high-z h h or l standby high-z operation mode (option : 1) /ce oe mode output state l high-z l h active data out h h or l standby high-z operation mode (option : x) /ce dc mode output state l h or l active data out h h or l standby high-z remark l : low level input h : high level input data sheet m16048ej3v0ds 9 pd23c128040bl, 23c128080bl electrical specifications absolute maximum ratings parameter symbol condition rating unit supply voltage v cc ?0.3 to +4.6 v input voltage v i ?0.3 to v cc +0.3 v output voltage v o ?0.3 to v cc +0.3 v operating ambient temperature t a ?10 to +70 c storage temperature t stg ?65 to +150 c caution exposing the device to stress above those listed in absolute maximum ratings could cause permanent damage. the device is not meant to be operated under conditions outside the limits described in the operational section of this speci fication. exposure to absolute maximum rating conditions for extended periods may affect device reliability. capacitance (t a = 25 c) parameter symbol test condition min. typ. max. unit input capacitance c i 10 pf output capacitance c o f = 1 mhz 12 pf dc characteristics (t a = ?10 to +70 c, v cc = 2.7 to 3.6 v) parameter symbol test conditions min. typ. max. unit high level input voltage v ih 2.0 v cc + 0.3 v low level input voltage v il v cc = 3.0 v 0.3 v ?0.3 +0.5 v v cc = 3.3 v 0.3 v ?0.3 +0.8 high level output voltage v oh i oh = ?100 a 2.4 v low level output voltage v ol i ol = 2.1 ma 0.4 v input leakage current i li v i = 0 v to v cc ?10 +10 a output leakage current i lo v o = 0 v to v cc , chip deselected ?10 +10 a power supply current i cc1 /ce = vil (active mode) , pd23c128040bl v cc = 3.0 v 0.3 v 50 ma i o = 0 ma v cc = 3.3 v 0.3 v 55 pd23c128080bl v cc = 3.0 v 0.3 v 70 v cc = 3.3 v 0.3 v 75 standby current i cc3 /ce = v cc ? 0.2 v (standby mode) 30 a data sheet m16048ej3v0ds 10 pd23c128040bl, 23c128080bl ac characteristics (t a = ?10 to +70 c, v cc = 2.7 to 3.6 v) parameter symbol test condition v cc = 3.0 v 0.3 v v cc = 3.3 v 0.3 v unit min. typ. max. min. typ. max. address access time t acc 120 100 ns page access time t pac 25 25 ns address skew time t skew note 10 10 ns chip enable access time t ce 120 100 ns output enable access time t oe 25 25 ns output hold time t oh 0 0 ns output disable time t df 0 20 0 20 ns word, /byte access time t wb 120 100 ns note t skew indicates the following three types of time depending on the condition. 1) when switching /ce from high level to low level, t skew is the time from the /ce low level input point until the next address is determined. 2) when switching /ce from low level to high level, t skew is the time from the addr ess change start point to the /ce high level input point. 3) when /ce is fixed to low level, t skew is the time from the address change start point until the next address is determined. since specs are defined for t skew only when /ce is active, t skew is not subject to limitations when /ce is switched from high level to low level following address determination, or when the address is changed after /ce is switched from low level to high level. remark t df is the time from inactivation of chip enable input (/ce) or output enable input (/oe or oe) to high impedance state output. ac test conditions input waveform (rise / fall time 5 ns) test points 1.4 v 1.4 v output waveform test points 1.4 v 1.4 v output load 1ttl + 100 pf data sheet m16048ej3v0ds 11 pd23c128040bl, 23c128080bl cautions on power application to ensure normal operation, always apply power using /ce following the procedure shown below. 1) input a high level to /ce during and after power application. 2) hold the high level input to /ce for 200 ns or longer (wait time). 3) start normal operation after the wait time has elapsed. power application timing chart 1 (when /ce is made high at power application) wait time 200 ns or longer normal operation /ce (input) v cc power application timing chart 2 (when /ce is made high after power application) wait time 200 ns or longer normal operation /ce (input) v cc caution other signals can be either high or low during the wait time. data sheet m16048ej3v0ds 12 pd23c128040bl, 23c128080bl read cycle timing chart 1 t acc t oh t ce t oe t skew t skew t skew t oh t oh t df note2 t df note2 t acc t acc data out data out data out (input) (input) (input) (input) a0 to a22, a ? 1 note1 o0 to o7, o8 to o15 note3 /ce /oe or oe high-z high-z notes 1. during word mode, a?1 is o15. 2. t df is the time from inactivation of chip enable i nput (/ce) or output enable input (/oe or oe) to high impedance state output. 3. during byte mode, o8 to o14 are high impedance and o15 is a?1. data sheet m16048ej3v0ds 13 pd23c128040bl, 23c128080bl read cycle timing chart 2 (page access mode) (input) /ce (input) /oe or oe (input) t acc data out t ce t oe t pac note 5 t pac note 5 o0 to o7, o8 to o15 note 4 (input) (output) data out data out high-z high-z t oh t oh t oh t df note 3 a2 to a22 a3 to a22 upper address note 1 a?1 note 2 , a0, a1 a?1 note 2 , a0, a1, a2 page address note 1 notes 1. the address differs depending on the product as follows. part number upper address page address pd23c128040bl a2 to a22 a?1, a0, a1 pd23c128080bl a3 to a22 a?1, a0, a1, a2 2. during word mode, a?1 is o15. 3. t df is the time from inactivation of chip enable i nput (/ce) or output enable input (/oe or oe) to high impedance state output. 4. during byte mode, o8 to o14 are high impedance and o15 is a?1. 5. the definition of page access time is as follows. [ pd23c128040bl ] page access time upper address (a2 to a22) /ce input condition /oe or oe input condition inputs condition t pac before t acc ? t pac before t ce ? t pac before stabilizing of page address (a?1, a0, a1) [ pd23c128080bl ] page access time upper address (a3 to a22) /ce input condition /oe or oe input condition inputs condition t pac before t acc ? t pac before t ce ? t pac before stabilizing of page address (a?1, a0, a1, a2) data sheet m16048ej3v0ds 14 pd23c128040bl, 23c128080bl word, /byte switch timing chart data out a ? 1 (input) word, /byte (input) high-z high-z data out data out high-z o0 to o7 (output) o8 to o15 (output) t oh t acc t oh t wb data out data out t df remark chip enable (/ce) and output enable (/oe or oe) : active. data sheet m16048ej3v0ds 15 pd23c128040bl, 23c128080bl package drawings notes 48-pin plastic tsop( i ) (12x18) item millimeters a b c e i 12.0 0.1 0.5 (t.p.) 0.1 0.05 0.45 max. k 1.2 max. 16.4 0.1 0.145 0.05 f 0.10 m d 0.22 0.05 1. each lead centerline is located within 0.10 mm of its true position (t.p.) at maximum material condition. 2. "a" excludes mold flash. (includes mold flash : 12.4 mm max.) r k l 1.0 0.05 g l 0.5 0.10 n p 18.0 0.2 q3 + 5 ? 3 0.25 r s48gy-50-mjh1-1 s 0.60 0.15 j 0.8 0.2 s q s n e g f j detail of lead end c d m m b a i p 1 24 48 25 s data sheet m16048ej3v0ds 16 pd23c128040bl, 23c128080bl 0.145 0.05 notes 48-pin plastic tsop( i ) (12x18) item millimeters a b c e i 12.0 0.1 0.5 (t.p.) 0.1 0.05 0.45 max. k 1.2 max. 16.4 0.1 f 0.10 m d 0.22 0.05 1. each lead centerline is located within 0.10 mm of its true position (t.p.) at maximum material condition. 2. "a" excludes mold flash. (includes mold flash : 12.4 mm max.) c b r k d m m 1.0 0.05 g l 0.5 0.10 n p 18.0 0.2 q3 + 5 ? 3 0.25 r s48gy-50-mkh1-1 s 0.60 0.15 j 0.8 0.2 s n j g f l s q e detail of lead end 1 24 48 25 s a i p data sheet m16048ej3v0ds 17 pd23c128040bl, 23c128080bl 44-pin plastic sop (15.24 mm (600)) note each lead centerline is located within 0.12 mm of its true position (t.p.) at maximum material condition. item millimeters c 0.78 max. b 1.27 (t.p.) e 0.15 0.1 f 3.0 max. g 2.7 0.05 h 16.04 0.3 i 13.24 0.1 j 1.4 0.2 m 0.12 n 0.10 l 0.8 0.2 k 0.22 + 0.08 ? 0.07 p3 + 7 ? 3 d 0.42 + 0.08 ? 0.07 a 27.83 + 0.4 ? 0.05 p44gx-50-600a-4 k l g p dm b j detail of lead end s n m f e c 44 23 122 s h i a data sheet m16048ej3v0ds 18 pd23c128040bl, 23c128080bl recommended soldering conditions please consult with our sales offi ces for soldering conditions of the pd23c128040bl and pd23c128080bl. types of surface mount device pd23c128040blgy-mjh : 48-pin plastic tsop(i) (12 x 18) (normal bent) pd23c128040blgy-mkh : 48-pin plastic ts op(i) (12 x 18) (reverse bent) pd23c128040blgx : 44-pin plastic sop (15.24 mm (600)) pd23c128080blgy-mjh : 48-pin plastic tsop(i) (12 x 18) (normal bent) pd23c128080blgy-mkh : 48-pin plastic ts op(i) (12 x 18) (reverse bent) pd23c128080blgx : 44-pin plastic sop (15.24 mm (600)) pd23c128040blgy-mjh-a : 48-pin plastic tsop(i) (12 x 18) (normal bent) pd23c128040blgy-mkh-a : 48-pin plastic tsop(i) (12 x 18) (reverse bent) pd23c128040blgx-a : 44-pin plastic sop (15.24 mm (600)) pd23c128080blgy-mjh-a : 48-pin plastic tsop(i) (12 x 18) (normal bent) pd23c128080blgy-mkh-a : 48-pin plastic tsop(i) (12 x 18) (reverse bent) pd23c128080blgx-a : 44-pin plastic sop (15.24 mm (600)) data sheet m16048ej3v0ds 19 pd23c128040bl, 23c128080bl revision history edition/ page type of location description date this previous revi sion (previous edition this edition) edition edition 3rd edition/ p.2 p.2 addition ordering information lead-free products have been added feb. 2006 pp.3-5 pp.3-5 addition pin c onfiguration lead-free products have been added p.18 p.18 addition recommended sol dering lead-free products have been added conditions data sheet m16048ej3v0ds 20 pd23c128040bl, 23c128080bl [memo] data sheet m16048ej3v0ds 21 pd23c128040bl, 23c128080bl [memo] data sheet m16048ej3v0ds 22 pd23c128040bl, 23c128080bl [memo] data sheet m16048ej3v0ds 23 pd23c128040bl, 23c128080bl 1 2 3 4 voltage application waveform at input pin waveform distortion due to input noise or a reflected wave may cause malfunction. if the input of the cmos device stays in the area between v il (max) and v ih (min) due to noise, etc., the device may malfunction. take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between v il (max) and v ih (min). handling of unused input pins unconnected cmos device inputs can be cause of malfunction. if an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd via a resistor if there is a possibility that it will be an output pin. all handling related to unused pins must be judged separately for each device and according to related specifications governing the device. precaution against esd a strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. environmental control must be adequate. when it is dry, a humidifier should be used. it is recommended to avoid using insulators that easily build up static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work benches and floors should be grounded. the operator should be grounded using a wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with mounted semiconductor devices. status before initialization power-on does not necessarily define the initial status of a mos device. immediately after the power source is turned on, devices with reset functions have not yet been initialized. hence, power-on does not guarantee output pin levels, i/o settings or contents of registers. a device is not initialized until the reset signal is received. a reset operation must be executed immediately after power-on for devices with reset functions. power on/off sequence in the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. when switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. the correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. input of signal during power off state do not input signals or an i/o pull-up power supply while the device is not powered. the current injection that results from input of such a signal or i/o pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. input of signals during the power off state must be judged separately for each device and according to related specifications governing the device. notes for cmos devices 5 6 pd23c128040bl, 23c128080bl these commodities, technology or software, must be exported in accordance with the export administration regulations of the exporting country. diversion contrary to the law of that country is prohibited. the information in this document is current as of february, 2006. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec electronics data sheets or data books, etc., for the most up-to-date specifications of nec electronics products. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec electronics. nec electronics assumes no responsibility for any errors that may appear in this document. nec electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec electronics products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec electronics or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. nec electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec electronics endeavors to enhance the quality, reliability and safety of nec electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. nec electronics products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to nec electronics products developed based on a customer- designated "quality assurance program" for a specific application. the recommended applications of an nec electronics product depend on its quality grade, as indicated below. customers must check the quality grade of each nec electronics product before using it in a particular application. "standard": computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. "special": transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). "specific": aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. the quality grade of nec electronics products is "standard" unless otherwise expressly specified in nec electronics data sheets or data books, etc. if customers wish to use nec electronics products in applications not intended by nec electronics, they must contact an nec electronics sales representative in advance to determine nec electronics' willingness to support a given application. (note) (1) "nec electronics" as used in this statement means nec electronics corporation and also includes its majority-owned subsidiaries. (2) "nec electronics products" means any product developed or manufactured by or for nec electronics (as defined above). ? ? ? ? ? ? m8e 02. 11-1 |
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