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ds07-12545-1e fujitsu semiconductor data sheet 8-bit proprietary microcontroller cmos f 2 mc-8l mb89960 series mb89965/p965a/f969a/ mb89pv960 n n n n description the mb89960 series is a single-chip microcontroller that utilizes the f 2 mc-8l core for low voltage and high speed performance. the microcontroller contains a range of peripheral functions including timers, a serial interface, i 2 c interface, a/d converter, and external interrupts. the internal i 2 c interface complies with the sm bus standard and supports an sm bus battery controller. n n n n features ? range of package options ? qfp and mqfp packages (0.8 mm pitch) ? lqfp package (0.5 mm and 0.65 mm pitch) ? high speed operation at low voltage minimum instruction execution time = = = = 0.4 m s (for a 10 mhz oscillation) ? f 2 mc-8l cpu core instruction set optimized for controller applications ? multiplication and division instructions ? 16-bit arithmetic operations ? bit test branch instructions ? bit manipulation instructions, etc. ? dual-clock control system ? main clock : 10 mhz max. (four speed settings available, oscillation halts in sub-clock mode) ? sub-clock : 32.768 khz (operation clock for sub-clock mode) ? four channels ? 8/16-bit timer/counter (8-bit 2 channels or 16-bit 1 channel) ? 21-bit timebase timer ? clock prescaler (15-bit) ? serial i/o selectable transfer format (msb-first or lsb-first) supports communications with a wide range of devices. ? a/d converter 10-bit 4 channels
mb89960 series 2 ? external interrupts ? external interrupt 1 (3 channels) three independent interrupt inputs can be used to recover from low-power consumption modes (with edge- detection function) ? external interrupt 2 (1 channel with 8 inputs) eight inputs can be used to recover from low-power consumption modes (with l level detection function) ? low-power consumption modes (standby modes) ? stop mode (as all oscillations halt in sub-clock mode, current consumption falls to almost zero.) ? sleep mode (the cpu stops to reduce the current consumption to approximately 1/3 of normal.) ? clock mode (all operation halts other than the clock prescaler resulting in very low power consumption.) ? i 2 c interface* ? supports intel sm bus and philips i 2 c bus standards. ? uses a two-wire data transfer protocol. ? max. 35 i/o ports ? output-only ports (n-ch open drain) : 6 ? general-purpose i/o ports (cmos) : 21 ? output-only ports (cmos) : 8 * : i 2 c license the customer is licensed to use the philips i 2 c patent when using this product in an i 2 c system that complies with the philips i 2 c standard specifications. n n n n pac k ag e plastic lqfp, 48-pin plastic qfp, 48-pin plastic qfp, 48-pin (fpt-48p-m05) (fpt-48p-m13) (fpt-48p-m16) ceramic mqfp, 48-pin plastic lqfp, 64-pin (mqp-48c-p01) (fpt-64p-m09)
mb89960 series 3 n n n n product lineup (continued) part no. prameter mb89965 mb89p965a mb89f969a mb89pv960 classification mass-produced products (mask rom products) one-time product flash product piggyback/ evaluation product for testing and development rom size 16 k 8-bit (internal mask rom) 60 k 8-bit 32 k 8-bit (external rom) * ram size 512 8-bit 1024 8-bit cpu functions number of instructions instruction bit length instruction length data bit length minimum execution time interrupt processing time : 136 : 8-bit : 1 to 3 bytes : 1-, 8-, 16bits : 0.4 m s (at 10 mhz) : 3.6 m s (at 10 mhz) pe- riph- eral func- tions ports output-only ports (n-ch open drain) output-only ports (cmos) general-purpose i/o ports (cmos) total : 6 (4 pins are shared with analog inputs) (2 pins are shared with resource i/o) : 8 : 21 (shared with resource i/o) 35 (max.) timebase timer 21-bit four interrupt intervals selectable 0.82 ms, 3.3 ms, 26.2 ms, or 419.4 ms (approx.) (for main clock) watchdog timer reset trigger period : 419.4 ms (10 mhz main clock) 500 ms (32.768 mhz sub-clock) i 2 c interface one channel. supports intel sm bus (version 1.0) and philips i 2 c bus standards. uses a 2-wire protocol for communications with other devices. included/not included (specified when order- ing. see ordering in- formation for details.) included 8/16-bit timer/ counter timer 2 channel 8-bit timer/counter operation (independent operation clocks for timer 1 and timer 2) or 16-bit timer/counter operation (operation clock period : 0.8 m s to 204.8 m s) can execute an event counter operation and output a square wave using an external clock. 1 or 16-bit timer/counter operation mode serial i/o 8 bits lsb-first or msb-first selectable transfer clocks : external or three internal clocks (0.8 m s, 3.2 m s, 12.8 m s) external interrupt 1 (edge) selectable edge detection (rising, falling, or either edge) 3 independent channels these can also be used to recover from standby modes (edge detection is still available in stop mode) . external interrupt 2 (level) 1 channel with 8 inputs (l level interrupts, independent input enable) this can also be used to recover from standby modes (level detection is still available in stop mode) .
mb89960 series 4 (continued) * : use the mbm27c256a-20tvm as the external rom (operating voltage : 4.5 v to 5.5 v) note : unless otherwise stated, clock periods and conversion times are for 10 mhz operation with the main clock operating at maximum speed. n n n n packages and corresponding products : available : not available part no. prameter mb89965 mb89p965a mb89f969a mb89pv960 pe- riph- eral func- tions a/d converter 4 channel 10-bit resolution a/d conversion time : 15.2 m s (mb89965, mb89p965a, mb89f969a) 13.2 m s (mb89pv960) continuous activation is available using the output from the 8/16-bit timer/counter or timebase timer. reference voltage input (avr) clock prescaler 15-bit interrupt interval : 31.25 ms, 0.25 s, 0.50 s, 1.00 s (for a 32.768 khz sub-clock) low power consump- tion (standby modes) sleep mode, stop mode, and clock mode process cmos operating voltage 3.5 v to 5.5 v package part no. mb89965 mb89p965a mb89f969a mb89pv960 fpt-48p-m05 fpt-48p-m13 fpt-48p-m16 fpt-64p-m09 mqp-48c-p01
mb89960 series 5 n n n n differences among products 1. memory space please take note of the differences among products before testing and developing software for the mb89960 series. ? the ram and rom configurations differ among products. ? if the bottom stack address is set at the top ram address, this will need to be relocated if changing to a different product. 2. current consumption ? in the case of the mb89pv960, add the current consumed by the eprom which is connected to the top socket. ? when operated at low speed, one-time prom and eprom products will consume more current than mask rom products. however, the current consumption in sleep/stop modes is the same. 3. functional differences between mb89960 series 4. mask options functions that can be selected as options and the methods used to specify these options vary by the product. before using mask options, check section mask options. mb89965/p965a/f969a mb89pv960 power-on reset delay time regulator stabilization delay time, regulator recovery time, oscillation stabilization delay time oscillation stabilization delay time external reset delay time in stop/ sub-clock mode or external interrupt delay time in main stop mode regulator recovery time, oscillation stabilization delay time oscillation stabilization delay time port pin pull-up resistors software-selectable not available a/d conversion time 38 instruction cycles 33 instruction cycles i 2 c noise elimination circuit always present regardless of iccr : dmpb bit setting disabled if iccr : dmpb bit = 1
mb89960 series 6 n n n n pin assignment (continued) (top view) (fpt-48p-m05) (fpt-48p-m13) (fpt-48p-m16) 1 2 3 4 5 6 7 8 9 10 11 12 av cc rst mod0 mod1 x0 x1 v cc x0a x1a p27 p26 p25 36 35 34 33 32 31 30 29 28 27 26 25 p34/to/clk c p00/int20 p01/int21 p02/int22 p03/int23 p04/int24 p05/int25 p06/int26 p07/int27 p10/int10 p11/int11 48 47 46 45 44 43 42 41 40 39 38 37 p40/an0 p41/an1 p42/an2 p43/an3 avr av ss p44/sda p45/scl p30/sck p31/so p32/si p33/ec 13 14 15 16 17 18 19 20 21 22 23 24 p24 p23 p22 p21 p20 p17 v ss p16 p15 p14 p13 p12/int12
mb89960 series 7 (continued) (continued) (top view) (mqp-48c-p01) 1 2 3 4 5 6 7 8 9 10 11 12 av cc rst mod0 mod1 x0 x1 v cc x0a x1a p27 p26 p25 36 35 34 33 32 31 30 29 28 27 26 25 p34/to/clk n.c. p00/int20 p01/int21 p02/int22 p03/int23 p04/int24 p05/int25 p06/int26 p07/int27 p10/int10 p11/int11 48 47 46 45 44 43 42 41 40 39 38 37 p40/an0 p41/an1 p42/an2 p43/an3 avr av ss p44/sda p45/scl p30/sck p31/so p32/si p33/ec 13 14 15 16 17 18 19 20 21 22 23 24 p24 p23 p22 p21 p20 p17 v ss p16 p15 p14 p13 p12/int12 69 70 71 72 73 74 75 76 60 59 58 57 56 55 54 53 68 67 66 65 64 63 62 61 77 78 79 80 49 50 51 52 * : pin assignment on package top (mb89pv960) n.c. : internally connected. do not use. pin no. pin name pin no. pin name pin no. pin name pin no. pin name 49 v pp 57 n.c. 65 o4 73 oe 50 a12 58 a2 66 o5 74 n.c. 51 a7 59 a1 67 o6 75 a11 52 a6 60 a0 68 o7 76 a9 53 a5 61 o1 69 o8 77 a8 54 a4 62 o2 70 ce 78 a13 55 a3 63 o3 71 a10 79 a14 56 n.c. 64 v ss 72 n.c. 80 v cc
mb89960 series 8 (continued) (top view) (fpt-64p-m09) n.c. n.c. p40/an0 p41/an1 p42/an2 p43/an3 avr av ss p44/sda p45/scl p30/sck p31/so p32/si p33/ec n.c. n.c. 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 148 n.c. 247 n.c. 346 p34/to/clk 445 c 544 p00/int20 643 p01/int21 742 p02/int22 841 p03/int23 940 p04/int24 10 39 p05/int25 11 38 p06/int26 12 37 p07/int27 13 36 p10/int10 14 35 p11/int11 15 34 n.c. 16 33 n.c. n.c. n.c. p24 p23 p22 p21 p20 p17 v ss p16 p15 p14 p13 p12/int12 n.c. n.c. 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 test mod2 av cc rst mod0 mod1 x0 x1 v cc x0a x1a p27 p26 p25 n.c. n.c.
mb89960 series 9 n n n n pin descriptions *1 : fpt-48p-m05 *2 : fpt-48p-m16, fpt-48p-m13 *3 : mqp-48c-p01 *4 : fpt-64p-m09 pin no. pin name circuit type function mqfp-48* 3 lqfp-48* 1 qfp-48* 2 lqfp-64* 4 557x0 a oscillator connection pins for the main clock os- cillator (crystal oscillator or similar) . when using an external clock, input the clock signal to x0 and leave x1 open. 668x1 8810x0a b oscillator connection pins for the sub-clock os- cillator (crystal oscillator or similar) . when using an external clock (low speed : 32.768 khz) , input the clock signal to x0a and leave x1a open. 9911x1a 335mod0 c input pins for setting the memory access mode. connect directly to v ss . 446mod1 224rst d reset i/o pin this is an n-ch open-drain output type with pull- up resistor and a hysteresis input type. the pin outputs l when an internal reset is present. similarly, inputting l initializes the internal cir- cuits. 27 to 34 27 to 34 37 to 44 p00/int20 to p07/int27 e general-purpose i/o ports also serves as the external interrupt 2 inputs (wakeup inputs) . the external interrupt 2 inputs are hysteresis inputs. 24 to 26 24 to 26 30, 35, 36 p10/int10 to p12/int12 e general-purpose i/o ports also serves as the external interrupt 1 inputs (wakeup inputs) . the external interrupt 1 inputs are hysteresis inputs. 18, 20 to 23 18, 20 to 23 24, 26 to 29 p13 to p17 e general-purpose i/o ports 10 to 17 10 to 17 12 to 14 19 to 23 p20 to p27 g general-purpose outoput-only ports 40 40 54 p30/sck f general-purpose i/o port also serves as the serial clock i/o. a hysteresis input. 39 39 53 p31/so f general-purpose i/o port also serves as the serial i/o data output. a hysteresis input. (continued )
mb89960 series 10 (continued) *1 : fpt-48p-m05 *2 : fpt-48p-m16, fpt-48p-m13 *3 : mqp-48c-p01 *4 : fpt-64p-m09 pin no. pin name circuit type function mqfp-48* 3 lqfp-48* 1 qfp-48* 2 lqfp-64* 4 38 38 52 p32/si f general-purpose i/o port also serves as the serial i/o data input. a hysteresis input. 37 37 51 p33/ec f general-purpose i/o port also serves as the external clock input for the 8/ 16-bit timer/counter. a hysteresis input. 36 36 46 p34/to/ clk f general-purpose i/o port also serves as the overflow output for the 8/16- bit timer/counter and the clk clock output. a hysteresis input. ? 35 45 c ? connect a 0.1 m f capacitor on the mb89965, mb89p965a, and mb89f969a. 45 to 48 45 to 48 59 to 62 p40/an0 to p43/an3 h general-purpose nch open-drain outputs. also serves as the a/d converter analog inputs. 42 42 56 p44/sda i general-purpose nch open-drain output. also serves as the i 2 c interface data output. 41 41 55 p45/scl i general-purpose nch open-drain output. also serves as the i 2 c interface clock i/o. 779v cc ? power supply pin 19 19 25 v ss ? power supply (gnd) pin 113av cc ? a/d converter power supply pin use this pin at the same voltage as v cc . 44 44 58 avr ? a/d converter reference voltage input pin 43 43 57 av ss ? a/d converter power supply pin use this pin at the same voltage as v ss . 35 ? 15 to 18 31 to 34 47 to 50 63, 64 n.c. ? these pins are not connected. do not connect these on the mb89pv960. ?? 1 test c test pin. connect directly to v ss . only used on the mb89f969a. treat as an n.c. pin on the mb89965. ?? 2mod2c memory access mode setting pin. connect di- rectly to v ss . only used on the mb89f969a. treat as an n.c. pin on the mb89965.
mb89960 series 11 ? pin descriptions for external eprom (mb89pv960 only) pin no. pin name i/o function 49 vpp o h level output pin 50 51 52 53 54 55 a12 a7 a6 a5 a4 a3 o address output pins 58 59 60 a2 a1 a0 o address output pins 61 62 63 o1 o2 o3 i data input pins 64 v ss ? power supply (gnd) pin 65 66 67 68 69 o4 o5 o6 o7 o8 i data input pins 70 ce o rom chip enable pin outputs h during standby mode. 71 a10 o address output pin 73 oe o rom output enable pin always outputs l. 75 76 77 78 79 a11 a9 a8 a13 a14 o address output pins 80 v cc ? eprom power supply pin 56 57 72 74 n.c. ? internally connected pins always leave open circuit.
mb89960 series 12 n n n n i/o circuit type (continued) type circuit remarks a high speed clock (main clock oscillation) ? oscillation feedback resistor b low speed clock (sub-clock oscillation) ? oscillation feedback resistor c ? cmos input d ? output pull-up resistor (pch) approx. 50 k w (at 5 v) ? hysteresis input e ? cmos output ? cmos input ? selectable pull-up resistor approx. 50 k w (at 5 v) nch nch x1 x0 pch pch main clock control signal nch nch nch x1a x0a pch pch sub-clock control signal r pch nch pch pch pull-up port resource nch r
mb89960 series 13 (continued) type circuit remarks f ? cmos output ? hysteresis input ? selectable pull-up resistor approx. 50 k w (at 5 v) g ? cmos output h ? nch-open drain output ? analog input (a/d converter) ? selectable pull-up resistor ? (the pull-up resistor cannot be used when used as an analog input.) approx. 50 k w (at 5 v) i ? nch open drain output ? selectable smb or i 2 c input buffer pch pull-up resource pch nch r pch nch pch pull-up analog input nch r nch smb buffer i 2 c buffer smb input i 2 c input
mb89960 series 14 n n n n handling devices 1. do not exceed maximum rated voltage (to prevent latch-up) latch-up may occur on cmos ics if voltage higher than v cc or lower than v ss is applied to input or output pins other than medium- and high voltage pins or if the voltage applied between v cc and v ss higher the rating. if latch-up occurs, the power supply current increases rapidly resulting in thermal damage to circuit elements. therefore, ensure that maximum ratings are not exceeded in circuit operation. similarly, when turning the analog power supply on or off, ensure the analog power supply voltages (av cc and avr) and analog input voltages do not exceed the digital power supply (v cc ) . 2. power supply voltage fluctuations rapid fluctuation of the voltage may cause the device to misoperate, even if the voltage remains within the allowed operating range. the standard for power supply voltage stability is a peak-to-peak v cc ripple voltage at the mains supply frequency (50 to 60 hz) of 10 % or less of v cc and a transient voltage change rate of 0.1 v/ms or less such as when turning the power supply on or off. 3. treatment of unused input pins leaving unused input pins unconnected can cause misoperation or permanent damage to the device due to latchup. always pull-up or pull-down unused input pins using a 2 k w or larger resistor. if some i/o pins are unused, either set as outputs and leave open circuit or set as inputs and treat in the same way as input pins. 4. treatment of n.c. pins always leave n.c. (internally connected) pins open. 5. treatment of power supply pins on microcontrollers with an a/d converter even if not using the a/d converter, connect to be av cc = v cc and av ss = avr = v ss . 6. precautions on using an external clock an oscillation stabilization delay occurs after a power-on reset or when recovering from sub-clock or stop mode, even if an external clock is used.
mb89960 series 15 n n n n programming specifications for one-time prom products the mb89p965a has a prom mode that enables the microcontroller to be programmed using a general- purpose rom programmer via a special adaptor. note, however, that electronic signature mode is not available. 1. rom programmer adaptor and recommended rom writers ? enquiries sun hayato co. ltd. : tel 03-3986-0403 ando denki co. ltd. : tel 044-549-7300 2. prom mode memory map 3. prom programming procedure (when using an ando eprom programmer) 1) set the eprom programmer type code to 17209. 2) load the program data into addresses 0000 h to 3fff h in the eprom programmer. 3) use the eprom programmer to program to addresses c000 h to ffff h . 4. programming yield due to the nature of otprom memory, a program test to all bits on a blank otprom microcontroller cannot be performed at fujitsu. for this reason, a programming yield of 100 % cannot be assured at all times. package name adaptor part no. recommended programmer manufacturer and model sun hayato co. ltd. ando denki co. ltd. fpt-48p-m05 rom2-48lqf-32dp-8la af9708 (ver 1.44 or later) af9709 (ver 1.44 or later) fpt-48p-m13 rom2-48qf2-32dp-8la fpt-48p-m16 rom2-48qf-32dp-8la 0000 h 3fff h 0000 h ffff h ram prom mode (addresses on rom programmer) not available program area (prom) program area (prom) general- purpose registers i/o normal operating mode 0080 h 0280 h c000 h 0200 h 0100 h
mb89960 series 16 n n n n programming and erasing flash memory on the mb89f969a 1. flash memory the flash memory is located between 1000 h and ffff h in the cpu memory map and incorporates a flash memory interface circuit that allows read access and program access from the cpu to be performed in the same way as mask rom. programming and erasing flash memory is also performed via the flash memory interface circuit by executing instructions in the cpu. this enables the flash memory to be updated in place under the control of the cpu, providing an efficient method of updating program and data. 2. flash memory features ? 60 k byte 8-bit configuration (16 k + 8 k + 8 k + 28 k sectors) ? automatic programming algorithm (embedded algorithm* : equivalent to mbm29lv200) ? includes an erase pause and restart function ? data polling and toggle bit for detection of program/erase completion ? detection of program/erase completion via cpu interrupt ? compatible with jedec-standard commands ? sector protection (sectors can be combined in any combination) ? no. of program/erase cycles : 10,000 (min.) embedded algorithm is a trademark of advanced micro devices. 3. procedure for programming and erasing flash memory programming and reading flash memory cannot be performed at the same time. accordingly, to program or erase flash memory, the program must first be copied from flash memory to ram so that programming can be performed without program access from flash memory. 4. flash memory register ? control status register (fmcs) 5. sector configuration the table below shows the sector configuration of flash memory and lists the addresses of each sector for both during cpu access a flash memory programming. ? sector configuration of flash memory * : programmer address the programmer address is the address to be used instead of the cpu address when programming data from a parallel flash memory programmer. use the programmer address on programming or erasing using a general- purpose parallel programmer. flash memory cpu address programmer address 16 k bytes ffff h to c000 h 1ffff h to 1c000 h 8 k bytes bfff h to a000 h 1bfff h to 1a000 h 8 k bytes 9fff h to 8000 h 19fff h to 18000 h 28 k bytes 7fff h to 1000 h 17fff h to 11000 h r r/w r/w rdy bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 002e h address 000x00-0 b initial value reserved reserved ? reserved r/w ? r/w r/w r/w inte rdyint we
mb89960 series 17 6. rom programmer adaptor and recommended rom programmers ? enquiries sun hayato co. ltd. : tel 03-3986-0403 ando denki co. ltd. : tel 044-549-7300 package name adaptor part no. recommended programmer manufacturer and model sun hayato co. ltd. ando denki co. ltd. fpt-64p-m09 flash-64qf2-32dp-8lf af9708 (ver 1.60 or later) af9709 (ver 1.60 or later)
mb89960 series 18 n n n n programming a piggyback/evaluation eprom 1. eprom type mbm27c256a-20tvm 2. programming adaptor use the following programming adaptor (made by sun hayato co. ltd.) to program the eprom using a rom programmer. ? programming adaptor enquiries sun hayato co. ltd. : tel03-3986-0403 3. memory space 4. eprom programming procedure (1) setup the eprom programmer to the mbm27c256a. (2) load the program data into addresses 0000 h to 7fff h in the eprom programmer. (3) use the rom programmer to program to addresses 0000 h to 7fff h . package adaptor socket part no. lcc-32 (square) rom-32lc-28dp-s 0000 h 7fff h 0000 h ffff h ram i/o not available program area (prom) eprom mode (addresses on rom programmer) program area (prom) normal operating mode 0080 h 8000 h 0280 h
mb89960 series 19 n n n n block diagram f 2 mc-8l r a m mod0, mod1, vcc, vss, c other pins rst p00/int20 to p07/int27 r o m p32/si p34/to/clk c p u p33/ec p31/so p30/sck p44/sda p45/scl x0 main clock sub-clock clock control timebase timer reset circuit (watchdog timer) 16-bit timer/counter 8-bit timer/counter 2 8-bit timer/counter 1 8-bit serial i/o 10-bit a/d converter i 2 c interface nch open drain output port cmos i/o port clock prescaler external interrupt 2 (level) external interrupt 1 (edge) cmos i/o port cmos i/o port cmos output port port 0 port 3 port 4 internal data bus port 1 port 2 low speed oscillator circuit (32.768 khz) high speed oscillator circuit (max. 10 mhz) x1 8 p13 to p17 3 x0a x1a p20 to p27 8 3 8 4 4 avr av cc av ss 5 p10/int10 to p12/int12 p40/an0 ~ p43/an3
mb89960 series 20 n n n n cpu core 1. memory space (1) structure of memory space ? i/o area (address : 0000 h to 007f h ) ? assign the control registers, data registers, and similar of the internal peripheral functions. ? as the i/o area is allocated as part of the memory space, it can be accessed in the same way as memory. direct addressing also provides high speed access. ? ram area ? static ram is provided as an internal data area. ? the size of internal ram differs between products. ? addresses 80 h to ff h provide high speed access using direct addressing. ? addresses 100 h to 1ff h are used as the general-purpose register area. ? the initial value of ram after a reset is undefined. ? rom area ? rom memory is provided as the internal program area. ? the size of internal rom differs between products. ? addresses ffc0 h to ffff h are used for the vector table and similar. (2) memory map 0000 h 0080 h 0100 h 8000 h mb89pv960 i/o ram rom vector table (reset, interrupt, vector call instruction) 0000 h 0080 h 0100 h 0200 h c000 h ffff h mb89965 mb89p965a i/o ram rom ffff h 0280 h 0200 h 0480 h ffc0 h ffc0 h 0000 h 0080 h 0100 h 1000 h mb89f969a i/o ram not available not available not available registers registers registers rom ffff h 0200 h 0480 h ffc0 h
mb89960 series 21 2. registers the mb89960 series provides two types of registers: dedicated registers in the cpu and general-purpose registers. the dedicated registers are as follows. the upper 8 bits of the ps contain the register bank pointer (rp) and the lower 8 bits contain the condition code register (ccr) . (see the diagram below.) program counter (pc) : a 16-bit register for indicating the instruction storage positions. accumulator (a) : a 16-bit register that provides temporary storage for arithmetic operations and similar. instructions that operate on 8-bit data use the lower byte. temporary accumulator (t) : a 16-bit register used for arithmetic operations with the accumulator. instructions that operate on 8-bit data use the lower byte. index register (ix) : a 16-bit register used for index modification. extra pointer (ep) : a 16-bit pointer used for indicating a memory address . stack pointer (sp) : a 16-bit register used for indicating a stack area. program status (ps) : a 16-bit register used to store a register pointer and condition code. ps 16 bits initial value pc a t ix ep sp : program counter : accumulator : temporary accumulator : index register : extra pointer : stack pointer rp ccr : program status fffd h undefined undefined undefined undefined undefined i flag = 0, il1, il0 = 11 other bits are undefined ps x : undefined half carry flag interrupt enable flag interrupt level bits negative flag zero flag overflow flag carry flag rp ccr x011xxxx b ccr initial value bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 r4 r3 r2 r1 r0 --- h i il1 il0 n z v c
mb89960 series 22 the rp contains the address of the currently used register bank. the conversion diagram below shows the relationship between the rp value and actual address. ccr contains bits that indicate the result of an arithmetic operation or information about transfer data and bits used to control cpu operation when an interrupt occurs. h-flag : set to 1 when a carry from bit 3 to bit 4 or a borrow from bit 4 to bit 3 occurs as a result of an arithmetic operation. cleared to 0 otherwise. this flag is for decimal adjustment instructions and should be ignored for operations other than addition and subtraction. i-flag : interrupts are enabled when this flag is set to 1 and disabled when the flag is set to 0. cleared to 0 by a reset. il1, 0 : indicates the level of interrupts currently allowed. the cpu only processes interrupts with a re- quest level higher than the value indicated by these bits. il1 il0 interrupt level priority 00 1 high low = no interrupt 01 10 2 11 3 n-flag : set to 1 when the msb of the result of an arithmetic operation is 1 and cleared to 0 when the msb is 0. z-flag : set to 1 when the result of an arithmetic operation is zero. cleared to 0 otherwise v-flag : set to 1 when a 2s complement overflow occurs as the result of an arithmetic operation. cleared to 0 if no 2s complement overflow occurs. c-flag : set to 1 when a carry from bit 7 or a borrow to bit 7 occurs as the result of an arithmetic opera- tion. cleared to 0 otherwise. set to the shift-out value in the case of a shift instruction. "0" "0" "0" "0" "0" "0" "0" "1" r4 r3 r2 r1 r0 b2 b1 b0 a7 a6 a5 a4 a3 a2 a1 upper (rp) lower (op code) a0 a15 actual address a14 a13 a12 a11 a10 a9 a8 rules for converting of actual addresses of the general-purpose register area
mb89960 series 23 the following general-purpose registers are provided : general-purpose registers : 8-bit resisters for storing data the general-purpose registers are 8-bit registers and are allocated in the register banks of the memory. each bank contains 8 registers and all 32 banks can be used on mb89960 series microcontrollers. the register bank pointer (rp) specifies the bank that is currently in use. r0 address = 0100 h + 8 (rp) r1 r2 r3 r4 r5 r6 r7 memory area 32 banks register bank structure
mb89960 series 24 n n n n i/o map (continued) address abbreviation register name read/write initial value 00 h pdr0 port 0 data register r/w xxxxxxxx b 01 h ddr0 port 0 direction register w 0 0 0 0 0 0 0 0 b 02 h pdr1 port 1 data register r/w xxxxxxxx b 03 h ddr1 port 1 direction register w 0 0 0 0 0 0 0 0 b 04 h pdr2 port 2 data register r/w 0 0 0 0 0 0 0 0 b 05 h (unused area) 06 h 07 h sycc system clock control register r/w x - - mm1 0 0 b 08 h stbc standby control register r/w 0 0 0 1 0 - - - b 09 h wdtc watchdog control register r/w 0 - - - xxxx b 0a h tbtc timebase timer control register r/w 0 0 - - - 0 0 0 b 0b h wpcr clock prescaler control register r/w 0 0 - - - 0 0 0 b 0c h pdr3 port 3 data register r/w - - -xxxxx b 0d h ddr3 port 3 direction register r/w - - 0 0 0 0 0 0 b 0e h pdr4 port 4 data register r/w - - 1 1 1 1 1 1 b 0f h (unused area) 10 h ibsr i 2 c bus status register r 0 0 0 0 0 0 0 0 b 11 h ibcr i 2 c bus control register r/w 0 0 0 1 1 0 0 0 b 12 h iccr i 2 c clock control register r/w 0 0 0xxxxx b 13 h iadr i 2 c address register r/w - xxxxxxx b 14 h idar i 2 c data register r/w xxxxxxxx b 15 h (unused area) 16 h 17 h 18 h t2cr timer 2 control register r/w x0 - - xxx0 b 19 h t1cr timer 1 control register r/w x0 0 0xxx0 b 1a h t2dr timer 2 data register r/w xxxxxxxx b 1b h t1dr timer 1 data register r/w xxxxxxxx b 1c h smr serial mode register r/w 0 0 0 0 0 0 0 0 b 1d h sdr serial data register r/w xxxxxxxx b 1e h (unused area) 1f h 20 h adc1 a/d control register 1 r/w 0 0 0 0 0 0 - 0 b 21 h adc2 a/d control register 2 r/w - 0 0 0 0 0 0 1 b 22 h addh a/d data register h r/w - - - - - - xx b
mb89960 series 25 (continued) ? read/write notation ? initial value notation note : do not use the unused areas. address abbreviation register name read/write initial value 23 h addl a/d data register l r/w xxxxxxxx b 24 h eic1 external interrupt 1 control register 1 r/w 0 0 0 0 0 0 0 0 b 25 h eic2 external interrupt 1 control register 2 r/w - - - - 0 0 0 0 b 26 h to 27 h (unused area) 28 h purr1 pull-up resistor register 1 (mb89965, p965a, and f969a only) r/w 1 1 1 1 1 1 1 1 b 29 h purr2 pull-up resistor register 2 (mb89965, p965a, and f969a only) r/w 1 1 1 1 1 1 1 1 b 2a h purr3 pull-up resistor register 3 (mb89965, p965a, nd f969a only) r/w xxx1 1 1 1 1 b 2b h purr4 pull-up resistor register 4 (mb89965, p965a, and f969a only) r/w xxxx1 1 1 1 b 2c h to 31 h (unused area) 32 h eie2 external interrupt 2 control register r/w 0 0 0 0 0 0 0 0 b 33 h eif2 external interrupt 2 flag register r/w - - - - - - - 0 b 34 h to 7b h (unused area) 7c h ilr1 interrupt level setting register 1 w 1 1 1 1 1 1 1 1 b 7d h ilr2 interrupt level setting register 2 w 1 1 1 1 1 1 1 1 b 7e h ilr3 interrupt level setting register 3 w 1 1 1 1 1 1 1 1 b 7f h itr interrupt test register not available xxxxxx0 0 b r/w : reading and writing available r : read-only w : write-only 0 : initial value of bit is 0. 1 : initial value of bit is 1. x : initial value of bit is undefined. m : initial value of bit is specified by mask option. - : bit is not used.
mb89960 series 26 n n n n electrical characteristics 1. absolute maximum ratings (av ss = v ss = 0.0 v) * : set av cc to the same potential as v cc . also ensure that av cc does not exceed v cc at power on. warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. parameter symbol rating unit remarks min. max. power supply voltage v cc av cc v ss - 0.3 v ss + 6.0 v* avr v ss - 0.3 v ss + 6.0 input voltage v i v ss - 0.3 v cc + 0.3 v pins other than p44 and p55 v ss - 0.3 v ss + 6.0 pins p44 and p45 output voltage v o v ss - 0.3 v cc + 0.3 v pins other than p44 and p55 v ss - 0.3 v ss + 6.0 pins p44 and p45 l level maximum output current i ol ? 15 ma l level average output current i olav ? 4ma average value (operating cur- rent operating ratio) l level total maximum output current s i ol ? 100 ma l level total average output current s i olav ? 40 ma average value (operating cur- rent operating ratio) h level maximum output current i oh ?- 15 ma h level average output current i ohav ?- 4ma average value (operating cur- rent operating ratio) h level total maximum output current s i oh ?- 50 ma h level total average output current s i ohav ?- 20 ma average value (operating cur- rent operating ratio) power consumption p d ? 300 mw ? 450 mb89f969a only operating temperature t a - 40 + 85 c storage temperature tstg - 55 + 150 c
mb89960 series 27 2. recommended operating conditions (av ss = v ss = 0.0 v) * : differs depending on the operating frequency and analog guaranteed range. see the figure below and 5. electrical characteristics for the a/d converter. the figure above shows the frequency of the external oscillator when the instruction cycle setting is 4/f c . as the operating voltage depends on the instruction cycle, change to the new instruction cycle value if using the gear function to change the operating speed. warning: the recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. all of the devices electrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating condition ranges. operation outside these ranges may adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their fujitsu representatives beforehand. parameter symbol value unit remarks min. max. power supply voltage v cc av cc 3.5* 5.5* v normal operation guaranteed range (mb89965/p965a/f969a) 3.0 5.5 v to maintain ram state in stop mode (mb89965/p965a/f969a) 2.7* 5.5* v normal operation guaranteed range (mb89pv960) 1.5 5.5 v to maintain ram state in stop mode (mb89pv960) avr 3.5 av cc v operating temperature t a - 40 + 85 c 6 5 4 3 2 3.5 2.7 12345 operating frequency (mhz) operation guaranteed range analog accuracy guaranteed range : v cc = av cc = 3.5 v to 5.5 v : mb89pv960 operating voltage (v) 678910 : mb89965, mb89p965a, and mb89f969a operating voltage - operating frequency
mb89960 series 28 3. dc characteristics (av cc = v cc = 5.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) (continued) parameter sym- bol pin name condition value unit remarks min. typ. max. h level input voltage v ih p00 to p07, p10 to p17, p30 to p34 ? 0.7 v cc ? v cc + 0.3 v v ihs rst , int20 to int27 , int10 to int12, si, sck, ec, test ? 0.8 v cc ? v cc + 0.3 v v ihm mod0/1/2 ? v cc - 0.3 ? v cc + 0.3 v mod pin input v ihsmb scl, sda ? v ss + 1.4 ? v ss + 5.5 v when smb selected v ihi2c 0.7 v cc ? v ss + 5.5 v when i 2 c selected l level input voltage v il p00 to p07, p10 to p17, p30 to p34 ? v ss - 0.3 ? 0.3 v cc v v ils rst , int20 to int27 , int10 to int12, si, sck, ec, test ? v ss - 0.3 ? 0.2 v cc v v ilm mod0/1/2 ? v ss - 0.3 ? v ss + 0.3 v mod pin input v ilsmb scl, sda ? v ss - 0.3 ? v ss + 0.6 v when smb selected v ili2c v ss - 0.3 ? 0.3 v cc v when i 2 c selected voltage applied to open drain output pins v d p40 to p45 ? v ss - 0.3 ? v cc + 0.3 v h level output voltage v oh p00 to p07, p10 to p17, p20 to p27, p30 to p34 i oh = - 2.0 ma 4.0 ?? v l level output voltage v ol p00 to p07, p10 to p17, p20 to p27, p30 to p34, p40 to p45, rst i ol = 4.0 ma ?? 0.4 v
mb89960 series 29 (av cc = v cc = 5.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) (continued) parameter sym- bol pin name condition value unit remarks min. typ. max. input leak current i li p00 to p07, p10 to p17, p20 to p27, p30 to p34, p40 to p45 0 v < v i < v cc - 5 ?+ 5 m a without pull- up resistor option mod0/1/2, test - 10 ?+ 10 open-drain output leak current i liod p40 to p45 0 v < v i < v ss + 5.5 v ??+ 5 m a pull-up resistance r pull p00 to p07, p10 to p17, p20 to p27, p30 to p34, p40 to p45, rst v i = 0.0 v 25 50 100 w with pull-up resistor option power supply current* 1 i cc1 v cc (when using an external clock) f ch = 10.0 mhz t inst * 2 = 0.4 m s main run mode ? 10 20 ma mb89pv960 ? 47 mb89965 mb89p965a ? 5 8 mb89f969a i cc2 f ch = 10.0 mhz t inst * 2 = 6.4 m s main run mode ? 38 ma mb89pv960 ? 13 mb89965 mb89p965a mb89f969a i ccs1 f ch = 10.0 mhz t inst * 2 = 0.4 m s main sleep mode ? 38 ma mb89pv960 ? 24 mb89965 mb89p965a mb89f969a
mb89960 series 30 (continued) (av cc = v cc = 5.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) *1 : the power supply current values are for an external clock. *2 : see (4) instruction cycle in 4. ac characteristics. parameter sym- bol pin name condition value unit remarks min. typ. max. power supply current* 1 i ccs2 v cc (when using an external clock) f ch = 10.0 mhz t inst * 2 = 6.4 m s main sleep mode ? 13ma i ccl f ch = 32.768 khz sub run mode ? 70 150 m a mb89pv960 ? 20 100 mb89965 ? 0.3 1 ma mb89p965a mb89f969a i ccls f ch = 32.768 khz sub sleep mode ? 10 50 m a i cct f ch = 32.768 khz clock mode, main stop mode ? 515 m a i cch t a = + 25 c sub stop mode ? 110 m a mb89pv960 ? 510 mb89965 mb89p965a mb89f969a input capacitance c in except av cc , av ss , v cc , and av ss f = 1 mhz ? 10 ? pf
mb89960 series 31 4. ac characteristics (1) reset timing (v cc = 5.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) * : t hcyl is the period (1/f c ) of the oscillation input to x0. (2) power-on reset (av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) note : ensure that the power supply rising time is less than the selected oscillation stabilization delay time. for example, if the main clock frequency f c = 10 mhz and 2 14 /f c is selected as the oscillation stabilization delay time, the resulting oscillation stabilization delay time is 1.6 ms. as rapid changes in the power supply voltage may cause a power-on reset, if you need to change the power supply voltage while the device is operating, ensure that the power supply voltage changes smoothly. parameter symbol condition value unit remarks min. max. rst l pulse width t zlzh ? 48 t hcyl * ? ns parameter symbol condition value unit remarks min. max. power supply rising time t r ? 0.5 50 ms power supply cutoff time t off ? 1 ? ns for repeated operation 0.2 v cc 0.2 v cc t zlzh rst 0.2 v 2.0 v 0.2 v 0.2 v t off v cc t r
mb89960 series 32 (3) clock timings (av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) parameter symbol pin name value unit remarks min. typ. max. clock frequency f ch x0, x1 1 ? 10 mhz main clock f cl x0a, x1a ? 32.768 ? khz sub clock clock cycle time t hcyl x0, x1 100 ? 1000 ns main clock t lcyl x0a, x1a ? 30.5 ?m s sub clock input clock pulse width p wh p wl x0 20 ?? ns external clock p whl p wll x0a ? 15.2 ?m s external clock input clock rising/falling time t cr t cf x0 ?? 10 ns external clock 0.2 v cc 0.2 v cc 0.8 v cc 0.8 v cc 0.2 v cc p wh t hcyl t cr t cf p wl x0 x0 x1 when using a crystal oscillator or ceramic oscillator when using an external clock x0 x1 open circuit f ch c 1 c 2 f ch x0 and x1 clock timing and input conditions clock configurations
mb89960 series 33 (4) instruction cycle (av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) parameter symbol value unit remarks instruction cycle (minimum instruction execution time) t inst 4/f ch , 8/f ch , 16/f ch , 64/f ch m s f ch = 10 mhz (4/f ch ) operation time t inst = 0.4 m s 2/f cl f cl = 32.768 khz operation time t inst = 61.036 m s 0.2 v cc 0.2 v cc 0.8 v cc 0.8 v cc 0.2 v cc p whl t lcyl t cr t cf p wll x0a x0a x1a x0a x1a f cl c 1 c 2 f cl when using a crystal oscillator or ceramic oscillator when using an external clock open circuit x0a and x1a clock timing conditions sub clock configuration
mb89960 series 34 (5) serial i/o timings (v cc = 5.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) * : see (4) instruction cycle for a definition of t inst . parameter sym- bol pin name condition value unit remarks min. max. serial clock cycle time t scyc sck internal clock operation 2 t inst * ?m s sck ? so delay time t slov sck, so - 200 200 ns valid si ? sck - t ivsh sck, si 200 ? ns sck - ? valid si hold time t shix sck, si 200 ? ns serial clock h pulse width t shsl sck external clock operation t inst * ?m s serial clock l pulse width t slsh sck t inst * ?m s sck ? so delay time t slov sck, so 0 200 ns valid si ? sck t ivsh sck, si 200 ?m s sck - ? valid si hold time t shix sck, si 200 ?m s 0.2 v cc 0.8 v cc 0.8 v cc 0.8 v cc 0.2 v cc 0.2 v cc t scyc t slov t ivsh t shix sck so si 0.2 v cc 0.8 v cc 0.2 v cc 0.2 v cc 0.2 v cc 0.8 v cc 0.8 v cc 0.8 v cc 0.8 v cc 0.2 v cc t slsh t shsl t slov t ivsh t shix sck so si 0.2 v cc 0.8 v cc 0.2 v cc external shift clock mode internal shift clock mode
mb89960 series 35 (6) peripheral input timings (v cc = 5.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) * : see (4) instruction cycle for a definition of t inst . parameter symbol pin name value unit remarks min. max. peripheral input h pulse width t ilih int10 to int12, int20 to int27 , ec 2 t inst * ?m s peripheral input l pulse width t ihil 2 t inst * ?m s 0.2 v cc 0.8 v cc 0.8 v cc 0.2 v cc t ilih t ihil int10 ~ int12, int20 ~ int27, ec
mb89960 series 36 j (7) i 2 c timings (v cc = 5.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) *1: see (4) instruction cycle for a definition of t inst . *2: m is the value set in the iccr : cs4 and cs3 bits (bits 4 to 3) . *3: n is the value set in the iccr : cs2 to cs0 bits (bits 2 to 0) . parameter sym bol pin value unit remarks min. max. start condition output t sta scl sda 1/4t inst * 1 m* n* 3 - 20 1/4t inst * 1 m* 2 n* 3 + 20 ns master mode stop condition output t sto scl sda 1/4t inst * 1 (m* 2 n* 3 + 8) - 20 1/4t inst * 1 (m* 2 n* 3 + 8) + 20 ns master mode start condition detect t sta scl sda 1/4t inst * 1 6 + 40 ? ns stop condition detect t sto scl sda 1/4t inst * 1 6 + 40 ? ns restart condition out- put t stasu scl sda 1/4t inst * 1 (m* 2 n* 3 + 8) - 20 1/4t inst * 1 (m* 2 n* 3 + 8) + 20 ns master mode restart condition de- tect t stasu scl sda 1/4t inst * 1 4+40 ? ns scl output l width t low scl 1/4t inst * 1 m* 2 n* 3 - 20 1/4t inst * 1 m* 2 n* 3 + 20 ns master mode scl output h width t high scl 1/4t inst * 1 (m* 2 n* 3 + 8) - 20 1/4t inst * 1 (m* 2 n* 3 + 8) + 20 ns master mode sda output delay t do sda 1/4t inst * 1 4 - 20 1/4t inst * 1 4 + 20 ns sda output setup time after interrupt t dosu sda 1/4t inst * 1 4 - 20 ? ns scl input l pulse width t low scl 1/4t inst * 1 6 + 40 ? ns scl input h pulse width t high scl 1/4t inst * 1 2 + 40 ? ns sda input setup time t su sda 40 ? ns sda hold time t ho sda 0 ? ns sda scl sda scl 1 67 8 9 9 t do t do t su t su t high t low t ho t do t do t dosu t sto t ho t dosu t stasu t sta t low t ho ack ack ? data transmit (master/slave) ? data receive (master/slave)
mb89960 series 37 5. electrical characteristics for the a/d converter (avcc = 3.5 v to 5.5 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) *1 : see (4) instruction cycle for a definition of t inst . *2 : includes sampling time. parameter sym bol pin condition value unit remarks min. typ. max. resolution ? ? ??? 10 bit total error avr = a vcc - 5.0 ?+ 5.0 lsb non-linearity error - 2.5 ?+ 2.5 lsb differential linearity error - 1.9 ?+ 1.9 lsb zero transition voltage v ot avr - 3.5 lsb avr + 0.5 lsb avr + 4.5 lsb mv full-scale transition voltage v fst v cc - 6.5 lsb v cc - 1.5 lsb v cc + 1.5 lsb mv variation between channels ??? 4lsb a/d mode conversion time* 2 ? ? ? 60 t inst * 1 ?m s mb89965 mb89p965a mb89f969a ? 38 t inst * 1 ?m s mb89pv960 a/d sampling time ? 16 t inst * 1 ?m s analog input current i ain an0 to an3 ?? 10 m a analog input voltage range v ain av ss ? avr v power supply current i a a vcc a/d operation ? 1.5 3 ma i ah t a = + 25 c a/d stop ? 15 m a reference voltage ? avr ? av ss + 3.5 ? av cc v reference voltage supply current i r a/d operation ? 400 ?m a i rh a/d stop ?? 5 m a
mb89960 series 38 6. a/d converter glossary ? resolution the change in analog voltage that can be recognized by the a/d converter. ? linearity error (unit : lsb) the deviation between the actual conversion characteristics and the line linking the zero transition point (00 0000 0000 b ?? 00 0000 0001 b ) and the full scale transition point (11 1111 1110 b ?? 11 1111 1111 b ) . ? differential linearity error (unit : lsb) the variation from the ideal input voltage required to change the output code by 1 lsb. ? total error (unit : lsb) the total error is the difference between the actual value and the theoretical value. 3ff h 3fe h 3fd h 004 h 003 h 002 h 001 h av ss avr v ot 0.5 lsb 1 lsb theoretical i/o characteristics analog input digital output 1.5 lsb v fst 1 lsb = (v) v fst - v ot 1022 3ff h 3fe h 3fd h 004 h 003 h 002 h 001 h av ss avr v nt {1 lsb n + 0.5 lsb} actual conversion characteristic actual conversion characteristic theoretical characteristic total error analog input digital output v nt - {1 lsb n + 0.5 lsb} 1 lsb total error for digital output n =
mb89960 series 39 004 h 003 h 002 h 001 h av ss actual conversion characteristic actual conversion characteristic v ot (actual measured value) zero transition error analog input digital output 3ff h 3fe h 3fd h 3fc h avr theoretical characteristic actual conversion characteristic (actual measured value) actual conversion characteristic full scale transition error analog input digital output v fst 3ff h 3fe h 3fd h 004 h 003 h 002 h 001 h av ss v nt avr {1 lsb n + v ot } actual conversion characteristic v fst (actual measured value) actual conversion characteristic theoretical characteristic v ot (actual measured value) linearity error analog input digital output v nt - {1 lsb n + v ot } 1 lsb linearity error of digital output n = n + 1 n n - 1 n - 2 av ss avr v nt theoretical characteristic actual conversion characteristic actual conversion characteristic v (n + 1) t differential linearity error analog input digital output differential linearity error of digital output n = - 1 v (n + 1) t - v nt 1 lsb
mb89960 series 40 7. notes for a/d conversion ? analog input pins and input impedance the a/d converter incorporates a sample & hold circuit as shown below. when an a/d conversion starts, the voltage at the analog input pin is captured by the sample & hold capacitor for a period of 16 instruction cycles. accordingly, if the output impedance of the external circuit connected to the analog input is high, the analog input voltage may not stabilize within the period of the analog input sampling time. therefore, ensure that the output impedance of the external circuit is sufficiently low (10 k w or less) . if it is not possible to reduce the output impedance of the external circuit, connecting an external capacitor of approximately 0.1 m f is recommended. ? error the relative error increases as |avr - av ss | becomes smaller. an0 to an3 sample & hold circuit comparator controller r analog channel selector closed for approximately 16 instruction cycles after initiating a/d conversion. mb89965 mb89p965a mb89f969a r = 3.2 k w , c = 30 pf approx r = 1.4 k w , c = 64 pf approx. mb89960 series mb89pv960 c equivalent circuit of analog input
mb89960 series 41 8. electrical characteristics of flash memory ? programming and erasing characteristics *1 : automatic algorithm executing *2 : if a fault occurs during sector erasing, detection via dq 5 may not be available (dq 5 = 1 may not occur) . accordingly, a fault must be assumed after 15 s, even if dq 5 does not go to 1. parameter sym bol pin name condition value unit remarks min. typ. max. power supply current* 1 i fwe v cc v cc = 5.0 v ?? 40 ma sector erasing time fixed time per sector regardless of size successful completion time ?? ? ? 115s unsuccess- ful comple- tion time ?? *2 ? programming time per byte successful completion time ?? ? ? 8 3600 m s unsuccess- ful comple- tion time ? 650 3600 m s
mb89960 series 42 n n n n mask options f ch : frequency of main clock oscillation * : this specifies the initial value after a reset of the oscillation stabilization delay time setting bits in the system clock control register (sycc : wt1, wt0) n n n n ordering infomation no part no. mb89965 mb89p965a/ mb89f969a mb89pv960 specifying procedure specify when ordering mask not available not available 1 initial value* selection for main clock oscillation stabilization delay time (f ch = 10 mhz) 01 : 2 12 /f ch (0.4 ms approx.) 10 : 2 16 /f ch (6.6 ms approx.) 11 : 2 18 /f ch (26.2 ms approx.) selectable 2 18 /f ch (26.2 ms approx.) 2 18 /f ch (26.2 ms approx.) part number package remarks mb89965pfv1 MB89P965APFV1 mb89965cpfv1 plastic lqfp, 48-pin (fpt-48p-m05) the mb89965pfv1 does not have an i 2 c function. mb89965pfm mb89p965apfm mb89965cpfm plastic qfp, 48-pin (fpt-48p-m13) the mb89965pfm does not have an i 2 c function. mb89965pf mb89p965apf mb89965cpf plastic qfp, 48-pin (fpt-48p-m16) the mb89965pf does not have an i 2 c function. mb89f969apfm plastic lqfp, 64-pin (fpt-64p-m09) mb89pv960cf ceramic mqfp, 48-pin (mqp-48c-p01)
mb89960 series 43 n n n n package dimensions (these package dimensions are provisional. please obtain the actual dimensions of the final product separately.) plastic lqfp, 48-pin (fpt-48p-m05) note : the pin width and thickness includes plating. dimensions in mm (inches). c 2000 fujitsu limited f48013s-c-4-8 24 13 36 25 48 37 index 7.00?.10(.276?004)sq 9.00?.20(.354?008)sq 0.145?.055 (.006?002) 0.08(.003) "a" 0?8 .059 ?004 +.008 ?.10 +0.20 1.50 0.50?.20 (.020?008) 0.60?.15 (.024?006) 0.10?.10 (.004?004) (stand off) 0.25(.010) details of "a" part 1 12 0.08(.003) m (.008?002) 0.20?.05 0.50(.020) lead no. (mounting height)
mb89960 series 44 plastic qfp, 48-pin (fpt-48p-m13) dimensions in mm (inches). c 2000 fujitsu limited f48023s-1c-2 details of "a" part 13.10?.40 0.30?.10 (.012?004) 0.16(.006) m 11.50?.30 8.80 (.453?012) (.346) ref index details of "b" part 12 1 25 36 37 24 13 48 0.80(.0315)typ lead no. (.516?016) sq (.394?008) 10.00?.20 sq "a" 0.15?.05 (.006?002) 0.15(.006) 0.20(.008) 0.53(.021)max 0.18(.007)max 0~10 0.80?.30 (.031?012) "b" (stand off) 0(0)min 2.35(.093)max (mounting height) 0.10(.004)
mb89960 series 45 plastic qfp, 48-pin (fpt-48p-m16) dimensions in mm (inches). c 2000 fujitsu limited f48026s-1c-2 details of "a" part 17.20?.40 0.30?.06 (.012?002) 0.16(.006) m 13.60?.40 8.80 (.535?016) (.346) ref 0.15(.006) index details of "b" part 12 1 25 36 37 24 13 48 0.80(.0315)typ lead no. (.677?016) sq sq "a" 0.15(.006) 0.20(.008) 0.50(.020)max 0.15(.006)max 0~10 1.80?.30 (.071?012) "b" (stand off) 0.05(.002)min .472 ?004 +.012 ?.10 +0.30 12.00 .006 ?0004 +.002 ?.01 +0.05 0.15 2.70(.106)max (mounting height)
mb89960 series 46 ceramic mqfp, 48-pin (mqp-48c-p01) dimensions in mm (inches). C.010 +.018 C0.25 +0.45 +0.13 C0.0 +.005 C0 pin no.1 index 1.50(.059)typ 1.00(.040)typ 8.80(.346)ref (.0315.0087) 0.800.22 (.016.003) 0.400.08 .043 1.10 0.60(.024)typ 8.50(.335)max (.006.002) 0.150.05 pad no.1 index 4.50(.177)typ 0.30(.012)typ typ typ 8.71(.343) 7.14(.281) (.040.005) 1.020.13 10.92 .430 pin no.1 index 17.20(.677)typ (.591.010) 15.000.25 (.583.014) 14.820.35 1994 fujitsu limited m48001sc-4-2 c
mb89960 series 47 plastic lqfp, 64-pin (fpt-64p-m09) dimensions in mm (inches). c 2000 fujitsu limited f64018s-1c-3 0.13(.005) m 1 pin index .005 ?001 +.002 ?.02 +0.05 0.127 .059 ?004 +.008 ?.10 +0.20 1.50 "a" details of "a" part 0 10 0.50?.20 0.10?.10 (.004?004) (.020?008) 14.00?.20(.551?008)sq 12.00?.10(.472?004)sq 0.65(.0256)typ 0.30?.10 (.012?004) 9.75 13.00 (.384) ref (.512) nom 116 17 32 33 48 49 64 (stand off) lead no. (mounting height) 0.10(.004)
mb89960 series fujitsu limited for further information please contact: japan fujitsu limited corporate global business support division electronic devices shinjuku dai-ichi seimei bldg. 7-1, nishishinjuku 2-chome, shinjuku-ku, tokyo 163-0721, japan tel: +81-3-5322-3347 fax: +81-3-5322-3386 http://edevice.fujitsu.com/ north and south america fujitsu microelectronics, inc. 3545 north first street, san jose, ca 95134-1804, u.s.a. tel: +1-408-922-9000 fax: +1-408-922-9179 customer response center mon. - fri.: 7 am - 5 pm (pst) tel: +1-800-866-8608 fax: +1-408-922-9179 http://www.fujitsumicro.com/ europe fujitsu microelectronics europe gmbh am siebenstein 6-10, d-63303 dreieich-buchschlag, germany tel: +49-6103-690-0 fax: +49-6103-690-122 http://www.fujitsu-fme.com/ asia pacific fujitsu microelectronics asia pte. ltd. #05-08, 151 lorong chuan, new tech park, singapore 556741 tel: +65-281-0770 fax: +65-281-0220 http://www.fmap.com.sg/ korea fujitsu microelectronics korea ltd. 1702 kosmo tower, 1002 daechi-dong, kangnam-gu,seoul 135-280 korea tel: +82-2-3484-7100 fax: +82-2-3484-7111 f0104 ? fujitsu limited printed in japan all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. also, fujitsu is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. the products described in this document are designed, and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). please note that fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. any semiconductor devices have inherently a certain rate of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade control law of japan, the prior authorization by japanese government should be required for export of those products from japan.

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