Part Number Hot Search : 
HPR119V 216005P 101615 HCT574 SC141N ET72407 W29NK50 PD43256A
Product Description
Full Text Search
 

To Download PT6547 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 1 - january, 2006 lcd driver ic with key input function PT6547 description PT6547 is a high performance liquid crystal display (lcd) driver ic utilizing cmos technology specially designed with key input function. it can drive up to a maximum of 300 segments and control up to 8 general purpose output ports. it includes a key scan circuit that can support up to 30 key inputs and provides on-chip voltage detection type reset ci rcuit which prevents incorrect display. display data can be directly displayed without using any decoder. PT6547 also supports 1/3 to 1/4 duty-1/2 bias and 1/3 to 1/4 duty-1/3 bias drive tec hniques. pin assignments and application circuit are optimized for easy pcb layout and cost saving advantages. features ? cmos technology ? 1/3 duty and 1/4 duty drive techniques ? 1/2 bias and 1/3 bias drive techniques ? up to 228 segments using 1/3 duty and up to 300 segments using 1/4 duty ? up to 8 general purpose output ports ? key input function for up to 30 keys [6(o) x 5(i)] ? serial interface for clock, data input, data output, strobe pins ? sleep mode & all segment off function ? on-chip voltage detection type reset circuit ? power supply: 4.5v ~ 6.0v ? /res pin provided forcibly initializing the internal circuit ? rc oscillation circuit ? available in 100 pins, lqfp package application ? electronic equipment with lcd display
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 2 - january, 2006 lcd driver ic with key input function PT6547 block diagram common driver segment driver & latch display ram key buffer key scan co m1 test dout ocs vdd din clk stb /res ki1 ki2 ki3 ki4 ki5 k 6 sk 5 sk 4 s sg76/ks2 sg75/ks 1 co m2 co m3 co m4 /sg 74 s 73 g s 9 g sg 8 / p8 sg 1 / p1 clock generator command interface control register vdet k3 s vlcd vlcd1 vlcd2 vss
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 3 - january, 2006 lcd driver ic with key input function PT6547 pin configuration 100pins, lqfp 1 2 3 4 5 6 7 8 9 10 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 100 32 99 33 98 34 97 35 96 36 95 37 94 38 93 39 92 40 91 41 90 42 89 43 88 44 87 45 86 46 85 47 84 48 83 49 82 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 plq t6547 clk din sg1/p1 sg2/p2 sg3/p3 sg4/p4 sg5/p5 sg6/p6 sg7/p7 sg8/p8 s9 g s10 g s11 g s12 g s13 g s15 g sg14 s16 g s17 g s18 g s19 g s20 g s21 g s22 g s23 g s24 g s25 g s26 g s27 g s28 g s49 g s50 g s51 g s52 g s53 g s54 g s55 g s56 g s57 g s58 g s59 g s60 g s61 g s62 g s63 g s64 g s65 g s66 g s67 g s68 g s70 g s69 g s71 g s72 g s73 g com4/sg74 com3 com2 com1 sg75/ks1 s29 g stb s30 g dout s31 g /res s32 g osc s33 g test s34 g vss s35 g vlcd2 s36 g vlcd1 s37 g s38 g vlcd sg39 vdd s40 g k5 i s41 g k4 i s42 g k3 i s43 g k2 i s44 g k1 i s45 g k5 s s46 g k4 s s47 g k3 s s48 g sg76/ks2 k6 s
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 4 - january, 2006 lcd driver ic with key input function PT6547 input/ouput configurations the schematic diagrams of the i nput and output circuits of the logic section are shown below: input pin: clk, stb, din vdd vss input pin: ki1 to ki5 vss vdd vlcd output pin: dout vss vdd
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 5 - january, 2006 lcd driver ic with key input function PT6547 output pin: sg1/p1 to sg8/p8, sg9 to sg73, sg75/ks1, sg76/ks2 vlcd2 vlcd vlcd vlcd1 vss vss output pin: ks3 to ks6 vlcd vss output pin: com1 to com3, com4/sg74 vlcd2 vlcd vlcd1 vss
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 6 - january, 2006 lcd driver ic with key input function PT6547 pin descripton pin name i/o description pin no. sg1/p1 to sg8/p8 o segment driver/g eneral purpose output pins 1 to 8 sg9 to sg73 o segment driver output pins 9 to 73 sg74/com4 o common/segment driver output pins this pin can used as segment output pin in 1/3 duty. 74 com1 to com3 o common driver output pins 77 to 75 sg75/ks1, sg76/ks2 o key scan/segment driver output pins 78, 79 ks3 to ks6 o key scan output pins 80 to 83 ki1 to ki5 i key scan input pins 84 to 88 vdd - power supply 89 vlcd - lcd driver power supply 90 vlcd1 - lcd drive 2/3 bias voltage power supply must be connected to vlcd2 when a 1/2 bias drive scheme is used. 91 vlcd2 - lcd drive 1/3 bias voltage power supply must be connected to vlcd1 when a 1/2 bias drive scheme is used. 92 vss - ground pin 93 test i this pin must be connected to ground. 94 osc i/o oscillator input/output pin an oscillator circuit is formed by connecting an external resistor and capacitor at this pin. 95 /res i reset input pin when this pin is set to ?low?, reset to initial state. 96 dout o data output pin (see note) this pin outputs serial data at the falling edge of the shift clock (starting from the lower bit). 97 stb i chip enable input pin the data input after the stb has fallen is processed as a command. when this pin is ?high?, clk is ignored. 98 clk i clock input pin this pin reads serial data at the rising edge and outputs data at the falling edge. 99 din i data input pin this pin inputs serial data at the rising edge of the shift clock (starting from the lower bit). 100 note: this pin is open-drain output, a pull-up resistor of between 1k and 10k ? is required.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 7 - january, 2006 lcd driver ic with key input function PT6547 function description commands commands determine the display mode and status of PT6547. a command is the first byte (b0 to b7) inputted to PT6547 via the din pin after stb pin has changed from ?high? to ?low? state. if for some reason the stb pin is set to ?high? while dat a or commands are being transmitted, the serial communication is initialized, and the data/co mmands being transmitted are considered invalid. command 1: display mode/output-1 state setting commands PT6547 provides 8 display mode settings as shown in the diagram below: as stated earlier a command is the first one byte (b0 to b7) transmitted to PT6547 via the din pin when stb is ?low?. however, for these commands, bits 7 & 8 (b6 to b7) are given a value of ?0?. the display mode setting commands determine the num ber, the bits 1 and 2 (b0 and b1) of duty drive and bias drive to be used (1/3 to 1/4 duty ? 1/2 bias and 1/3 to 1/4 duty ? 1/ 3 bias), the bits 3 to 6 (b2 to b5) are control which may be used for segm ent output port or general purpose output port. when power is turned on, the bit 6 to bit 1 (b5 to b0) are given the value of ?0?. 0 0 b5 b4 b3 b2 b1 b0 duty drive selection setting: 0: 1/4 duty drive, sg74/com4 output pin state is com4 1: 1/3 duty drive, sg74/com4 output pin state is sg74 bias drive selection setting: 0: 1/3 bias drive 1: 1/2 bias drive segment/general purpose selection setting: control bit output pin state b5 b4 b3 b2 sg1/p1 sg2/ p2 sg3/p3 sg4/p4 sg5/p5 sg6/p6 sg7/p7 sg8/p8 0 0 0 0 sg1 sg2 sg3 sg4 sg5 sg6 sg7 sg8 0 0 0 1 p1 sg2 sg3 sg4 sg5 sg6 sg7 sg8 0 0 1 0 p1 p2 sg3 sg4 sg5 sg6 sg7 sg8 0 0 1 1 p1 p2 p3 sg4 sg5 sg6 sg7 sg8 0 1 0 0 p1 p2 p3 p4 sg5 sg6 sg7 sg8 0 1 0 1 p1 p2 p3 p4 p5 sg6 sg7 sg8 0 1 1 0 p1 p2 p3 p4 p5 p6 sg7 sg8 0 1 1 1 p1 p2 p3 p4 p5 p6 p7 sg8 1 0 0 0 p1 p2 p3 p4 p5 p6 p7 p8 msb lsb
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 8 - january, 2006 lcd driver ic with key input function PT6547 command 2: data/output-2 state setting commands the data setting commands executes the data write or data read modes for PT6547. the data setting command, the bit 7 (b6) is given the value of ?1 ? while bit 8 (b7) and bit 6 to bit 5 (b5 to b4) is given the value of ?0?. please refer to the diagram below. when power is turned on, the bit 4 to bit 1 (b3 to b0) are given the value of ?0?. msb lsb data write & read mode setting: 00: write data to display ram 01: write data to general purpose output port 10: read key data 11: segment/key scan output setting address increment mode setting (display mode): 0: increment address after data has been written 1: fixes address mode setting: 0: normal operation mode 0 1 0 0 b3 b2 b1 b0
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 9 - january, 2006 lcd driver ic with key input function PT6547 general purpose output port data PT6547 provides 8 general purpose output port namel y p1 to p8. data is written to the general purpose output port starting from the least signifi cant bit (b0) of the port using a write command. when power is turned on, the bit 8 to bit 1 (b7 to b0) are given the value of ?0?. msb lsb b7 b6 b5 b4 b3 b2 b1 b0 segment/key scan output setting the output state setting commands: segment/key scan output selection setting determine the number, the b0 to b1 are control which may be used for segment output port or key scan output port. please refer to the diagram below. when power is turned on, the bit 2 to bit 1 (b1 to b0) are given the value of ?1?. msb lsb 0 0 0 0 0 0 b1 b0 segment/key scan output selection control bits: control bit output pin state b1 b0 sg75/ks1 sg76/ks2 maximum number of input keys 0 0 ks1 ks2 30 0 1 sg75 ks2 25 1 1 sg75 sg76 20 p1 p2 p3 p4 p5 p6 p7 p8
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 10 - january, 2006 lcd driver ic with key input function PT6547 PT6547 key matrix PT6547 key matrix consists of 6 x 5 arrays as shown below: k2 i k3 i k4 i k5 i ks1 ks2 ks3 ks4 ks5 ks6 k1 i each data inputted by each key are stored as foll ows. they are read by a read command, starting from the least significant bit. reading sequence ki1??ki5 ki1??ki5 ki1??ki5 ki1??ki5 ki1??ki5 ki1??ki5 ks1 ks2 ks3 ks4 ks5 ks6
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 11 - january, 2006 lcd driver ic with key input function PT6547 command 3: address setting commands address setting commands are used to set the address of the display memory. the address is consider valid if it has a value of ?00h? to ?25h ?. if the address is set to 26h or higher, the data is ignored until a valid address is set. when power is tu rned on, the address is set at ?00h?. please refer to the diagram below. msb lsb 1 1 b5 b4 b3 b2 b1 b0 display mode and ram address data transmitted from an external device to PT6547 vi a the serial interface are stored in the display ram and are assigned addresses. the ram address of PT6547 are given below in 8 bits unit. 1/3 duty com1 com3 com1 com3 com1 com3 com1 com3 sg1 00h l sg21 0ah l sg41 14h l sg61 1eh l sg2 00h u sg22 0ah u sg42 14h u sg62 1eh u sg3 01h l sg23 0bh l sg43 15h l sg63 1fh l sg4 01h u sg24 0bh u sg44 15h u sg64 1fh u sg5 02h l sg25 0ch l sg45 16h l sg65 20h l sg6 02h u sg26 0ch u sg46 16h u sg66 20h u sg7 03h l sg27 0dh l sg47 17h l sg67 21h l sg8 03h u sg28 0dh u sg48 17h u sg68 21h u sg9 04h l sg29 0eh l sg49 18h l sg69 22h l sg10 04h u sg30 0eh u sg50 18h u sg70 22h u sg11 05h l sg31 0fh l sg51 19h l sg71 23h l sg12 05h u sg32 0fh u sg52 19h u sg72 23h u sg13 06h l sg33 10h l sg53 1ah l sg73 24h l sg14 06h u sg34 10h u sg54 1ah u sg74 24h u sg15 07h l sg35 11h l sg55 1bh l sg75 25h l sg16 07h u sg36 11h u sg56 1bh u sg76 25h u sg17 08h l sg37 12h l sg57 1ch l sg18 08h u sg38 12h u sg58 1ch u sg19 09h l sg39 13h l sg59 1dh l sg20 09h u sg40 13h u sg60 1dh u b0 b3 b4 b7 xxh l xxh u lower 4bits higher 4 bits b3, b7 are dummy address: 00h to 25h
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 12 - january, 2006 lcd driver ic with key input function PT6547 1/4duty com1 com4 com1 com4 com1 com4 com1 com4 sg1 00h l sg21 0ah l sg41 14h l sg61 1eh l sg2 00h u sg22 0ah u sg42 14h u sg62 1eh u sg3 01h l sg23 0bh l sg43 15h l sg63 1fh l sg4 01h u sg24 0bh u sg44 15h u sg64 1fh u sg5 02h l sg25 0ch l sg45 16h l sg65 20h l sg6 02h u sg26 0ch u sg46 16h u sg66 20h u sg7 03h l sg27 0dh l sg47 17h l sg67 21h l sg8 03h u sg28 0dh u sg48 17h u sg68 21h u sg9 04h l sg29 0eh l sg49 18h l sg69 22h l sg10 04h u sg30 0eh u sg50 18h u sg70 22h u sg11 05h l sg31 0fh l sg51 19h l sg71 23h l sg12 05h u sg32 0fh u sg52 19h u sg72 23h u sg13 06h l sg33 10h l sg53 1ah l sg73 24h l sg14 06h u sg34 10h u sg54 1ah u sg75 24h u sg15 07h l sg35 11h l sg55 1bh l sg76 25h l sg16 07h u sg36 11h u sg56 1bh u sg17 08h l sg37 12h l sg57 1ch l sg18 08h u sg38 12h u sg58 1ch u sg19 09h l sg39 13h l sg59 1dh l sg20 09h u sg40 13h u sg60 1dh u b0 b3 b4 b7 xxh l xxh u lower 4bits higher 4 bits
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 13 - january, 2006 lcd driver ic with key input function PT6547 command 4: display control commands the display control commands are used to sleep mode control and all segment off. when bit 1 (b0) is set to ?1?, the segment display state is ?on?; when bit 1 (b0) is set to ?0?, the segment display state is ?off?. th is ?off? state is achieved by outputting segment ?off? waveforms from the segment output pins. bit 2 to 3 (b1 to b2) are switch between normal and sleep mode. set t he key states of the ks1 to ks6 key scan outputs during key scan standby. bit 8 (b7) is given the value of ?1? while bit 7 to bit 4 (b6 to b3) is given the va lue of ?0?. please refer to the diagram below. when power is turned on, the bit 3 to bit 1 (b2 to b0) are given the value of ?0?. msb lsb 1 0 0 0 0 b2 b1 b0 segment all off control setting: 0: off 1: on sleep control setting: control bit output pins state during key scan standby b2 b1 mode osc oscillator segment/common output state ks1 ks2 ks3 ks4 ks5 ks6 0 0 normal operating operating ?h? ?h? ?h? ?h? ?h? ?h? 0 1 ?l? ?l? ?l? ?l? ?l? ?h? 1 0 ?l? ?l? ?l? ?l? ?h? ?h? 1 1 sleep stopped ?l? ?h? ?h? ?h? ?h? ?h? ?h? *note: assumes that sg75/ks1 and sg76/ks2 out put pins are selected for key scan output. sleep mode sleep mode is set up by setting b2 or b1 in the control bit to ?1?. the segment and common outputs will all go low, and the oscillator on the osc pin will stop (it will be started by a ke y press). this mode could reduce power dissipation. this mode is cleared by sending control data with both b2 and b1 set to ?0?.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 14 - january, 2006 lcd driver ic with key input function PT6547 voltage detection type reset (vdet) the voltage detection type reset circuit (vdet) generates an output signal and resets the systems under the following conditions: 1. when power is initiated or first applied. 2. when the voltage drops (i.e. the power supply vo ltages is less than or equal to the power down detection voltage, vdet). to insure that this function will operate properly , then a capacitor must be connected to the power supply line so that the power supply voltage vdd rise time when the power is first applied as well as the power supply voltage vdd fall time when the voltage drops are both at least 1ms. reset of output pins state the states of the output pins during the reset period are given in the table below. output pin state during the reset period remarks sg1/p1 to sg8/p8 sg75/ks1, sg76/ks2 l these output pins are forcibly set to the segment output function and held low. sg9 to sg73 l - com4/sg74 l this output pin is forcibly set to the common output function and held low. however, when the command 1?s b0 control bit is transferred, either the common output or the segment output function is selected. com1 to com3 l - ks3 to ks5 x (see note) when the power is first applied, the states of these output pins are undefined until the command 4?s b2 and b1 control bits have been transferred. ks6 h - dout h this output pin is an open-drain output, thus a 1k to 10k ? pull-up resistor is needed. this pin is kept at "high" level during the reset period even if the key data read operation is performed. note: x=not relevant
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 15 - january, 2006 lcd driver ic with key input function PT6547 serial communication format the following diagram shows the PT6547 serial comm unication format. the dout pin is an n-channel, open-drain output pin, therefore, it is highly recommended that an external pull-up resistor (1k ? to 10k ? ) must be connected to dout. reception (data/command write) if data continue s din clk stb b0 b2 b1 b7 b6 2 13 8 7 transmission (data read) data read command is set din clk dout data reading starts stb b0 b7 b2 b3 b4 b5 b1 b6 1 8 7 6 5 4 2 13 t wait b0 b2 b3 b4 b5 b1 1 6 5 4 2 13 where: twait (waiting time) 1s it must be noted that when the data is read, the wait ing time (twait) between the rising of the eighth clock that has set the command and the falling of the first clock that has read the data is greater or equal to 1s.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 16 - january, 2006 lcd driver ic with key input function PT6547 switching characteristics waveform PT6547 switching characteristics waveform is given below. osc stb clk din dout fosc 50% t ol t oh t ds t dh t dc p wstb t dr
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 17 - january, 2006 lcd driver ic with key input function PT6547 1/3 duty, 1/2 bias drive technique vlcd vlcd1, vlcd 2 0v f osc / 384 ( hz ) com1 com2 com3 lcd driver output when all lcd segments corresponding to com1, com2, com3 are turned off) lcd driver output when only lcd segments corresponding to com1 are on. lcd driver output when only lcd segments corresponding to com2 are on. lcd driver output when lcd segments corresponding to com1 and com2 are on. lcd driver output when only lcd segments corresponding to com3 are on. lcd driver output when lcd segments corresponding to com1 and com3 are on. lcd driver output when lcd segments corresponding to com2 and com3 are on. lcd driver output when lcd segments corresponding to com1, com2 and com3 are on. vlcd vlcd1, vlcd 2 0v vlcd vlcd1, vlcd 2 0v vlcd vlcd1, vlcd 2 0v vlcd vlcd1, vlcd 2 0v vlcd vlcd1, vlcd 2 0v vlcd vlcd1, vlcd 2 0v vlcd vlcd1, vlcd 2 0v vlcd vlcd1, vlcd 2 0v vlcd vlcd1, vlcd 2 0v vlcd vlcd1, vlcd 2 0v
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 18 - january, 2006 lcd driver ic with key input function PT6547 1/3 duty, 1/3 bias drive technique vlcd vlcd1 0v vlcd2 f osc / 384 (hz) com1 com2 com3 lcd driver output when all lcd segments corresponding to com1, com2, com3 are turned off) lcd driver output when only lcd segments corresponding to com1 are on. lcd driver output when only lcd segments corresponding to com2 are on. lcd driver output when lcd segments corresponding to com1, com2 are on. lcd driver output when only lcd segments corresponding to com3 are on. lcd driver output when lcd segments corresponding to com1 and com3 are on. lcd driver output when lcd segments corresponding to com2 and com3 are on. lcd driver output when all lcd segments corresponding to com1, com2 and com3 are on. vlcd vlcd1 0v vlcd2 vlcd vlcd1 0v vlcd2 vlcd vlcd1 0v vlcd2 vlcd vlcd1 0v vlcd2 vlcd vlcd1 0v vlcd2 vlcd vlcd1 0v vlcd2 vlcd vlcd1 0v vlcd2 vlcd vlcd1 0v vlcd2 vlcd vlcd1 0v vlcd2 vlcd vlcd1 0v vlcd2
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 19 - january, 2006 lcd driver ic with key input function PT6547 1/4 duty, 1/2 bias drive technique vlcd vlcd1, vlcd2 0v com1 com2 com3 com4 lcd driver output when all lcd segments corresponding to com1,com2, com3 and com4 are turned off. lcd driver output when only lcd segments corresponding to com1 are on. lcd driver output when only lcd segments corresponding to com2 are on. lcd driver output when lcd segments corresponding to com1 and com2 are on. lcd driver output when only lcd segments corresponding to com3 are on. lcd driver output when lcd segments corresponding to com1 and com3 are on. lcd driver output when lcd segments corresponding to com2 and com3 are on. lcd driver output when lcd segments corresponding to com1, com2 and com3 are on. lcd driver output when only lcd segments corresponding to com4, are on. lcd driver output when only lcd segments corresponding to com2 and com4 are on. lcd driver output when lcd segments corresponding to com1, com2, com3 and com4 are on. fosc 384 (hz) vlcd vlcd1, vlcd2 0v vlcd vlcd1, vlcd2 0v vlcd vlcd1, vlcd2 0v vlcd vlcd1, vlcd2 0v vlcd vlcd1, vlcd2 0v vlcd vlcd1, vlcd2 0v vlcd vlcd1, vlcd2 0v vlcd vlcd1, vlcd2 0v vlcd vlcd1, vlcd2 0v vlcd vlcd1, vlcd2 0v vlcd vlcd1, vlcd2 0v vlcd vlcd1, vlcd2 0v vlcd vlcd1, vlcd2 0v vlcd vlcd1, vlcd2 0v
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 20 - january, 2006 lcd driver ic with key input function PT6547 1/4 duty, 1/3 bias drive technique vlcd vlcd1 0v com1 com2 com3 com4 lcd driver output when all lcd segments corresponding to com1, com2, com3 and com4 are turned off. lcd driver output when only lcd segments corresponding to com1 are on. lcd driver output when only lcd segments corresponding to com2 are on. lcd driver output when lcd segments corresponding to com1 and com2 are on.. lcd driver output when only lcd segments corresponding to com3 are on. lcd driver output when lcd segments corresponding to com1 and com3 are on. lcd driver output when lcd segments corresponding to com2 and com3 are on. lcd driver output when lcd segments corresponding to com1, com2 and com3 are on. lcd driver output when only lcd segments corresponding to com4, are on. lcd driver output when lcd segments corresponding to com2 and com4 are on. lcd driver output when all lcd segments corresponding to com1, com2, com3 and com4 are on. fosc 384 (hz) vlcd 2 vlcd vlcd1 0v vlcd 2 vlcd vlcd1 0v vlcd 2 vlcd vlcd1 0v vlcd 2 vlcd vlcd1 0v vlcd 2 vlcd vlcd1 0v vlcd 2 vlcd vlcd1 0v vlcd 2 vlcd vlcd1 0v vlcd 2 vlcd vlcd1 0v vlcd 2 vlcd vlcd1 0v vlcd 2 vlcd vlcd1 0v vlcd 2 vlcd vlcd1 0v vlcd 2 vlcd vlcd1 0v vlcd 2 vlcd vlcd1 0v vlcd 2 vlcd vlcd1 0v vlcd 2
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 21 - january, 2006 lcd driver ic with key input function PT6547 absolute maximum ratings (unless otherwise specified, ta=25c, vss=0v) parameter symbol conditions rating unit maximum supply voltage vdd max vdd -0.3 to +7.0 v maximum supply voltage vlcd max vlcd -0.3 to +7.0 v vin1 din, clk, stb, /res -0.3 to vdd+0.3 v vin2 osc, test -0.3 to vdd+0.3 v input voltage vin3 vlcd1, vlcd2, ki1 to ki5 -0.3 to vlcd+0.3 v vout1 dout -0.3 to vdd+0.3 v vout2 osc -0.3 to vdd+0.3 v output voltage vout3 sg1 to sg76, com1 to com4, ks1 to ks6, p1 to p8 -0.3 to vlcd+0.3 v iout1 sg1 to sg76 300 a iout2 com1 to com4 3 ma iout3 ks1 to ks6 1 ma output current iout4 p1 to p8 5 ma allowable power dissipation pd max ta=85c 200 mw operating temperature topr -40 to +85 c storage temperature tstg -65 to +150 c
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 22 - january, 2006 lcd driver ic with key input function PT6547 allowable operating conditions (unless otherwise specified, ta=-40 to +85c, vss=0v) parameter symbol conditions min. typ. max. unit vdd vdd 4.5 - 6.0 supply voltage vlcd vlcd vdd-0.5 - 6.0 v vlcd1 vlcd 1 - 2/3vlcd vlcd input voltage vlcd2 vlcd 2 - 1/3vlcd vlcd v vih1 din, clk, stb, /res 0.8vdd - vdd input high level voltage vih2 ki1 to ki5 0.6vlcd - vlcd v input low level voltage vil din, clk, stb, /res, (ki1 to ki5) 0 - 0.2vdd (0.2vlcd) v recommended external resistance rosc osc - 39 - k ? recommended external capacitance cosc osc - 1000 - pf data setup time tds clk, din 160 - - ns data hold time tdh clk, din 160 - - ns high level clock pulse width toh clk 160 - - ns low level clock pulse width tol clk 160 - - ns rise time tr stb, clk, din - 160 - ns fall time tf stb, clk, din - 160 - ns do output delay time tdc dout - - 1.5 s do rise time tdr dout - - 1.5 s
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 23 - january, 2006 lcd driver ic with key input function PT6547 electrical characteristics (unless otherwise specified, ta=25c, vdd=5.0v, vss=0v) parameter symbol conditions min. typ. max. unit hysteresis vh din, clk, stb, /res, ki1 to ki5 - 0.1vdd - v power-down detection voltage vdet 3.5 - - v input high level voltage iih din, clk, stb, /res: vi=vdd - - 5.0 a input high level current iil din, clk, stb, /res: vi=0v 5.0 - - a input floating voltage vif ki 1 to ki5 - - 0.05vlcd v pull-down resistance rpd ki1 to ki5: vlcd=5.0v 50 100 250 k ? output off leakage current ioffh dout: vo=6.0v - - 6.0 a voh1 ks1 to ks6: io=-500 a vlcd-1.0 vlcd-0.5 vlcd-0.2 voh2 p1 to p8: io=-1ma vlcd-1.0 - - voh3 sg1 to sg76: io=-20 a vlcd-1.0 - - output high level voltage voh4 com1 to com4: io=-100 a vlcd-1.0 - - v vol1 ks1 to ks6: io=25 a 0.2 0.5 1.5 vol2 p1 to p8: io=1ma - - 1.0 vol3 sg1 to sg76: io=20 a - - 1.0 vol4 com1 to com4: io=100 a - - 1.0 output low level voltage vol5 dout: io=1ma - 0.1 0.5 v vmid1 com1 to com4: 1/2 bias, io=100 a 1/2vlcd-1.0 - 1/2vlcd+1.0 vmid2 sg1 to sg76:1/3 bias, io=20 a 2/3vlcd-1.0 - 2/3vlcd+1.0 vmid3 sg1 to sg76: 1/3 bias, io=20 a 1/3vlcd-1.0 - 1/3vlcd+1.0 vmid4 com1 to com4: 1/3 bias, io=100 a 2/3vlcd-1.0 - 2/3vlcd+ 1.0 output middle level voltage (see note.) vmid5 com1 to com4: 1/3 bias, io=100 a 1/3vlcd-1.0 - 1/3vlcd+ 1.0 v oscillator frequency fosc osc: rosc=39 k ? , cosc=1000pf 30.4 38 45.6 khz idd1 vdd: sleep mode - - 150 idd2 vdd: vdd=6.0v, output open, fosc=38khz - 405 810 idd3 vlcd: sleep mode - - 7.5 idd4 vlcd: vlcd=6.0v, output open,1/2 bias, fosc=38khz - 300 600 current drain idd5 vlcd: vlcd=6.0v, output open, 1/3 bias, fosc=38khz - 180 360 a
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 24 - january, 2006 lcd driver ic with key input function PT6547 note: the bias voltage generation driver built-into vlcd1 and vlcd2 are not included. please refer to the diagram below. vlcd1 vlcd2 excluding these resistors to the common/segment drivers vlcd
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 25 - january, 2006 lcd driver ic with key input function PT6547 application circuit 1 1/3 duty 1/2 bias (for normal panel use) 1 2 3 4 5 6 7 8 9 10 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 100 32 99 33 98 34 97 35 96 36 95 37 94 38 93 39 92 40 91 41 90 42 89 43 88 44 87 45 86 46 85 47 84 48 83 49 82 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 plq t6547 sg1/p1 sg2/p2 sg3/p3 sg4/p4 sg5/p5 sg6/p6 sg7/p7 sg8/p8 s9 g s10 g s11 g s12 g s13 g s15 g sg14 s16 g s17 g s18 g s19 g s20 g s21 g s22 g s23 g s24 g s25 g s51 g s52 g s53 g s54 g s55 g s56 g s57 g s58 g s59 g s60 g s61 g s62 g s63 g s64 g s65 g s66 g s67 g s68 g s70 g s69 g s71 g s72 g s73 g com4/sg74 com3 s26 g s27 g s28 g s49 g s50 g s29 g s30 g s31 g s32 g s33 g s34 g s35 g s36 g s37 g s38 g sg39 s40 g s41 g s42 g s43 g s44 g s45 g s46 g s47 g s48 g clk din com2 com1 sg75/ks1 stb dout /res osc test vss vlcd2 vlcd1 vlcd vdd k5 i k4 i k3 i k2 i k1 i k5 s k4 s k3 s sg76/ks2 k6 s lcd panel 5v 5v 39k 1000pf mcu vdd (see n ot e 1) (see n ot e 2) 5.1k 5.1k 5.1k 5.1k (see n ot e 3) c c 0.047 f > 0. 1 f 0. 1 f notes: 1. a capacitor can be connected to the power supply line to make the power supply voltage vdd rise time (when power is applied) and the power supply voltage vdd fall time power drops) are at least 1ms when PT6547 is reset via vdet. 2. if the /res pin is not used to initiate the s ystem reset function, it must be connected vdd. 3. the dout pin is an open-drain output and theref ore needs a pull-up resistor. this resistor be between 1k to 10k ? . the value of this resistor must be in accordance with that capacitance of the external wiring so that the signal waveforms are in proper form.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 26 - january, 2006 lcd driver ic with key input function PT6547 application circuit 2 1/3 duty 1/2 bias (for large panel use) 1 2 3 4 5 6 7 8 9 10 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 100 32 99 33 98 34 97 35 96 36 95 37 94 38 93 39 92 40 91 41 90 42 89 43 88 44 87 45 86 46 85 47 84 48 83 49 82 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 plq t6547 sg1/p1 sg2/p2 sg3/p3 sg4/p4 sg5/p5 sg6/p6 sg7/p7 sg8/p8 s9 g s10 g s11 g s12 g s13 g s15 g sg14 s16 g s17 g s18 g s19 g s20 g s21 g s22 g s23 g s24 g s25 g s51 g s52 g s53 g s54 g s55 g s56 g s57 g s58 g s59 g s60 g s61 g s62 g s63 g s64 g s65 g s66 g s67 g s68 g s70 g s69 g s71 g s72 g s73 g com4/sg74 com3 s26 g s27 g s28 g s49 g s50 g s29 g s30 g s31 g s32 g s33 g s34 g s35 g s36 g s37 g s38 g sg39 s40 g s41 g s42 g s43 g s44 g s45 g s46 g s47 g s48 g clk din com2 com1 sg75/ks1 stb dout /res osc test vss vlcd2 vlcd1 vlcd vdd k5 i k4 i k3 i k2 i k1 i k5 s k4 s k3 s sg76/ks2 k6 s lcd panel +5v 39k 1000pf mcu vdd (see n ot e 1) (see n ot e 2) 5.1k 5.1k 5.1k 5.1k (see n ot e 3) c 5v r r c 10k >r 1k c 0.047 f > > notes: 1. a capacitor can be connected to the power supply line to make the power supply voltage vdd rise time (when power is applied) and the power supply voltage vdd fall time power drops) are at least 1ms when PT6547 is reset via vdet. 2. if the /res pin is not used to initiate the s ystem reset function, it must be connected vdd. 3. the dout pin is an open-drain output and theref ore needs a pull-up resistor. this resistor be between 1k to 10k ? . the value of this resistor must be in accordance with that capacitance of the external wiring so that the signal waveforms are in proper form.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 27 - january, 2006 lcd driver ic with key input function PT6547 application circuit 3 1/3 duty 1/3 bias (for normal panel use) 1 2 3 4 5 6 7 8 9 10 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 100 32 99 33 98 34 97 35 96 36 95 37 94 38 93 39 92 40 91 41 90 42 89 43 88 44 87 45 86 46 85 47 84 48 83 49 82 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 plq t6547 sg1/p1 sg2/p2 sg3/p3 sg4/p4 sg5/p5 sg6/p6 sg7/p7 sg8/p8 s9 g s10 g s11 g s12 g s13 g s15 g sg14 s16 g s17 g s18 g s19 g s20 g s21 g s22 g s23 g s24 g s25 g s51 g s52 g s53 g s54 g s55 g s56 g s57 g s58 g s59 g s60 g s61 g s62 g s63 g s64 g s65 g s66 g s67 g s68 g s70 g s69 g s71 g s72 g s73 g com4/sg74 com3 s26 g s27 g s28 g s49 g s50 g s29 g s30 g s31 g s32 g s33 g s34 g s35 g s36 g s37 g s38 g sg39 s40 g s41 g s42 g s43 g s44 g s45 g s46 g s47 g s48 g clk din com2 com1 sg75/ks1 stb dout /res osc test vss vlcd2 vlcd1 vlcd vdd k5 i k4 i k3 i k2 i k1 i k5 s k4 s k3 s sg76/ks2 k6 s lcd panel +5v 39k 1000pf mcu vdd (see n ot e 1) (see n ot e 2) 5.1k 5.1k 5.1k 5.1k (see n ot e 3) c 5v c 0.047 f > c c 0. 1 f notes: 1. a capacitor can be connected to the power supply line to make the power supply voltage vdd rise time (when power is applied) and the power supply voltage vdd fall time power drops) are at least 1ms when PT6547 is reset via vdet. 2. if the /res pin is not used to initiate the s ystem reset function, it must be connected vdd. 3. the dout pin is an open-drain output and theref ore needs a pull-up resistor. this resistor be between 1k to 10k ? . the value of this resistor must be in accordance with that capacitance of the external wiring so that the signal waveforms are in proper form.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 28 - january, 2006 lcd driver ic with key input function PT6547 application circuit 4 1/3 duty 1/3 bias (for large panel use) 1 2 3 4 5 6 7 8 9 10 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 100 32 99 33 98 34 97 35 96 36 95 37 94 38 93 39 92 40 91 41 90 42 89 43 88 44 87 45 86 46 85 47 84 48 83 49 82 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 plq t6547 sg1/p1 sg2/p2 sg3/p3 sg4/p4 sg5/p5 sg6/p6 sg7/p7 sg8/p8 s9 g s10 g s11 g s12 g s13 g s15 g sg14 s16 g s17 g s18 g s19 g s20 g s21 g s22 g s23 g s24 g s25 g s51 g s52 g s53 g s54 g s55 g s56 g s57 g s58 g s59 g s60 g s61 g s62 g s63 g s64 g s65 g s66 g s67 g s68 g s70 g s69 g s71 g s72 g s73 g com4/sg74 com3 s26 g s27 g s28 g s49 g s50 g s29 g s30 g s31 g s32 g s33 g s34 g s35 g s36 g s37 g s38 g sg39 s40 g s41 g s42 g s43 g s44 g s45 g s46 g s47 g s48 g clk din com2 com1 sg75/ks1 stb dout /res osc test vss vlcd2 vlcd1 vlcd vdd k5 i k4 i k3 i k2 i k1 i k5 s k4 s k3 s sg76/ks2 k6 s lcd panel 39k 1000pf mcu vdd (see n ot e 2) 5.1k 5.1k 5.1k 5.1k (see n ot e 3) +5v (see n ot e 1) c +5v r r 10k >r 1k c 0.047 f > > c r 0. 1 f 0. 1 f notes: 1. a capacitor can be connected to the power supply line to make the power supply voltage vdd rise time (when power is applied) and the power supply voltage vdd fall time power drops) are at least 1ms when PT6547 is reset via vdet. 2. if the /res pin is not used to initiate the s ystem reset function, it must be connected vdd. 3. the dout pin is an open-drain output and theref ore needs a pull-up resistor. this resistor be between 1k to 10k ? . the value of this resistor must be in accordance with that capacitance of the external wiring so that the signal waveforms are in proper form.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 29 - january, 2006 lcd driver ic with key input function PT6547 application circuit 5 1/4 duty 1/2 bias (for normal panel use) 1 2 3 4 5 6 7 8 9 10 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 100 32 99 33 98 34 97 35 96 36 95 37 94 38 93 39 92 40 91 41 90 42 89 43 88 44 87 45 86 46 85 47 84 48 83 49 82 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 plq t6547 sg1/p1 sg2/p2 sg3/p3 sg4/p4 sg5/p5 sg6/p6 sg7/p7 sg8/p8 s9 g s10 g s11 g s12 g s13 g s15 g sg14 s16 g s17 g s18 g s19 g s20 g s21 g s22 g s23 g s24 g s25 g s51 g s52 g s53 g s54 g s55 g s56 g s57 g s58 g s59 g s60 g s61 g s62 g s63 g s64 g s65 g s66 g s67 g s68 g s70 g s69 g s71 g s72 g s73 g com4/sg74 com3 s26 g s27 g s28 g s49 g s50 g s29 g s30 g s31 g s32 g s33 g s34 g s35 g s36 g s37 g s38 g sg39 s40 g s41 g s42 g s43 g s44 g s45 g s46 g s47 g s48 g clk din com2 com1 sg75/ks1 stb dout /res osc test vss vlcd2 vlcd1 vlcd vdd k5 i k4 i k3 i k2 i k1 i k5 s k4 s k3 s sg76/ks2 k6 s lcd panel 5v 5v 39k 1000pf mcu vdd (see n ot e 1) (see n ot e 2) 5.1k 5.1k 5.1k 5.1k (see n ot e 3) c c 0.047 f > 0. 1 f 0. 1 f notes: 1. a capacitor can be connected to the power supply line to make the power supply voltage vdd rise time (when power is applied) and the power supply voltage vdd fall time power drops) are at least 1ms when PT6547 is reset via vdet. 2. if the /res pin is not used to initiate the s ystem reset function, it must be connected vdd. 3. the dout pin is an open-drain output and theref ore needs a pull-up resistor. this resistor be between 1k to 10k ? . the value of this resistor must be in accordance with that capacitance of the external wiring so that the signal waveforms are in proper form.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 30 - january, 2006 lcd driver ic with key input function PT6547 application circuit 6 1/4 duty 1/2 bias (for large panel use) 1 2 3 4 5 6 7 8 9 10 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 100 32 99 33 98 34 97 35 96 36 95 37 94 38 93 39 92 40 91 41 90 42 89 43 88 44 87 45 86 46 85 47 84 48 83 49 82 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 plq t6547 sg1/p1 sg2/p2 sg3/p3 sg4/p4 sg5/p5 sg6/p6 sg7/p7 sg8/p8 s9 g s10 g s11 g s12 g s13 g s15 g sg14 s16 g s17 g s18 g s19 g s20 g s21 g s22 g s23 g s24 g s25 g s51 g s52 g s53 g s54 g s55 g s56 g s57 g s58 g s59 g s60 g s61 g s62 g s63 g s64 g s65 g s66 g s67 g s68 g s70 g s69 g s71 g s72 g s73 g com4/sg74 com3 s26 g s27 g s28 g s49 g s50 g s29 g s30 g s31 g s32 g s33 g s34 g s35 g s36 g s37 g s38 g sg39 s40 g s41 g s42 g s43 g s44 g s45 g s46 g s47 g s48 g clk din com2 com1 sg75/ks1 stb dout /res osc test vss vlcd2 vlcd1 vlcd vdd k5 i k4 i k3 i k2 i k1 i k5 s k4 s k3 s sg76/ks2 k6 s lcd panel +5v 39k 1000pf mcu vdd (see n ot e 1) (see n ot e 2) 5.1k 5.1k 5.1k 5.1k (see n ot e 3) c 5v r r c 10k >r 1k c 0.047 f > > notes: 1. a capacitor can be connected to the power supply line to make the power supply voltage vdd rise time (when power is applied) and the power supply voltage vdd fall time power drops) are at least 1ms when PT6547 is reset via vdet. 2. if the /res pin is not used to initiate the s ystem reset function, it must be connected vdd. 3. the dout pin is an open-drain output and theref ore needs a pull-up resistor. this resistor be between 1k to 10k ? . the value of this resistor must be in accordance with that capacitance of the external wiring so that the signal waveforms are in proper form.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 31 - january, 2006 lcd driver ic with key input function PT6547 application circuit 7 1/4 duty 1/3 bias (for normal panel use) 1 2 3 4 5 6 7 8 9 10 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 100 32 99 33 98 34 97 35 96 36 95 37 94 38 93 39 92 40 91 41 90 42 89 43 88 44 87 45 86 46 85 47 84 48 83 49 82 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 plq t6547 sg1/p1 sg2/p2 sg3/p3 sg4/p4 sg5/p5 sg6/p6 sg7/p7 sg8/p8 s9 g s10 g s11 g s12 g s13 g s15 g sg14 s16 g s17 g s18 g s19 g s20 g s21 g s22 g s23 g s24 g s25 g s51 g s52 g s53 g s54 g s55 g s56 g s57 g s58 g s59 g s60 g s61 g s62 g s63 g s64 g s65 g s66 g s67 g s68 g s70 g s69 g s71 g s72 g s73 g com4/sg74 com3 s26 g s27 g s28 g s49 g s50 g s29 g s30 g s31 g s32 g s33 g s34 g s35 g s36 g s37 g s38 g sg39 s40 g s41 g s42 g s43 g s44 g s45 g s46 g s47 g s48 g clk din com2 com1 sg75/ks1 stb dout /res osc test vss vlcd2 vlcd1 vlcd vdd k5 i k4 i k3 i k2 i k1 i k5 s k4 s k3 s sg76/ks2 k6 s lcd panel +5v 39k 1000pf mcu vdd (see n ot e 1) (see n ot e 2) 5.1k 5.1k 5.1k 5.1k (see n ot e 3) c 5v c 0.047 f > c c 0. 1 f notes: 1. a capacitor can be connected to the power supply line to make the power supply voltage vdd rise time (when power is applied) and the power supply voltage vdd fall time power drops) are at least 1ms when PT6547 is reset via vdet. 2. if the /res pin is not used to initiate the s ystem reset function, it must be connected vdd. 3. the dout pin is an open-drain output and theref ore needs a pull-up resistor. this resistor be between 1k to 10k ? . the value of this resistor must be in accordance with that capacitance of the external wiring so that the signal waveforms are in proper form.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 32 - january, 2006 lcd driver ic with key input function PT6547 application circuit 8 1/4 duty 1/3 bias (for large panel use) 1 2 3 4 5 6 7 8 9 10 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 100 32 99 33 98 34 97 35 96 36 95 37 94 38 93 39 92 40 91 41 90 42 89 43 88 44 87 45 86 46 85 47 84 48 83 49 82 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 plq t6547 sg1/p1 sg2/p2 sg3/p3 sg4/p4 sg5/p5 sg6/p6 sg7/p7 sg8/p8 s9 g s10 g s11 g s12 g s13 g s15 g sg14 s16 g s17 g s18 g s19 g s20 g s21 g s22 g s23 g s24 g s25 g s51 g s52 g s53 g s54 g s55 g s56 g s57 g s58 g s59 g s60 g s61 g s62 g s63 g s64 g s65 g s66 g s67 g s68 g s70 g s69 g s71 g s72 g s73 g com4/sg74 com3 s26 g s27 g s28 g s49 g s50 g s29 g s30 g s31 g s32 g s33 g s34 g s35 g s36 g s37 g s38 g sg39 s40 g s41 g s42 g s43 g s44 g s45 g s46 g s47 g s48 g clk din com2 com1 sg75/ks1 stb dout /res osc test vss vlcd2 vlcd1 vlcd vdd k5 i k4 i k3 i k2 i k1 i k5 s k4 s k3 s sg76/ks2 k6 s lcd panel 39k 1000pf mcu vdd (see n ot e 2) 5.1k 5.1k 5.1k 5.1k (see n ot e 3) +5v (see n ot e 1) c +5v r r 10k >r 1k c 0.047 f > > c r 0. 1 f 0. 1 f notes: 1. a capacitor can be connected to the power supply line to make the power supply voltage vdd rise time (when power is applied) and the power supply voltage vdd fall time power drops) are at least 1ms when PT6547 is reset via vdet. 2. if the /res pin is not used to initiate the s ystem reset function, it must be connected vdd. 3. the dout pin is an open-drain output and theref ore needs a pull-up resistor. this resistor be between 1k to 10k ? . the value of this resistor must be in accordance with that capacitance of the external wiring so that the signal waveforms are in proper form.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 33 - january, 2006 lcd driver ic with key input function PT6547 order information valid part number package type top code PT6547lq 100 pins, lqfp PT6547lq
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 34 - january, 2006 lcd driver ic with key input function PT6547 package information 100 pins, lqfp package (body size: 14mm x 14mm, pitch:0.50mm, thk: 1.40mm) 1 2 3 sl 0.25mm gauge plane r2 r1 -d- d1 d e1 e -a- -b- -h- e b a2 a 1 a c l1 c seating plane ccc c
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw PT6547 v1.2 - 35 - january, 2006 lcd driver ic with key input function PT6547 symbol min. nom. max. a - - 1.60 a1 0.05 - 0.15 a2 1.35 1.40 1.45 b 0.17 0.22 .027 d 16.00 bsc. d1 14.00 bsc. e 0.50 bsc. e 16.00 bsc. e1 14.00 bsc. 0o 3.5o 7o 1 0o - - 2 11o 12o 13o 3 11o 12o 13o c 0.09 - 0.20 l 0.45 0.60 0.75 l1 1.00 ref. r1 0.08 - - r2 0.08 - 0.20 s 0.20 - - ccc 0.08 notes: 1. dimensioning and tole rancing per asmey14.5-1994. 2. the top package body size ma y be smaller than the bottom package size by as much as 0.15 mm. 3. datums a-b and d to be determined at the datum plane h. 4. dimensions d1 and e1 do not include mold pr otrusions. allowable protrusions is 0.25mm per side. d1 and e1 are maximum plas tic body size dimensions including mismatch. 5. details of pin1 identifier are optional but must be located within the zone indicated. 6. dimension b does not include dambar protrusion. allowable dambar protrusion shall not cause the lead width to exceed the maximum b di mension by more than 0.08 mm. dambar cannot be located on the lower radius or the foot. minimum space between protrusion and an adjacent lead is 0.07mm for 0.4mm and 0.5mm pitch packages. 7. exact shape of each corner is optional. 8. a1 is defined as the distance from the s eating plane to the lowest point on the package body. 9. controlling dimension: millimeters 10. refer to jedec ms-026 variation bed jedec is the registered trademark of je dec solid state techno logy association.


▲Up To Search▲   

 
Price & Availability of PT6547

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X